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[参考译文] AM62L-PROCESSOR-SDK:自适应 LPDDR4 容量

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Other Parts Discussed in Thread: AM62L

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1553208/am62l-processor-sdk-adaptive-lpddr4-capacity

器件型号:AM62L-PROCESSOR-SDK
主题中讨论的其他器件:AM62L

工具/软件:

大家好 、TI 专家。

我们使用 AM62L 芯片和 SDK 版本 11_00_15_05。 在定制板上、我们将使用 1G LPDDR4 或 2G LPDDR4。 当前策略是更改 DTS 文件以识别 LPDDR4 的容量、这将导致输出两个 u-boot 映像。 是否有方法在 u-boot 中自动识别 LPDDR4 的容量并降低版本控制的复杂性。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    我们也尝试过一种方法,但我们不确定它是否是最好的。 附件是修订后的 board/ti/common/k3-DDR。

    // SPDX-License-Identifier: GPL-2.0+
    /*
     * Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/
     */
    
    #include <fdt_support.h>
    #include <dm/uclass.h>
    #include <k3-ddrss.h>
    #include <spl.h>
    #include <linux/sizes.h>
    #include <asm/io.h>
    
    #include "k3-ddr.h"
    
    DECLARE_GLOBAL_DATA_PTR;
    
    #ifdef CONFIG_TARGET_AM62L3_EVM
    /* DDR auto-detection for AM62LX platforms (1GB/2GB only) */
    #define DDR_BASE_ADDR		0x80000000UL
    #define DDR_TEST_PATTERN1	0x5A5A5A5A
    #define DDR_TEST_PATTERN2	0xA5A5A5A5
    
    /**
     * ddr_memory_test() - Test if memory address is accessible
     * @addr: Address to test
     * 
     * Returns: 1 if accessible, 0 if not
     */
    static int ddr_memory_test(ulong addr)
    {
    	volatile u32 *test_addr = (volatile u32 *)addr;
    	u32 original_value;
    	int result = 0;
    
    	/* Save original value */
    	original_value = *test_addr;
    
    	/* Test pattern 1 */
    	*test_addr = DDR_TEST_PATTERN1;
    	if (*test_addr == DDR_TEST_PATTERN1) {
    		/* Test pattern 2 */
    		*test_addr = DDR_TEST_PATTERN2;
    		if (*test_addr == DDR_TEST_PATTERN2) {
    			result = 1;
    		}
    	}
    
    	/* Restore original value */
    	*test_addr = original_value;
    
    	return result;
    }
    
    /**
     * detect_ddr_size() - Auto-detect DDR memory size (1GB or 2GB)
     * 
     * Returns: Detected DDR size in bytes, 0 if detection failed
     */
    static phys_size_t detect_ddr_size(void)
    {
    	ulong test_addr_1gb, test_addr_2gb;
    	phys_size_t detected_size = 0;
    
    	debug("DDR:   Auto-detecting memory size (1GB/2GB)...\n");
    
    	/* Test 1GB boundary */
    	test_addr_1gb = DDR_BASE_ADDR + SZ_1G - 4;
    	
    	/* Test 2GB boundary */
    	test_addr_2gb = DDR_BASE_ADDR + SZ_2G - 4;
    
    	if (ddr_memory_test(test_addr_2gb)) {
    		/* 2GB is accessible */
    		detected_size = SZ_2G;
    #ifndef CONFIG_SPL_BUILD
    		printf("DDR:   Auto-detected 2GiB\n");
    #endif
    	} else if (ddr_memory_test(test_addr_1gb)) {
    		/* Only 1GB is accessible */
    		detected_size = SZ_1G;
    #ifndef CONFIG_SPL_BUILD
    		printf("DDR:   Auto-detected 1GiB\n");
    #endif
    	} else {
    #ifndef CONFIG_SPL_BUILD
    		printf("DDR:   Detection failed, using default\n");
    #endif
    		/* Use device tree default if detection fails */
    		detected_size = gd->ram_size;
    	}
    
    	return detected_size;
    }
    #endif /* CONFIG_TARGET_AM62L3_EVM */
    
    int dram_init(void)
    {
    	s32 ret;
    
    	ret = fdtdec_setup_mem_size_base_lowest();
    	if (ret) {
    		printf("Error setting up mem size and base. %d\n", ret);
    		return ret;
    	}
    
    #ifdef CONFIG_TARGET_AM62L3_EVM
    	/* Auto-detect DDR size for AM62LX (1GB/2GB) */
    	phys_size_t detected_size = detect_ddr_size();
    	
    	/* Update global data with detected size */
    	if (detected_size > 0) {
    		gd->ram_size = detected_size;
    		debug("DDR: Updated ram_size to %llu bytes\n", gd->ram_size);
    	}
    #endif
    
    	return 0;
    }
    
    int dram_init_banksize(void)
    {
    	s32 ret;
    
    #ifdef CONFIG_TARGET_AM62L3_EVM
    	/* For AM62LX with auto-detection, set up banks based on detected size */
    	gd->bd->bi_dram[0].start = DDR_BASE_ADDR;
    	gd->bd->bi_dram[0].size = gd->ram_size;
    	
    	/* Clear remaining banks */
    	for (int i = 1; i < CONFIG_NR_DRAM_BANKS; i++) {
    		gd->bd->bi_dram[i].start = 0;
    		gd->bd->bi_dram[i].size = 0;
    	}
    	
    	debug("DDR: Bank 0: start=0x%llx, size=0x%llx\n", 
    	      gd->bd->bi_dram[0].start, gd->bd->bi_dram[0].size);
    	ret = 0;
    #else
    	/* Use standard setup for other K3 platforms */
    	ret = fdtdec_setup_memory_banksize();
    	if (ret)
    		printf("Error setting up memory banksize. %d\n", ret);
    #endif
    
    	return ret;
    }
    
    c.

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    尊敬的 Yufeng:

    目前、DDR 控制器驱动程序不支持 DDR 器件检测。  如果可能、我将询问我们的 DDR 专家。