[参考译文] AM62A7：热启用 AM62A7 上的 DPI 显示

Root@am62axx-EVM：/opt/edgeai-gst-apps kmstest
连接器 0/@40：DPI-1
CRTC 0/@38：1280x720@79.24 76.782 1280/26/8/8/？ 720/8/2/3/？ 79 (79.24) 0x0 0x48
平面 0/@31：0、0-1280x720
FB 49 1280x720-XR24
按 ENTER 键退出

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
old mode 100644
new mode 100755
index 7f13934f98c2..ac6297b56f52
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -589,7 +589,6 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
if (!panel->ddc)
return -EPROBE_DEFER;
}
-
if (desc == &panel_dpi) {
/* Handle the generic panel-dpi binding */
err = panel_dpi_probe(dev, panel);
@@ -600,8 +599,9 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
panel_simple_parse_panel_timing_node(dev, panel, &dt);
}
-
+
connector_type = desc->connector_type;
+
/* Catch common mistakes for panels. */
switch (connector_type) {
case 0:
@@ -3083,33 +3083,47 @@ static const struct panel_desc netron_dy_e231732 = {
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
};

-static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = {
- .clock = 9000,
- .hdisplay = 480,
- .hsync_start = 480 + 2,
- .hsync_end = 480 + 2 + 41,
- .htotal = 480 + 2 + 41 + 2,
- .vdisplay = 272,
- .vsync_start = 272 + 2,
- .vsync_end = 272 + 2 + 10,
- .vtotal = 272 + 2 + 10 + 2,
- .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+// static const struct drm_display_mode boe_av069hdt_a80_2dp0_mode = {
+// .clock = 9000,
+// .hdisplay = 480,
+// .hsync_start = 480 + 2,
+// .hsync_end = 480 + 2 + 41,
+// .htotal = 480 + 2 + 41 + 2,
+// .vdisplay = 272,
+// .vsync_start = 272 + 2,
+// .vsync_end = 272 + 2 + 10,
+// .vtotal = 272 + 2 + 10 + 2,
+// .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+// };
+
+static const struct drm_display_mode boe_av069hdt_a80_2dp0_mode = {
+ .clock = 76782,
+ .hdisplay = 1280,
+ .hsync_start = 1280 + 26,
+ .hsync_end = 1280 + 26 + 8,
+ .htotal = 1322,
+ .vdisplay = 720,
+ .vsync_start = 720 + 8,
+ .vsync_end = 720 + 8 + 2,
+ .vtotal = 733,
+ .flags = 0,
};

-static const struct panel_desc newhaven_nhd_43_480272ef_atxl = {
- .modes = &newhaven_nhd_43_480272ef_atxl_mode,
+static const struct panel_desc boe_av069hdt_a80_2dp0 = {
+ .modes = &boe_av069hdt_a80_2dp0_mode,
.num_modes = 1,
.bpc = 8,
.size = {
- .width = 95,
- .height = 54,
+ .width = 154,
+ .height = 85,
},
- .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
- .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE |
- DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+ .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
.connector_type = DRM_MODE_CONNECTOR_DPI,
};

+
+
static const struct display_timing nlt_nl192108ac18_02d_timing = {
.pixelclock = { 130000000, 148350000, 163000000 },
.hactive = { 1920, 1920, 1920 },
@@ -4504,8 +4518,8 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "netron-dy,e231732",
.data = &netron_dy_e231732,
}, {
- .compatible = "newhaven,nhd-4.3-480272ef-atxl",
- .data = &newhaven_nhd_43_480272ef_atxl,
+ .compatible = "boe,AV069HDT-A80-2DP0",
+ .data = &boe_av069hdt_a80_2dp0,
}, {
.compatible = "nlt,nl192108ac18-02d",
.data = &nlt_nl192108ac18_02d,







diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
old mode 100644
new mode 100755
index 1da8aa7f2e29..e47ad8320ef0
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -19,7 +19,7 @@ / {
aliases {
serial0 = &wkup_uart0;
serial2 = &main_uart0;
- serial3 = &main_uart1;
+ serial5 = &main_uart5;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
ethernet0 = &cpsw_port1;
@@ -30,6 +30,7 @@ aliases {

chosen {
stdout-path = "serial2:115200n8";
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 loglevel=4 root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait";
};

memory@80000000 {
@@ -214,52 +215,17 @@ led-0 {
};
};

- tlv320_mclk: clk-0 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <12288000>;
- };

- hdmi0: connector-hdmi {
- compatible = "hdmi-connector";
- label = "hdmi";
- type = "a";
+ panel {
+ compatible = "boe,AV069HDT-A80-2DP0";

- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&sii9022_out>;
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dpi1_out>;
+ };
};
- };
- };
-
- codec_audio: sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "AM62Ax-SKEVM";
- simple-audio-card,widgets =
- "Headphone", "Headphone Jack",
- "Line", "Line In",
- "Microphone", "Microphone Jack";
- simple-audio-card,routing =
- "Headphone Jack", "HPLOUT",
- "Headphone Jack", "HPROUT",
- "LINE1L", "Line In",
- "LINE1R", "Line In",
- "MIC3R", "Microphone Jack",
- "Microphone Jack", "Mic Bias";
- simple-audio-card,format = "dsp_b";
- simple-audio-card,bitclock-master = <&sound_master>;
- simple-audio-card,frame-master = <&sound_master>;
- simple-audio-card,bitclock-inversion;
-
- simple-audio-card,cpu {
- sound-dai = <&mcasp1>;
- };
-
- sound_master: simple-audio-card,codec {
- sound-dai = <&tlv320aic3106>;
- clocks = <&tlv320_mclk>;
- };
};
+
};

&mcu_pmx0 {
@@ -330,6 +296,13 @@ AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */
>;
};

+ main_uart5_pins_default: main-uart5-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x01d8, PIN_INPUT, 1) /* (B17) MCAN0_TX.UART5_RXD */
+ AM62AX_IOPAD(0x01dc, PIN_OUTPUT, 1) /* (C18) MCAN0_RX.UART5_TXD */
+ >;
+ };
+
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
@@ -605,68 +578,6 @@ exp1: gpio@22 {
"PD_I2C_IRQ", "IO_EXP_TEST_LED";
};

- tlv320aic3106: audio-codec@1b {
- #sound-dai-cells = <0>;
- compatible = "ti,tlv320aic3106";
- reg = <0x1b>;
- ai3x-micbias-vg = <1>; /* 2.0V */
-
- /* Regulators */
- AVDD-supply = <&vcc_3v3_sys>;
- IOVDD-supply = <&vcc_3v3_sys>;
- DRVDD-supply = <&vcc_3v3_sys>;
- DVDD-supply = <&buck5>;
- };
-
- exp2: gpio@23 {
- compatible = "ti,tca6424";
- reg = <0x23>;
- gpio-controller;
- #gpio-cells = <2>;
-
- gpio-line-names = "", "",
- "", "",
- "", "",
- "", "",
- "WL_LT_EN", "CSI_RSTz",
- "", "",
- "", "",
- "", "",
- "SPI0_FET_SEL", "SPI0_FET_OE",
- "RGMII2_BRD_CONN_DET", "CSI_SEL2",
- "CSI_EN", "AUTO_100M_1000M_CONFIG",
- "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST";
- };
-
- sii9022: bridge-hdmi@3b {
- compatible = "sil,sii9022";
- reg = <0x3b>;
- interrupt-parent = <&exp1>;
- interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
- #sound-dai-cells = <0>;
- sil,i2s-data-lanes = < 0 >;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- sii9022_in: endpoint {
- remote-endpoint = <&dpi1_out>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- sii9022_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
- };
- };
- };
};

&main_i2c2 {
@@ -723,6 +634,14 @@ &main_uart1 {
status = "reserved";
};

+&main_uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart5_pins_default>;
+ status = "okay";
+};
+
+
+
/* Main Timer2 is used by C7x DSP */
&main_timer2 {
status = "reserved";
@@ -819,7 +738,8 @@ hdmi0_dss: port@1 {
reg = <1>;

dpi1_out: endpoint {
- remote-endpoint = <&sii9022_in>;
+
+ remote-endpoint = <&panel_in>;
};
};
};
@@ -948,3 +868,66 @@ partition@7fc0000 {
};
};
};
+
+
+
+
+&{/} {
+ clk_imx219_fixed: imx219-xclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&main_i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ camera@36 {
+ compatible = "sony,imx219";
+ reg = <0x36>;
+
+ clocks = <&clk_imx219_fixed>;
+ clock-names = "xclk";
+ reset-gpios = <&exp1 13 GPIO_ACTIVE_HIGH>;
+ port {
+ csi2_cam0: endpoint {
+ remote-endpoint = <&csi2rx0_in_sensor>;
+ link-frequencies = /bits/ 64 <800000000>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx0_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam0>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+
+&dphy0 {
+ status = "okay";
+};