[参考译文] SK-TDA4VM：在 TIDL 工具中使用 DEBUG_LEVEL=3 时、执行挂起

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1570674/sk-tda4vm-execution-hangs-when-using-debug_level-3-in-tidl-tools

工具/软件：

您好、

我当时尝试在 SK-TDA4VM 上为 DL 模型生成跟踪、但执行挂起、不得不终止该过程。

为了确保问题与我的脚本无关、我运行了

/opt/edgeai-tidl-tools/examples/osrt_python/ort# python3 onnxrt_ep.py -m cl-ort-resnet18-v1

并在 /opt/edgeai-tidl-tools/examples/osrt_python/common_utils.py 中将 DEBUG_LEVEL 更改为 3

这也会挂起。 以下是命令的输出

root@tda4vm-sk:/opt/edgeai-tidl-tools/examples/osrt_python/ort# python3 onnxrt_ep.py -m cl-ort-resnet18-v1
Available execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']

Running 1 Models - ['cl-ort-resnet18-v1']


Running_Model :  cl-ort-resnet18-v1  

libtidl_onnxrt_EP loaded 0x1246f120 
artifacts_folder                                = ../../../model-artifacts//cl-ort-resnet18-v1/artifacts 
debug_level                                     = 3 
target_priority                                 = 0 
max_pre_empt_delay                              = 340282346638528859811704183484516925440.000000 
Final number of subgraphs created are : 1, - Offloaded Nodes - 52, Total Nodes - 52 
In TIDL_createStateInfer 
Compute on node : TIDLExecutionProvider_TIDL_0_0
************ in TIDL_subgraphRtCreate ************ 
 APP: Init ... !!!
  1013.725896 s: MEM: Init ... !!!
  1013.725943 s: MEM: Initialized DMA HEAP (fd=5) !!!
  1013.726091 s: MEM: Init ... Done !!!
  1013.726114 s: IPC: Init ... !!!
  1013.783908 s: IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
  1013.790888 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
  1013.790988 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
  1013.790999 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
  1013.791009 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
  1013.791544 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
  1013.791659 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
  1013.791760 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
  1013.791852 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
  1013.791865 s:  VX_ZONE_INFO: [tivxInitLocal:202] Initialization Done !!!
  1013.791881 s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
************ TIDL_subgraphRtCreate done ************ 
 *******   In TIDL_subgraphRtInvoke  ******** 

我需要使用跟踪来比较 Docker 内主机仿真模式下运行的模型与在电路板上运行的模型之间的不匹配情况。

我遵循 TIDL 存储库中的说明。

提前感谢您、

Charanjit