Other Parts Discussed in Thread: INA226
器件型号: DRA829V
Thread: DRA829、 INA226 中讨论的其他器件
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乍一看、cpufreq 子系统似乎正在使用 OPP、但使用 k3conf 验证频率表明实际 CPU 频率没有变化。 如果我设置按需调节器 cpuinfo_cur_freq 和 scaling_cur_freq show 250MHz、但 k3conf dump processor 显示 2GHz。
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散热子系统(CPU 作为被动冷却设备)会更改通过 k3conf 验证的 CPU 频率、但温度、功耗和性能不会发生变化。 我将警报跳变点设置为 35°C、因此 CPU 设置为 250MHz(使用 k3conf 进行验证)、并且在 corremark 和 stress-ng 基准测试中仍然获得与 2GHz 相同的性能。 我们的空闲 CPU 温度约为 48°C、在基准测试/应力测试期间、温度会升高到~52°C。
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi
index 927f7614ae7a..7b308c18f148 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi
@@ -26,12 +26,25 @@ mpu_thermal: mpu-thermal {
thermal-sensors = <&wkup_vtm0 1>;
trips {
+ mpu_alert: mpu-alert {
+ temperature = <65000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "passive";
+ };
+
mpu_crit: mpu-crit {
temperature = <125000>; /* milliCelsius */
hysteresis = <2000>; /* milliCelsius */
type = "critical";
};
};
+
+ cpu_cooling_maps: cooling-maps {
+ map0 {
+ trip = <&mpu_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
c7x_thermal: c7x-thermal {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
index 5a72c518ceb6..e2acce5cda42 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
@@ -48,6 +48,10 @@ cpu0: cpu@0 {
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&L2_0>;
+ clocks = <&k3_clks 202 2>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu1: cpu@1 {
@@ -62,9 +66,40 @@ cpu1: cpu@1 {
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&L2_0>;
+ clocks = <&k3_clks 203 0>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
};
};
+ cpu0_opp_table: opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp6-2000000000 {
+ opp-hz = /bits/ 64 <2000000000>;
+ clock-latency-ns = <300000>;
+ };
+
+ opp4-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ clock-latency-ns = <300000>;
+ };
+
+ opp2-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ clock-latency-ns = <300000>;
+ };
+
+ opp1-250000000 {
+ opp-hz = /bits/ 64 <250000000>;
+ clock-latency-ns = <300000>;
+ };
+ };
+
+
+
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
