[参考译文] AM5729：BeagleBone AI I2S 输入 TIDA-01454

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Other Parts Discussed in Thread: AM5729, PCM5102A

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https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1073588/am5729-beaglebone-ai-i2s-input-tida-01454

部件号：AM5729
“线程”中讨论的其它部件：BeagleBone， PCM5102A， test

我希望能够在我的 BeagleBone AI (AM5729)中记录来自 TIDA-01454 CMB 的信息，因此我遵循本指南时有一些不同，因为它是 BeagleBone AI，而不是 BeagleBone Black。我成功地添加和修改了 pcm5102a.c 编解码器，因此在使用 arecord-l 命令时，声卡已注册并显示。我还配置了具有 I2C 的 CMB，因此蓝色 LED 亮起。但是，当我尝试录制测试文件时，我收到以下错误：

ebian@beaglebone:/var/lib/cloud9$ arecord --device="hw:1,0" -d 20 -f S16_LE test.wav
Recording WAVE 'test.wav' : Signed 16 bit Little Endian, Rate 8000 Hz, Mono
arecord: pcm_read:2145: read error: Input/output error

我认为这可能是 ALSA 配置问题或 DTS 文件的问题(因为我无法使用指南中使用的文件)，所以我保留这两个文件以防需要它们。但这可能是任何其他问题。

请提前感谢您的参与。

米克尔

asound.conf：

pcm.onboard{
    type hw
    card 0
}
ctl.onboard {
    type hw
    card 0
}

### Dsnoop splited channels
pcm.onboard_capture_left {
     type dsnoop
     ipc_key 32
     slave {
         pcm "onboard"
         channels 2
	 rate 48000
    	 format S32_LE
     }
     bindings.0  0
}
pcm.onboard_playback_left {
     type dmix
     ipc_key 33
     slave {
         pcm "onboard"
         channels 2
     }
     bindings.0  0
}


pcm.onboard_capture_right {
     type dsnoop
     ipc_key 32
     slave {
         pcm "onboard"
         channels 2
	 rate 48000
	 format S32_LE
     }
     bindings.0  1
}
pcm.onboard_playback_right {
     type dmix
     ipc_key 33
     slave {
         pcm "onboard"
         channels 2
     }
     bindings.0  1
}


### PLUGS ##
### used with darkice
### device = plug:plug_onboard_left
pcm.plug_onboard_capture_left{
        type plug
        slave.pcm "onboard_capture_left"
}
pcm.plug_onboard_playback_left{
        type plug
        slave.pcm "onboard_playback_left"
}

pcm.!default {
    type asym
    playback.pcm "plug_onboard_playback_left"
    capture.pcm "plug_onboard_capture_left"
}

DTS 文件：

#include "am5729-beagleboneai.dts"  
// make it easy to determine which dtb you're currently running on  
// (via /proc/device-tree/chosen/)  
/ {  
 chosen {  
  base_dtb = "am5729-beagleboneai-custom.dts";  
  base_dtb_timestamp = __TIMESTAMP__;  
 };  
};  
// eventually these should be available in a header  
#define P9_14  (0x3400 + 4 * 107)  
#define P9_16  (0x3400 + 4 * 108)  
#define P9_19a (0x3400 + 4 * 16)  
#define P9_19b (0x3400 + 4 * 95)  
#define P9_20a (0x3400 + 4 * 17)  
#define P9_20b (0x3400 + 4 * 94)  
#define P9_12  (0x3400 + 4 * 171) 
#define P9_27b (0x3400 + 4 * 172)
#define P9_18b (0x3400 + 4 * 173)
// 
/{

pcm5102a: pcm5102a {
   #sound-dai-cells = <0>;
   compatible = "ti,pcm5102a";
   status = "okay";
};


sound {compatible = "simple-audio-card";
        simple-audio-card,format = "i2s";
        simple-audio-card,name = "PCM5102a";
        simple-audio-card,bitclock-master = <&sound1_master>;
        simple-audio-card,frame-master = <&sound1_master>;
        simple-audio-card,bitclock-inversion;
        
        
        simple-audio-card,cpu {
                sound-dai = <&mcasp1>;
        };
        sound1_master: simple-audio-card,codec {
            #sound-dai-cells = <0>;
            sound-dai = <&pcm5102a>;
            
        };
      };
};

// enable i2c-3 on P9.19 (scl) + P9.20 (sda)  
&i2c4 {  
 status = "okay";  
 clock-frequency = <400000>;  
 pinctrl-names = "default";  
 pinctrl-0 = <&i2c4_pins>;  

};

&mcasp1 {
    #sound-dai-cells = <0>;
    status = "okay";
    pinctrl-names = "default";  
    pinctrl-0 = <&mcasp1_pins>;  
    op-mode = <0>;    /* MCASP_IIS_MODE */
    tdm-slots = <2>;
    num-serializer = <4>;
    /* 16 serializers */
    serial-dir = < /* 1 TX 2 RX 0 unused */
             2 0 0 0
        >;
    rx-num-evt = <1>;
    tx-num-evt = <1>;
};  




&dra7_pmx_core {  
 i2c4_pins: i2c4 {  
  pinctrl-single,pins = <  
   DRA7XX_CORE_IOPAD( P9_19a, PIN_INPUT_PULLUP | MUX_MODE7  )  // scl  
   DRA7XX_CORE_IOPAD( P9_19b, PIN_INPUT_PULLUP | MUX_MODE14 )  // (shared pin)  
   DRA7XX_CORE_IOPAD( P9_20a, PIN_INPUT_PULLUP | MUX_MODE7  )  // sda  
   DRA7XX_CORE_IOPAD( P9_20b, PIN_INPUT_PULLUP | MUX_MODE14 )  // (shared pin)  
  >;  
 };
 mcasp1_pins: mcasp1_pins {
  pinctrl-single,pins = <
   DRA7XX_CORE_IOPAD(P9_12, PIN_INPUT_PULLDOWN | MUX_MODE0) // 12 0  mcasp1_aclkr  BIT CLOCK      BCLK
   DRA7XX_CORE_IOPAD(P9_27b, PIN_INPUT | MUX_MODE0) // 27b 0  mcasp1_fsr    FRAME SYNC            LRCLK
   DRA7XX_CORE_IOPAD(P9_18b, PIN_INPUT | MUX_MODE0) // 18b 0  mcasp1_axr0   I2S INPUT             DATA
  >;
 };  
};  
// enable pwm-2 on P9.14 (out-A) + P9.16 (out-B)  
&epwmss2 {  
 status = "okay";  
};  
&ehrpwm2 {  
 status = "okay";  
 pinctrl-names = "default";  
 pinctrl-0 = <&ehrpwm2_pins>;  
};  
&dra7_pmx_core {  
 ehrpwm2_pins: ehrpwm2 {  
  pinctrl-single,pins = <  
   DRA7XX_CORE_IOPAD( P9_14, PIN_OUTPUT_PULLDOWN | MUX_MODE10 )  // out A  
   DRA7XX_CORE_IOPAD( P9_16, PIN_OUTPUT_PULLDOWN | MUX_MODE10 )  // out B  
  >;  
 };  
};  
  
// Here's the obnoxious part: since u-boot doesn't have same pin defaults yet, all pins not  
// explicitly setup above should be overridden here.  This will eventually no longer be needed.  
&cape_pins_default {  
 pinctrl-single,pins = <  
  DRA7XX_CORE_IOPAD( 0x372C, PIN_INPUT_PULLDOWN | MUX_MODE15 ) // P9.11a (no gpio)  
  DRA7XX_CORE_IOPAD( 0x3620, PIN_INPUT          | MUX_MODE14 ) // P9.11b  
  //DRA7XX_CORE_IOPAD( 0x36AC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.12  
  DRA7XX_CORE_IOPAD( 0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15 ) // P9.13  (no gpio)  
 // DRA7XX_CORE_IOPAD( 0x35AC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.14  
  DRA7XX_CORE_IOPAD( 0x3514, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.15  
 // DRA7XX_CORE_IOPAD( 0x35B0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.16  
  DRA7XX_CORE_IOPAD( 0x37CC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.17a  
  DRA7XX_CORE_IOPAD( 0x36B8, PIN_INPUT          | MUX_MODE14 ) // P9.17b  
  DRA7XX_CORE_IOPAD( 0x37C8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.18a  
  //DRA7XX_CORE_IOPAD( 0x36B4, PIN_INPUT          | MUX_MODE14 ) // P9.18b  
 // DRA7XX_CORE_IOPAD( 0x3440, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P9.19a  
 // DRA7XX_CORE_IOPAD( 0x357C, PIN_INPUT          | MUX_MODE14 ) // P9.19b  
 // DRA7XX_CORE_IOPAD( 0x3444, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P9.20a  
 // DRA7XX_CORE_IOPAD( 0x3578, PIN_INPUT          | MUX_MODE14 ) // P9.20b  
  DRA7XX_CORE_IOPAD( 0x34F0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.21a  
  DRA7XX_CORE_IOPAD( 0x37C4, PIN_INPUT          | MUX_MODE14 ) // P9.21b  
  DRA7XX_CORE_IOPAD( 0x369C, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.22a  
  DRA7XX_CORE_IOPAD( 0x37C0, PIN_INPUT          | MUX_MODE14 ) // P9.22b  
  DRA7XX_CORE_IOPAD( 0x37B4, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P9.23  
  DRA7XX_CORE_IOPAD( 0x368C, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P9.24  
  DRA7XX_CORE_IOPAD( 0x3694, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.25  
  DRA7XX_CORE_IOPAD( 0x3688, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P9.26a  
  DRA7XX_CORE_IOPAD( 0x3544, PIN_INPUT          | MUX_MODE14 ) // P9.26b  
  DRA7XX_CORE_IOPAD( 0x35A0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.27a  
  //DRA7XX_CORE_IOPAD( 0x36B0, PIN_INPUT          | MUX_MODE14 ) // P9.27b  
  DRA7XX_CORE_IOPAD( 0x36E0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.28  
  DRA7XX_CORE_IOPAD( 0x36D8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.29a  
  DRA7XX_CORE_IOPAD( 0x36A8, PIN_INPUT          | MUX_MODE14 ) // P9.29b  
  DRA7XX_CORE_IOPAD( 0x36DC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.30  
  DRA7XX_CORE_IOPAD( 0x36D4, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.31a  
  DRA7XX_CORE_IOPAD( 0x36A4, PIN_INPUT          | MUX_MODE14 ) // P9.31b  
  DRA7XX_CORE_IOPAD( 0x36A0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.41a  
  DRA7XX_CORE_IOPAD( 0x3580, PIN_INPUT          | MUX_MODE14 ) // P9.41b  
  DRA7XX_CORE_IOPAD( 0x36E4, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P9.42a  
  DRA7XX_CORE_IOPAD( 0x359C, PIN_INPUT          | MUX_MODE14 ) // P9.42b  
  DRA7XX_CORE_IOPAD( 0x379C, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.3  
  DRA7XX_CORE_IOPAD( 0x37A0, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.4  
  DRA7XX_CORE_IOPAD( 0x378C, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.5  
  DRA7XX_CORE_IOPAD( 0x3790, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.6  
  DRA7XX_CORE_IOPAD( 0x36EC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.7  
  DRA7XX_CORE_IOPAD( 0x36F0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.8  
  DRA7XX_CORE_IOPAD( 0x3698, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.9  
  DRA7XX_CORE_IOPAD( 0x36E8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.10  
  DRA7XX_CORE_IOPAD( 0x3510, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.11  
  DRA7XX_CORE_IOPAD( 0x350C, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.12  
  DRA7XX_CORE_IOPAD( 0x3590, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.13  
  DRA7XX_CORE_IOPAD( 0x3598, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.14  
  DRA7XX_CORE_IOPAD( 0x3570, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.15a  
  DRA7XX_CORE_IOPAD( 0x35B4, PIN_INPUT          | MUX_MODE14 ) // P8.15b  
  DRA7XX_CORE_IOPAD( 0x35BC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.16  
  DRA7XX_CORE_IOPAD( 0x3624, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.17  
  DRA7XX_CORE_IOPAD( 0x3588, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.18  
  DRA7XX_CORE_IOPAD( 0x358C, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.19  
  DRA7XX_CORE_IOPAD( 0x3780, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.20  
  DRA7XX_CORE_IOPAD( 0x377C, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.21  
  DRA7XX_CORE_IOPAD( 0x3798, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.22  
  DRA7XX_CORE_IOPAD( 0x3794, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.23  
  DRA7XX_CORE_IOPAD( 0x3788, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.24  
  DRA7XX_CORE_IOPAD( 0x3784, PIN_INPUT_PULLUP   | MUX_MODE14 ) // P8.25  
  DRA7XX_CORE_IOPAD( 0x35B8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.26  
  DRA7XX_CORE_IOPAD( 0x35D8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.27a  
  DRA7XX_CORE_IOPAD( 0x3628, PIN_INPUT          | MUX_MODE14 ) // P8.27b  
  DRA7XX_CORE_IOPAD( 0x35C8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.28a  
  DRA7XX_CORE_IOPAD( 0x362C, PIN_INPUT          | MUX_MODE14 ) // P8.28b  
  DRA7XX_CORE_IOPAD( 0x35D4, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.29a  
  DRA7XX_CORE_IOPAD( 0x3630, PIN_INPUT          | MUX_MODE14 ) // P8.29b  
  DRA7XX_CORE_IOPAD( 0x35CC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.30a  
  DRA7XX_CORE_IOPAD( 0x3634, PIN_INPUT          | MUX_MODE14 ) // P8.30b  
  DRA7XX_CORE_IOPAD( 0x3614, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.31a  
  DRA7XX_CORE_IOPAD( 0x373C, PIN_INPUT_PULLDOWN | MUX_MODE15 ) // P8.31b (no gpio)  
  DRA7XX_CORE_IOPAD( 0x3618, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.32a  
  DRA7XX_CORE_IOPAD( 0x3740, PIN_INPUT_PULLDOWN | MUX_MODE15 ) // P8.32b (no gpio)  
  DRA7XX_CORE_IOPAD( 0x3610, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.33a  
  DRA7XX_CORE_IOPAD( 0x34E8, PIN_INPUT          | MUX_MODE14 ) // P8.33b  
  DRA7XX_CORE_IOPAD( 0x3608, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.34a  
  DRA7XX_CORE_IOPAD( 0x3564, PIN_INPUT          | MUX_MODE14 ) // P8.34b  
  DRA7XX_CORE_IOPAD( 0x360C, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.35a  
  DRA7XX_CORE_IOPAD( 0x34E4, PIN_INPUT          | MUX_MODE14 ) // P8.35b  
  DRA7XX_CORE_IOPAD( 0x3604, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.36a  
  DRA7XX_CORE_IOPAD( 0x3568, PIN_INPUT          | MUX_MODE14 ) // P8.36b  
  DRA7XX_CORE_IOPAD( 0x35FC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.37a  
  DRA7XX_CORE_IOPAD( 0x3738, PIN_INPUT_PULLDOWN | MUX_MODE15 ) // P8.37b (no gpio)  
  DRA7XX_CORE_IOPAD( 0x3600, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.38a  
  DRA7XX_CORE_IOPAD( 0x3734, PIN_INPUT_PULLDOWN | MUX_MODE15 ) // P8.38b (no gpio)  
  DRA7XX_CORE_IOPAD( 0x35F4, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.39  
  DRA7XX_CORE_IOPAD( 0x35F8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.40  
  DRA7XX_CORE_IOPAD( 0x35EC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.41  
  DRA7XX_CORE_IOPAD( 0x35F0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.42  
  DRA7XX_CORE_IOPAD( 0x35E4, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.43  
  DRA7XX_CORE_IOPAD( 0x35E8, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.44  
  DRA7XX_CORE_IOPAD( 0x35DC, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.45a  
  DRA7XX_CORE_IOPAD( 0x361C, PIN_INPUT          | MUX_MODE14 ) // P8.45b  
  DRA7XX_CORE_IOPAD( 0x35E0, PIN_INPUT_PULLDOWN | MUX_MODE14 ) // P8.46a  
  DRA7XX_CORE_IOPAD( 0x3638, PIN_INPUT          | MUX_MODE14 ) // P8.46b  
 >;  
};

2 年多前

0 admin 2 年多前

TI__Guru**** 1125150 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

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[参考译文] AM5729：BeagleBone AI I2S 输入 TIDA-01454