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[参考译文] TDA4VM：TDA4 DSI 接口显示失败、VISION-APP 运行./run_app_single_cam.sh。

admin
Guru**** 2779905 points
请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dsi-interface-display-failed-with-vision-app-run-run_app_single_cam-sh

器件型号：TDA4VM

大家好、TI 支持团队。

PSDKRA8.1和 PSDKLA8.1以及定制板、PSDKLA8.1不支持输出 DSI 驱动器。 因此、我们选择使用 DSI 接口来显示从 RTOS 中的摄像头获取的 iamge (1920x1080)。

当前 目标是 实现一个可显示的屏幕。

2.最终目标是使用 TAD4输出超级帧到串行器，然后串行器负责将两 个显示面板的图像(2*1920 x 1080)分为两个相同的大小(1920 x 1080)。

1步失败。  run_app_single_cam.sh  

下面显示了我对文件的修改：

e2e.ti.com/.../DSI.diff

DSI 使用4通道、 由于串行器(最大通道速率2.5G/通道)可以自行调整通道速率、因此我们使用默认的 dphyTxOpDiv = 02 <1.24Gbps - 630Mbps> 。

格式：  

1.1920 * 1080 * 60 * 3 * 8 * 1.2 / 4 = 895.795Mbps/通道  

   ->dphyTxRate  =(0xE << 0)|(0xE << 5)>；/0x1CE

2. dpyTxFbDiv  =((通道速率* 2 * OpDiv * Ipdiv) /(19.2MHz))

   ->895.795   * 2 * 2 * 2 / 19.2 = 375

dsiObj->dphyTxIpDiv = 0x2；
dsiObj->dphyTxOpDiv = 0x2；
dsiObj->dphyTxFbDiv = 0x177；/0x178
dsiObj->dphyTxRate = 0x1CE；
dsiObj->cfgDsiTx.numOfLanes = 0x4u；//0x2u；
dsiObj->privDSiTx.numOfLanes = 0x4u；//0x2u

检查上述参数是否设置正确？

是否 还需要修改任何代码？

请帮助我一步解决这个问题。

此致

墨菲。

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    您能不能帮助我们了解单个摄像头应用中的故障是什么？  

    应用上述补丁后、您实际上不需要计算 和设置这些参数。 您可能只需要通过应用程序设置通道数和通道速度的 Kbps 参数。 驱动器随后将负责计算这些参数。

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    感谢您的回复。

    应用了上述补丁。 因此、只需从应用中修改通道数量和通道速度。 您能为我提供代码位置以及如何修改代码的指导吗？

    此致、

    穆菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    文件  ti-processor-sdk-rtos-j721e-evm-08_01_00_13\vision_apps\utils\dss\src\app_dctrl.c 中的 API appDctrlSetdsParamsCmd 设置 驱动程序中的 DSI 参数。 请在此处更新。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    你好，Brejish

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failure-with -vision-app-run_app_single_quote-sh"]以下内容显示了我对文件的修改：[/cam]

    1.上述补丁 已在  ti-processor-sdk-rtos-j721e-evm-08_00_00_12\vision_apps\utils\dss\src\app_dss_defaults.c 中修改 dsParams.num_lanes = 4U；//2U 可以满足4通道要求。

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4116349#4116349"]ti-processor-sdk-display-failure-we-run_app_run_app_sble_prob_c\tc_dc\trapps\tc\trlapps\tc\tc\tc\trlapps\j01_c\trapps\trl_trl_c\e\trab_c\

    但是对于双校验编号 OfLanes、也适用于以下修改中的 Tx 速率 。

         DSI_params.numOfLanes = 4U；//PRMs->num_Lanes；
         DSI_params.laneSpeedInKbps = 900u；//对于900Mbsp/通道

    显示面板上的 RUN (运行)/run_app_single_cam.sh 仍然没有发生任何变化  

    请检查日志： 

    root@ti-j72xx:~#
root@ti-j72xx:~# cd /opt/vision_apps/
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps# source ./vision_apps_init.sh
root@ti-j72xx:/opt/vision_apps# [MCU2_0]      3.324347 s: CIO: Init ... Done !!!
[MCU2_0]      3.324421 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]      3.324461 s: APP: Init ... !!!
[MCU2_0]      3.324489 s: SCICLIENT: Init ... !!!
[MCU2_0]      3.324697 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[MCU2_0]      3.324744 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_0]      3.324776 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]      3.324812 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      3.324838 s: UDMA: Init ... !!!
[MCU2_0]      3.325917 s: UDMA: Init ... Done !!!
[MCU2_0]      3.325982 s: MEM: Init ... !!!
[MCU2_0]      3.326025 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]      3.326097 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
[MCU2_0]      3.326158 s: MEM: Init ... Done !!!
[MCU2_0]      3.326182 s: IPC: Init ... !!!
[MCU2_0]      3.326239 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_0]      3.326284 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     14.829239 s: IPC: HLOS is ready !!!
[MCU2_0]     14.844246 s: IPC: Init ... Done !!!
[MCU2_0]     14.844316 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     14.849487 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     14.849713 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     14.851218 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     14.851281 s: FVID2: Init ... !!!
[MCU2_0]     14.851354 s: FVID2: Init ... Done !!!
[MCU2_0]     14.851404 s: DSS: Init ... !!!
[MCU2_0]     14.851433 s: DSS: Display type is DSI !!!
[MCU2_0]     14.851461 s: DSS: M2M Path is enabled !!!
[MCU2_0]     14.851490 s: DSS: SoC init ... !!!
[MCU2_0]     14.851515 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]     14.852078 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.852120 s: SCICLIENT: Sciclient_pmSetModuleState module=150 state=2
[MCU2_0]     14.852496 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.852530 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
[MCU2_0]     14.852809 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.852843 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11
[MCU2_0]     14.853240 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     14.853281 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=9 freq=143040000
[MCU2_0]     14.854536 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     14.854576 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=9 state=2 flag=0
[MCU2_0]     14.855054 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     14.855095 s: DSS: SoC init ... Done !!!
[MCU2_0]     14.858353 s: DSS: Init ... Done !!!
[MCU2_0]     14.858419 s: VHWA: VPAC Init ... !!!
[MCU2_0]     14.858451 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
[MCU2_0]     14.858772 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.858813 s: VHWA: LDC Init ... !!!
[MCU2_0]     14.863203 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     14.863264 s: VHWA: MSC Init ... !!!
[MCU2_0]     14.872893 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     14.872958 s: VHWA: NF Init ... !!!
[MCU2_0]     14.874424 s: VHWA: NF Init ... Done !!!
[MCU2_0]     14.874484 s: VHWA: VISS Init ... !!!
[MCU2_0]     14.883556 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     14.883623 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     14.883672 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     14.883700 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     14.883724 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     14.884922 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target IPU1-0
[MCU2_0]     14.885160 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_NF
[MCU2_0]     14.885387 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_LDC1
[MCU2_0]     14.885610 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_MSC1
[MCU2_0]     14.885829 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_MSC2
[MCU2_0]     14.886159 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_VISS1
[MCU2_0]     14.886430 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE1
[MCU2_0]     14.886681 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE2
[MCU2_0]     14.886947 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DISPLAY1
[MCU2_0]     14.887211 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DISPLAY2
[MCU2_0]     14.887444 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CSITX
[MCU2_0]     14.887711 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE3
[MCU2_0]     14.887978 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE4
[MCU2_0]     14.888243 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE5
[MCU2_0]     14.888499 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE6
[MCU2_0]     14.888744 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE7
[MCU2_0]     14.889015 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE8
[MCU2_0]     14.889269 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M1
[MCU2_0]     14.889503 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M2
[MCU2_0]     14.889731 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M3
[MCU2_0]     14.889965 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M4
[MCU2_0]     14.890022 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]     14.890059 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     14.905682 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     14.905738 s: CSI2RX: Init ... !!!
[MCU2_0]     14.905764 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     14.905879 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.905920 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
[MCU2_0]     14.906035 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.906072 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
[MCU2_0]     14.906165 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.906199 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
[MCU2_0]     14.906271 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.906303 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
[MCU2_0]     14.906372 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     14.907024 s: CSI2RX: Init ... Done !!!
[MCU2_0]     14.907084 s: ISS: Init ... !!!
[MCU2_0]     14.907132 s: IssSensor_Sensor_Module_Max96705_Init init
[MCU2_0]     14.907174 s: IssSensor_Sensor_Module_Max96715_Init init
[MCU2_0]     14.907211 s: IssSensor_Sensor_Module_Max96717_Init init
[MCU2_0]     14.907247 s: IssSensor_Sensor_Module_Max9295A_Init init
[MCU2_0]     14.907283 s: IssSensor_Sensor_Module_Max9295A_APA_AR0231_Init init
[MCU2_0]     14.907320 s: IssSensor_Init ... Done !!!
[MCU2_0]     14.907412 s: vissRemoteServer_Init ... Done !!!
[MCU2_0]     14.907480 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]     14.907513 s: UDMA Copy: Init ... !!!
[MCU2_0]     14.908989 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     14.909091 s: APP: Init ... Done !!!
[MCU2_0]     14.909130 s: APP: Run ... !!!
[MCU2_0]     14.909157 s: IPC: Starting echo test ...
[MCU2_0]     14.911796 s: APP: Run ... Done !!!
[MCU2_0]     14.913317 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]     14.913437 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]     14.913536 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_0]     14.913627 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_1]      3.344065 s: CIO: Init ... Done !!!
[MCU2_1]      3.344132 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]      3.344172 s: APP: Init ... !!!
[MCU2_1]      3.344195 s: SCICLIENT: Init ... !!!
[MCU2_1]      3.344402 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[MCU2_1]      3.344449 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_1]      3.344482 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]      3.344516 s: SCICLIENT: Init ... Done !!!
[MCU2_1]      3.344543 s: UDMA: Init ... !!!
[MCU2_1]      3.345637 s: UDMA: Init ... Done !!!
[MCU2_1]      3.345697 s: MEM: Init ... !!!
[MCU2_1]      3.345741 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]      3.345818 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!!
[MCU2_1]      3.345878 s: MEM: Init ... Done !!!
[MCU2_1]      3.345903 s: IPC: Init ... !!!
[MCU2_1]      3.345965 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_1]      3.346014 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     14.834359 s: IPC: HLOS is ready !!!
[MCU2_1]     14.849373 s: IPC: Init ... Done !!!
[MCU2_1]     14.849439 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_1]     14.849487 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_1]     14.849525 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     14.851258 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     14.851321 s: FVID2: Init ... !!!
[MCU2_1]     14.851391 s: FVID2: Init ... Done !!!
[MCU2_1]     14.851423 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     14.851451 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2
[MCU2_1]     14.851818 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     14.851858 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2
[MCU2_1]     14.852283 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     14.852316 s: VHWA: DOF Init ... !!!
[MCU2_1]     14.861675 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     14.861736 s: VHWA: SDE Init ... !!!
[MCU2_1]     14.864432 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     14.864493 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     14.864540 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     14.864570 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     14.864595 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     14.865757 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DMPAC_SDE
[MCU2_1]     14.865994 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DMPAC_DOF
[MCU2_1]     14.866216 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target IPU1-1
[MCU2_1]     14.866268 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     14.866305 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     14.866569 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     14.866607 s: UDMA Copy: Init ... !!!
[MCU2_1]     14.868856 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     14.868920 s: APP: Init ... Done !!!
[MCU2_1]     14.868952 s: APP: Run ... !!!
[MCU2_1]     14.868976 s: IPC: Starting echo test ...
[MCU2_1]     14.871528 s: APP: Run ... Done !!!
[MCU2_1]     14.872773 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_1]     14.872896 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_1]     14.872996 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_1]     14.912635 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
[C6x_1 ]      3.423511 s: CIO: Init ... Done !!!
[C6x_1 ]      3.423535 s: ### CPU Frequency = 1350000000 Hz
[C6x_1 ]      3.423546 s: APP: Init ... !!!
[C6x_1 ]      3.423553 s: SCICLIENT: Init ... !!!
[C6x_1 ]      3.423737 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C6x_1 ]      3.423748 s: SCICLIENT: DMSC FW revision 0x15
[C6x_1 ]      3.423757 s: SCICLIENT: DMSC FW ABI revision 3.1
[C6x_1 ]      3.423767 s: SCICLIENT: Init ... Done !!!
[C6x_1 ]      3.423776 s: UDMA: Init ... !!!
[C6x_1 ]      3.424926 s: UDMA: Init ... Done !!!
[C6x_1 ]      3.424949 s: MEM: Init ... !!!
[C6x_1 ]      3.424962 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!!
[C6x_1 ]      3.424979 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
[C6x_1 ]      3.424994 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ dd000000 of size 50331648 bytes !!!
[C6x_1 ]      3.425010 s: MEM: Init ... Done !!!
[C6x_1 ]      3.425018 s: IPC: Init ... !!!
[C6x_1 ]      3.425038 s: IPC: 6 CPUs participating in IPC !!!
[C6x_1 ]      3.425051 s: IPC: Waiting for HLOS to be ready ... !!!
[C6x_1 ]     14.767294 s: IPC: HLOS is ready !!!
[C6x_1 ]     14.770766 s: IPC: Init ... Done !!!
[C6x_1 ]     14.770793 s: APP: Syncing with 5 CPUs ... !!!
[C6x_1 ]     14.849486 s: APP: Syncing with 5 CPUs ... Done !!!
[C6x_1 ]     14.849499 s: REMOTE_SERVICE: Init ... !!!
[C6x_1 ]     14.850127 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_1 ]     14.850170 s:  VX_ZONE_INIT:Enabled
[C6x_1 ]     14.850180 s:  VX_ZONE_ERROR:Enabled
[C6x_1 ]     14.850190 s:  VX_ZONE_WARNING:Enabled
[C6x_1 ]     14.850960 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_1 ]     14.850975 s: APP: OpenVX Target kernel init ... !!!
[C6x_1 ]     14.851288 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_1 ]     14.851309 s: UDMA Copy: Init ... !!!
[C6x_1 ]     14.855443 s: UDMA Copy: Init ... Done !!!
[C6x_1 ]     14.855464 s: APP: Init ... Done !!!
[C6x_1 ]     14.856197 s: APP: Run ... !!!
[C6x_1 ]     14.856206 s: IPC: Starting echo test ...
[C6x_1 ]     14.857255 s: APP: Run ... Done !!!
[C6x_1 ]     14.857565 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P]
[C6x_1 ]     14.857885 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_1 ]     14.872119 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_1 ]     14.912483 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_2 ]      3.515088 s: CIO: Init ... Done !!!
[C6x_2 ]      3.515114 s: ### CPU Frequency = 1350000000 Hz
[C6x_2 ]      3.515125 s: APP: Init ... !!!
[C6x_2 ]      3.515133 s: SCICLIENT: Init ... !!!
[C6x_2 ]      3.515316 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C6x_2 ]      3.515328 s: SCICLIENT: DMSC FW revision 0x15
[C6x_2 ]      3.515337 s: SCICLIENT: DMSC FW ABI revision 3.1
[C6x_2 ]      3.515347 s: SCICLIENT: Init ... Done !!!
[C6x_2 ]      3.515356 s: UDMA: Init ... !!!
[C6x_2 ]      3.516507 s: UDMA: Init ... Done !!!
[C6x_2 ]      3.516530 s: MEM: Init ... !!!
[C6x_2 ]      3.516543 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e0000000 of size 16777216 bytes !!!
[C6x_2 ]      3.516560 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
[C6x_2 ]      3.516576 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e1000000 of size 50331648 bytes !!!
[C6x_2 ]      3.516592 s: MEM: Init ... Done !!!
[C6x_2 ]      3.516601 s: IPC: Init ... !!!
[C6x_2 ]      3.516620 s: IPC: 6 CPUs participating in IPC !!!
[C6x_2 ]      3.516634 s: IPC: Waiting for HLOS to be ready ... !!!
[C6x_2 ]     14.792291 s: IPC: HLOS is ready !!!
[C6x_2 ]     14.795657 s: IPC: Init ... Done !!!
[C6x_2 ]     14.795684 s: APP: Syncing with 5 CPUs ... !!!
[C6x_2 ]     14.849486 s: APP: Syncing with 5 CPUs ... Done !!!
[C6x_2 ]     14.849500 s: REMOTE_SERVICE: Init ... !!!
[C6x_2 ]     14.850137 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_2 ]     14.850179 s:  VX_ZONE_INIT:Enabled
[C6x_2 ]     14.850190 s:  VX_ZONE_ERROR:Enabled
[C6x_2 ]     14.850200 s:  VX_ZONE_WARNING:Enabled
[C6x_2 ]     14.850969 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_2 ]     14.850984 s: APP: OpenVX Target kernel init ... !!!
[C6x_2 ]     14.851300 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_2 ]     14.851320 s: UDMA Copy: Init ... !!!
[C6x_2 ]     14.855732 s: UDMA Copy: Init ... Done !!!
[C6x_2 ]     14.855754 s: APP: Init ... Done !!!
[C6x_2 ]     14.856439 s: APP: Run ... !!!
[C6x_2 ]     14.856449 s: IPC: Starting echo test ...
[C6x_2 ]     14.857574 s: APP: Run ... Done !!!
[C6x_2 ]     14.857894 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.]
[C6x_2 ]     14.857927 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P]
[C6x_2 ]     14.872146 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
[C6x_2 ]     14.912524 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
[C7x_1 ]      4.082441 s: CIO: Init ... Done !!!
[C7x_1 ]      4.082455 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]      4.082466 s: APP: Init ... !!!
[C7x_1 ]      4.082473 s: SCICLIENT: Init ... !!!
[C7x_1 ]      4.082644 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C7x_1 ]      4.082658 s: SCICLIENT: DMSC FW revision 0x15
[C7x_1 ]      4.082668 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]      4.082679 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]      4.082688 s: UDMA: Init ... !!!
[C7x_1 ]      4.083544 s: UDMA: Init ... Done !!!
[C7x_1 ]      4.083555 s: MEM: Init ... !!!
[C7x_1 ]      4.083565 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ 100000000 of size 268435456 bytes !!!
[C7x_1 ]      4.083586 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!!
[C7x_1 ]      4.083603 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]      4.083620 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]      4.083637 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e4000000 of size 402653184 bytes !!!
[C7x_1 ]      4.083655 s: MEM: Init ... Done !!!
[C7x_1 ]      4.083663 s: IPC: Init ... !!!
[C7x_1 ]      4.083676 s: IPC: 6 CPUs participating in IPC !!!
[C7x_1 ]      4.083691 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     14.801513 s: IPC: HLOS is ready !!!
[C7x_1 ]     14.803289 s: IPC: Init ... Done !!!
[C7x_1 ]     14.803304 s: APP: Syncing with 5 CPUs ... !!!
[C7x_1 ]     14.849487 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_1 ]     14.849502 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     14.849652 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     14.849673 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     14.849684 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     14.849693 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     14.849874 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1
[C7x_1 ]     14.849965 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2
[C7x_1 ]     14.850055 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3
[C7x_1 ]     14.850122 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4
[C7x_1 ]     14.850187 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5
[C7x_1 ]     14.850305 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6
[C7x_1 ]     14.850382 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7
[C7x_1 ]     14.850445 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8
[C7x_1 ]     14.850467 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     14.850480 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     14.850612 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     14.850627 s: APP: Init ... Done !!!
[C7x_1 ]     14.850636 s: APP: Run ... !!!
[C7x_1 ]     14.850644 s: IPC: Starting echo test ...
[C7x_1 ]     14.850799 s: APP: Run ... Done !!!
[C7x_1 ]     14.857568 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s]
[C7x_1 ]     14.857888 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s]
[C7x_1 ]     14.872172 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]
[C7x_1 ]     14.912557 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]

root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps# ./run_app_single_cam.sh
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
    75.530779 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
    75.536989 s:  VX_ZONE_INIT:Enabled
    75.537000 s:  VX_ZONE_ERROR:Enabled
    75.537013 s:  VX_ZONE_WARNING:Enabled
    75.539353 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
    75.539525 s:  VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!!
sensor_selection = [0]
ldc_enable = [0]
num_frames_to_run = [1000000000]
is_interactive = [1]
IttCtrl_registerHandler: command echo registered at location 0
IttCtrl_registerHandler: command iss_read_2a_params registered at location 1
IttCtrl_registerHandler: command iss_write_2a_params registered at location 2
IttCtrl_registerHandler: command iss_raw_save registered at location 3
IttCtrl_registerHandler: command iss_yuv_save registered at location 4
IttCtrl_registerHandler: command iss_read_sensor_reg registered at location 5
IttCtrl_registerHandler: command iss_write_sensor_reg registered at location 6
IttCtrl_registerHandler: command dev_ctrl registered at location 7
IttCtrl_registerHandler: command iss_send_dcc_file registered at location 8
 NETWORK: Opened at IP Addr = 0.0.0.0, socket port=5000!!!
    75.552507 s: ISS: Enumerating sensors ... !!!
    75.553148 s: ISS: Enumerating sensors ... found 0 : MAX96705_1MP_UYVY
    75.553157 s: ISS: Enumerating sensors ... found 1 : MAX96715_1MP_UYVY
    75.553163 s: ISS: Enumerating sensors ... found 2 : MAX96717_1MP_UYVY
    75.553169 s: ISS: Enumerating sensors ... found 3 : MAX9295A_2MP_UYVY
    75.553174 s: ISS: Enumerating sensors ... found 4 : MAX9295A_2MP_APA_AR0231_UYVY
    75.553180 s: ISS: Enumerating sensors ... found 5 : ECARX_8MP_UYVY
    75.553186 s: ISS: Enumerating sensors ... found 6 : ECARX_DMS_8MP
Select camera port index 0-7 : [MCU2_0]     75.552713 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CREATE
[MCU2_0]     75.552782 s: [iss_sensors] IssSensor_DeserializerInit Start
[MCU2_0]     75.552843 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]     75.552954 s: Board_MAX96712GetI2CAddr : ACM i2c2 config

Invalid entry
. Please choose between 0 and 7
Select camera port index 0-7 : 0
7 registered sensor drivers
a : MAX96705_1MP_UYVY
b : MAX96715_1MP_UYVY
c : MAX96717_1MP_UYVY
d : MAX9295A_2MP_UYVY
e : MAX9295A_2MP_APA_AR0231_UYVY
f : ECARX_8MP_UYVY
g : ECARX_DMS_8MP
Select a sensor above or press '0' to autodetect the sensor : Invalid selection
. Try again
7 registered sensor drivers
a : MAX96705_1MP_UYVY
b : MAX96715_1MP_UYVY
c : MAX96717_1MP_UYVY
d : MAX9295A_2MP_UYVY
e : MAX9295A_2MP_APA_AR0231_UYVY
f : ECARX_8MP_UYVY
g : ECARX_DMS_8MP
Select a sensor above or press '0' to autodetect the sensor : f
Sensor selected : ECARX_8MP_UYVY
LDC Selection Yes(1)/No(0) : LDC Selection Yes(1)/No(0) : 1
Querying ECARX_8MP_UYVY
   110.936749 s: ISS: Querying sensor [ECARX_8MP_UYVY] ... !!!
   110.937202 s: ISS: Querying sensor [ECARX_8MP_UYVY] ... Done !!!
YUV Input selected. VISS and AEWB nodes will be bypassed.
   110.937220 s: ISS: Initializing sensor [ECARX_8MP_UYVY], doing IM_SENSOR_CMD_PWRON ... !!!
[MCU2_0]    110.936951 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY
[MCU2_0]    110.937021 s: Received Query for ECARX_8MP_UYVY
[MCU2_0]    110.937408 s: [iss_sensors] in func ecarx_cfgScript
[MCU2_0]    110.937469 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    110.937706 s: read 16 bits reg success: addr 0x29, reg 0x0, val 0x52
[MCU2_0]    110.937774 s: [iss_sensor] [read 0x00] i2c2 reading addr 0x52 register 0x00 value 0x52
[MCU2_0]    110.937840 s: MAX96712 config start TIVX_RAW_IMAGE_16_BIT 1052672 TIVX_RAW_IMAGE_8_BIT 1052673
[MCU2_0]    110.937909 s: ecarx_cfgScript, line 170, count 88
[MCU2_0]    110.938087 s: write 16 bits reg success: addr 0x29, reg 0x13, val 0x75
[MCU2_0]    111.098024 s: write 16 bits reg success: addr 0x29, reg 0x1, val 0xc9
[MCU2_0]    111.258052 s: write 16 bits reg success: addr 0x29, reg 0x40b, val 0x0
[MCU2_0]    111.258272 s: write 16 bits reg success: addr 0x29, reg 0x6, val 0x0
[MCU2_0]    111.258445 s: write 16 bits reg success: addr 0x29, reg 0x10, val 0x22
[MCU2_0]    111.258616 s: write 16 bits reg success: addr 0x29, reg 0x11, val 0x22
[MCU2_0]    111.258788 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    111.258957 s: write 16 bits reg success: addr 0x29, reg 0xf4, val 0xf
[MCU2_0]    111.259131 s: write 16 bits reg success: addr 0x29, reg 0xf0, val 0x62
[MCU2_0]    111.259301 s: write 16 bits reg success: addr 0x29, reg 0xf1, val 0xea
[MCU2_0]    111.259472 s: write 16 bits reg success: addr 0x29, reg 0x94a, val 0xc0
[MCU2_0]    111.259642 s: write 16 bits reg success: addr 0x29, reg 0x98a, val 0xc0
[MCU2_0]    111.259811 s: write 16 bits reg success: addr 0x29, reg 0x8a3, val 0xe4
[MCU2_0]    111.259984 s: write 16 bits reg success: addr 0x29, reg 0x8a4, val 0xe4
[MCU2_0]    111.260155 s: write 16 bits reg success: addr 0x29, reg 0x943, val 0x91
[MCU2_0]    111.260328 s: write 16 bits reg success: addr 0x29, reg 0x983, val 0x91
[MCU2_0]    111.260497 s: write 16 bits reg success: addr 0x29, reg 0x415, val 0x39
[MCU2_0]    111.260668 s: write 16 bits reg success: addr 0x29, reg 0x418, val 0x39
[MCU2_0]    111.260835 s: write 16 bits reg success: addr 0x29, reg 0x41b, val 0x39
[MCU2_0]    111.261014 s: write 16 bits reg success: addr 0x29, reg 0x41e, val 0x39
[MCU2_0]    111.261188 s: write 16 bits reg success: addr 0x29, reg 0x8a9, val 0xc8
[MCU2_0]    111.261364 s: write 16 bits reg success: addr 0x29, reg 0x90b, val 0x7
[MCU2_0]    111.261532 s: write 16 bits reg success: addr 0x29, reg 0x92d, val 0x15
[MCU2_0]    111.261701 s: write 16 bits reg success: addr 0x29, reg 0x90d, val 0x1e
[MCU2_0]    111.261874 s: write 16 bits reg success: addr 0x29, reg 0x90e, val 0x1e
[MCU2_0]    111.262049 s: write 16 bits reg success: addr 0x29, reg 0x90f, val 0x0
[MCU2_0]    111.262220 s: write 16 bits reg success: addr 0x29, reg 0x910, val 0x0
[MCU2_0]    111.262389 s: write 16 bits reg success: addr 0x29, reg 0x911, val 0x1
[MCU2_0]    111.262559 s: write 16 bits reg success: addr 0x29, reg 0x912, val 0x1
[MCU2_0]    111.262728 s: write 16 bits reg success: addr 0x29, reg 0x94b, val 0x7
[MCU2_0]    111.262902 s: write 16 bits reg success: addr 0x29, reg 0x96d, val 0x15
[MCU2_0]    111.263074 s: write 16 bits reg success: addr 0x29, reg 0x94d, val 0x1e
[MCU2_0]    111.263244 s: write 16 bits reg success: addr 0x29, reg 0x94e, val 0x5e
[MCU2_0]    111.263430 s: write 16 bits reg success: addr 0x29, reg 0x94f, val 0x0
[MCU2_0]    111.263607 s: write 16 bits reg success: addr 0x29, reg 0x950, val 0x40
[MCU2_0]    111.263783 s: write 16 bits reg success: addr 0x29, reg 0x951, val 0x1
[MCU2_0]    111.263956 s: write 16 bits reg success: addr 0x29, reg 0x952, val 0x41
[MCU2_0]    111.264131 s: write 16 bits reg success: addr 0x29, reg 0x98b, val 0x7
[MCU2_0]    111.264302 s: write 16 bits reg success: addr 0x29, reg 0x9ad, val 0x2a
[MCU2_0]    111.264472 s: write 16 bits reg success: addr 0x29, reg 0x98d, val 0x1e
[MCU2_0]    111.264641 s: write 16 bits reg success: addr 0x29, reg 0x98e, val 0x9e
[MCU2_0]    111.264811 s: write 16 bits reg success: addr 0x29, reg 0x98f, val 0x0
[MCU2_0]    111.264980 s: write 16 bits reg success: addr 0x29, reg 0x990, val 0x80
[MCU2_0]    111.265152 s: write 16 bits reg success: addr 0x29, reg 0x991, val 0x1
[MCU2_0]    111.265321 s: write 16 bits reg success: addr 0x29, reg 0x992, val 0x81
[MCU2_0]    111.265490 s: write 16 bits reg success: addr 0x29, reg 0x9cb, val 0x7
[MCU2_0]    111.265661 s: write 16 bits reg success: addr 0x29, reg 0x9ed, val 0x2a
[MCU2_0]    111.265830 s: write 16 bits reg success: addr 0x29, reg 0x9cd, val 0x1e
[MCU2_0]    111.266011 s: write 16 bits reg success: addr 0x29, reg 0x9ce, val 0xde
[MCU2_0]    111.266184 s: write 16 bits reg success: addr 0x29, reg 0x9cf, val 0x0
[MCU2_0]    111.266356 s: write 16 bits reg success: addr 0x29, reg 0x9d0, val 0xc0
[MCU2_0]    111.266528 s: write 16 bits reg success: addr 0x29, reg 0x9d1, val 0x1
[MCU2_0]    111.266698 s: write 16 bits reg success: addr 0x29, reg 0x9d2, val 0xc1
[MCU2_0]    111.266872 s: write 16 bits reg success: addr 0x29, reg 0x4a2, val 0x0
[MCU2_0]    111.267045 s: write 16 bits reg success: addr 0x29, reg 0x4aa, val 0x0
[MCU2_0]    111.267215 s: write 16 bits reg success: addr 0x29, reg 0x4ab, val 0x0
[MCU2_0]    111.267384 s: write 16 bits reg success: addr 0x29, reg 0x4a8, val 0x0
[MCU2_0]    111.267554 s: write 16 bits reg success: addr 0x29, reg 0x4a9, val 0x0
[MCU2_0]    111.267722 s: write 16 bits reg success: addr 0x29, reg 0x4a7, val 0xc
[MCU2_0]    111.267891 s: write 16 bits reg success: addr 0x29, reg 0x4a6, val 0xbf
[MCU2_0]    111.268063 s: write 16 bits reg success: addr 0x29, reg 0x4a5, val 0x35
[MCU2_0]    111.268232 s: write 16 bits reg success: addr 0x29, reg 0x4af, val 0xc0
[MCU2_0]    111.268401 s: write 16 bits reg success: addr 0x29, reg 0x4b1, val 0x40
[MCU2_0]    111.268570 s: write 16 bits reg success: addr 0x29, reg 0x4a0, val 0x4
[MCU2_0]    111.268737 s: write 16 bits reg success: addr 0x29, reg 0x6, val 0xff
[MCU2_0]    111.428046 s: write 16 bits reg success: addr 0x40, reg 0x2be, val 0x10
[MCU2_0]    111.428265 s: write 16 bits reg success: addr 0x40, reg 0x236, val 0x8
[MCU2_0]    111.428475 s: write 16 bits reg success: addr 0x40, reg 0x237, val 0x9
[MCU2_0]    111.428682 s: write 16 bits reg success: addr 0x40, reg 0x238, val 0xa
[MCU2_0]    111.428896 s: write 16 bits reg success: addr 0x40, reg 0x239, val 0xb
[MCU2_0]    111.429109 s: write 16 bits reg success: addr 0x40, reg 0x23a, val 0xc
[MCU2_0]    111.429318 s: write 16 bits reg success: addr 0x40, reg 0x23b, val 0xd
[MCU2_0]    111.429526 s: write 16 bits reg success: addr 0x40, reg 0x23c, val 0xe
[MCU2_0]    111.429732 s: write 16 bits reg success: addr 0x40, reg 0x23d, val 0xf
[MCU2_0]    111.429939 s: write 16 bits reg success: addr 0x40, reg 0x23e, val 0x0
[MCU2_0]    111.430152 s: write 16 bits reg success: addr 0x40, reg 0x23f, val 0x1
[MCU2_0]    111.430361 s: write 16 bits reg success: addr 0x40, reg 0x240, val 0x2
[MCU2_0]    111.430570 s: write 16 bits reg success: addr 0x40, reg 0x241, val 0x3
[MCU2_0]    111.430776 s: write 16 bits reg success: addr 0x40, reg 0x242, val 0x4
[MCU2_0]    111.430984 s: write 16 bits reg success: addr 0x40, reg 0x243, val 0x5
[MCU2_0]    111.431195 s: write 16 bits reg success: addr 0x40, reg 0x244, val 0x6
[MCU2_0]    111.431401 s: write 16 bits reg success: addr 0x40, reg 0x245, val 0x7
[MCU2_0]    111.431610 s: write 16 bits reg success: addr 0x40, reg 0x318, val 0x5e
[MCU2_0]    111.431817 s: write 16 bits reg success: addr 0x40, reg 0x2d3, val 0x0
[MCU2_0]    111.601058 s: write 16 bits reg success: addr 0x40, reg 0x2d3, val 0x10
[MCU2_0]    111.601280 s: write 16 bits reg success: addr 0x29, reg 0x8a2, val 0x0
[MCU2_0]    111.601496 s: write 16 bits reg success: addr 0x29, reg 0x8a2, val 0xf0
[MCU2_0]    111.601708 s: write 16 bits reg success: addr 0x29, reg 0x18, val 0xf
[MCU2_0]    111.960880 s: [iss_sensors] in func ecarx_read_cfgScript
[MCU2_0]    111.960939 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    111.960975 s:
[MCU2_0]    111.960994 s:
[MCU2_0]    111.961013 s: [iss_sensors] MAX96712 read status regs
[MCU2_0]    111.961043 s:
[MCU2_0]    111.961285 s: read 16 bits reg success: addr 0x29, reg 0x1a, val 0xda
[MCU2_0]    111.961534 s: read 16 bits reg success: addr 0x29, reg 0xa, val 0x0
[MCU2_0]    111.961780 s: read 16 bits reg success: addr 0x29, reg 0xb, val 0x0
[MCU2_0]    111.962026 s: read 16 bits reg success: addr 0x29, reg 0xc, val 0x0
[MCU2_0]    111.962274 s: read 16 bits reg success: addr 0x29, reg 0x10, val 0x22
[MCU2_0]    111.962522 s: read 16 bits reg success: addr 0x29, reg 0x6, val 0xff
[MCU2_0]    111.962766 s: read 16 bits reg success: addr 0x29, reg 0x5, val 0xc0
[MCU2_0]    111.963012 s: read 16 bits reg success: addr 0x29, reg 0x1dc, val 0x81
[MCU2_0]    111.963263 s: read 16 bits reg success: addr 0x29, reg 0x1fc, val 0x80
[MCU2_0]    111.963512 s: read 16 bits reg success: addr 0x29, reg 0x21c, val 0x80
[MCU2_0]    111.963757 s: read 16 bits reg success: addr 0x29, reg 0x23c, val 0x80
[MCU2_0]    111.964001 s: read 16 bits reg success: addr 0x29, reg 0x11f0, val 0x1
[MCU2_0]    111.964251 s: read 16 bits reg success: addr 0x29, reg 0x11f2, val 0x1
[MCU2_0]    111.964499 s: read 16 bits reg success: addr 0x29, reg 0x40a, val 0x0
[MCU2_0]    111.964742 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
[MCU2_0]    112.064093 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
[MCU2_0]    112.164088 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
   112.264372 s: ISS: Initializing sensor [ECARX_8MP_UYVY], doing IM_SENSOR_CMD_CONFIG ... !!!
   112.264813 s: ISS: Initializing sensor [ECARX_8MP_UYVY] ... Done !!!
Enabling LDC
Creating LDC
Invalid DCC size for LDC. Disabling DCC
[MCU2_0]    112.264087 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
[MCU2_0]    112.264129 s:
[MCU2_0]    112.264150 s:
[MCU2_0]    112.264168 s: [iss_sensors] MAX96712 read status regs end
[MCU2_0]    112.264200 s:
[MCU2_0]    112.264596 s: [iss_sensors] in func disableMAX96712Broadcast none
[MCU2_0]    112.264655 s: [iss_sensors] ecarx_8MP_Config
Scaler is enabled


 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice:
Unsupported command



 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice:    112.288592 s: ISS: Starting sensor [ECARX_8MP_UYVY] ... !!!
   112.289919 s: ISS: Starting sensor [ECARX_8MP_UYVY] ... !!!
get_dcc_dir_size : Could not open directory or directory is empty /opt/vision_apps/dcc/ECARX_8MP_UYVY/wdr
[MCU2_0]    112.288826 s: [iss_sensors] in func disableMAX96712Broadcast none
[MCU2_0]    112.288929 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    112.289203 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    112.289424 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x84
[MCU2_0]    112.289673 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x84
[MCU2_0]    112.289723 s: [iss_sensors] in func ecarx_8MP_StreamOn end
[MCU2_0]    112.289758 s:
[MCU2_0]    112.290325 s:  VX_ZONE_WARNING:[tivxCaptureSetTimeout:774]  CAPTURE: WARNING: Error frame not provided using tivxCaptureRegisterErrorFrame, defaulting to waiting forever !!!


Unsupported command



 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice: x

   116.825895 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... !!!
   116.827170 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... Done !!!
[MCU2_0]    116.826156 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    116.826451 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x84
[MCU2_0]    116.826673 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    116.826930 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    116.826982 s: [iss_sensors] in func ecarx_8MP_StreamOff end
[MCU2_0]    116.827016 s:
   116.846239 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... !!!
   116.847457 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... Done !!!
   116.847475 s:  VX_ZONE_ERROR:[ownReleaseReferenceInt:307] Invalid reference
[MCU2_0]    116.846471 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    116.846746 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    116.846966 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    116.847222 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    116.847272 s: [iss_sensors] in func ecarx_8MP_StreamOff end
[MCU2_0]    116.847305 s:
[MCU2_0]    116.848073 s: ==========================================================
[MCU2_0]    116.848158 s:  Capture Status: Instance|0
[MCU2_0]    116.848193 s: ==========================================================
[MCU2_0]    116.848242 s:  overflowCount: 0
[MCU2_0]    116.848278 s:  spuriousUdmaIntrCount: 0
[MCU2_0]    116.848316 s:  frontFIFOOvflCount: 0
[MCU2_0]    116.848349 s:  crcCount: 0
[MCU2_0]    116.848381 s:  eccCount: 0
[MCU2_0]    116.848414 s:  correctedEccCount: 0
[MCU2_0]    116.848449 s:  dataIdErrorCount: 0
[MCU2_0]    116.848482 s:  invalidAccessCount: 0
[MCU2_0]    116.848516 s:  invalidSpCount: 0
[MCU2_0]    116.848554 s:  strmFIFOOvflCount[0]: 0
[MCU2_0]    116.848584 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
[MCU2_0]    116.848659 s:            0 |               137 |                  137 |                0 |                 0 |
[MCU2_0]    116.849301 s: ==========================================================
[MCU2_0]    116.849390 s:  Capture Status: Instance|1
[MCU2_0]    116.849425 s: ==========================================================
[MCU2_0]    116.849470 s:  overflowCount: 0
[MCU2_0]    116.849507 s:  spuriousUdmaIntrCount: 0
[MCU2_0]    116.849543 s:  frontFIFOOvflCount: 0
[MCU2_0]    116.849576 s:  crcCount: 0
[MCU2_0]    116.849608 s:  eccCount: 0
[MCU2_0]    116.849639 s:  correctedEccCount: 0
[MCU2_0]    116.849673 s:  dataIdErrorCount: 0
[MCU2_0]    116.849707 s:  invalidAccessCount: 0
[MCU2_0]    116.849741 s:  invalidSpCount: 0
[MCU2_0]    116.849779 s:  strmFIFOOvflCount[0]: 0
[MCU2_0]    116.849810 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
Error : app_delete_graph returned 0xfffffff4
   116.862198 s: ISS: De-initializing sensor [ECARX_8MP_UYVY] ... !!!
   116.862501 s: ISS: De-initializing sensor [ECARX_8MP_UYVY] ... Done !!!
   116.862514 s:  VX_ZONE_INIT:[tivxHostDeInitLocal:100] De-Initialization Done for HOST !!!
   116.866870 s:  VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!!
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
MEM: Alloc's: 19 alloc's of 91778976 bytes
MEM: Free's : 19 free's  of 91778976 bytes
MEM: Open's : 0 allocs  of 0 bytes
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!
root@ti-j72xx:/opt/vision_apps#

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

     您的预期通道速度是否为900Kbps？ 我认为这一点甚至没有得到支持。 支持的较低通道速度为80Mbps。 如果您希望达到900Mbps、能否将变量设置为900000、 该值需要以 Kbps 为单位、如该变量的名称所示。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brejish、

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failure-with vision-app-run_app_single_camon-sh"]1920 * 1080 * 60 * 3 * 8 * 1.2 /894Mbps = 5.795/quote/quote_lane [/ quote 89795Mbps]

    因为 公式 计算 需要每通道最低895.795Mbps。

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-DSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4116573#4116573"]请将变量设置为900000[]

    应用的补丁代码显示每通道最大输出2.5Gbps。 因此  DSI_params.laneSpeedInKbps = 900u 是可以的。 无需设置为900000，对吧？

    2.如何确定 SoC 是否 通过显示面板的 DSI 接口将摄像头数据输出到串行器？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4116684#4116684]11. 应用的补丁代码显示每通道最大输出2.5Gbps。 因此  DSI_params.laneSpeedInKbps = 900u 是可以的。 无需设置为900000，对吗?[/报价]

    但在进行比较之前、它乘以1000。 因此、请使用900 * 1000。  

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4116684#4116684]2。 如何确定 SoC 是否 通过显示面板的 DSI 接口将摄像头数据输出到串行器？[/quot]

    是否有方法在串行器中检查它？ 通常、串行器可以提供有关其是否正确接收/检测帧的信息。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4116709#4116709"]、但在比较之前会将其乘以1000。 因此、请使用900 * 1000。  [/报价]

    仍然没有发生任何事情。

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4116709#4116709"]是否有任何方法可以在串行器中检查它？ 通常、串行器可以提供有关其是否正确接收/检测帧的信息。  [/报价]

       有一种方法可以检查串行器、我们使用 proc_creat 在/proc/test_read_node 上创建一个节点。 但常见操作.proc_read 失败、确保 与串行器通信的串行端口被其他设备占用、因为 与初始化串行器相关的寄存器可在启动阶段通过串行端口进行读写操作、从而正常读取/写入。  VISION-APP 启动后、回显1 >/proc/test_read_node、它将无法正常工作。 

    boot-up stage log:
Read/Write succ
[    5.230026] max96789_init_cmd starting ...
[    5.232855] write:chipid=0x90 addr=0x1ce val=0x4f
[    5.236363] gmsl2_reg_write FHEAD=0x79,chipid=0x90,addr=0x1ce,len=462,data=0x1
[    5.242359] uart_bus_write 6 bytes:
[    5.244802] [ 79 90 01 CE 01 4F ]
[    5.247537] uart_bus_read 1 bytes:
[    5.249744] [ C3 ]
[    5.250447] FSYNC
[    5.256072] init cmd ok
[    5.257316] ===================================================================
[    5.263580] ##### 96789 read SER reg setting start
[    5.267276] uart_bus_write 5 bytes:
[    5.269457] [ 79 81 01 02 01 ]
[    5.271866] uart_bus_read 2 bytes:
[    5.273963] [ C3 0A ]
[    5.274928] FSYNC
[    5.275548] ##### 96789 read SER reg setting done

Read failed
root@ti-j72xx:~#
root@ti-j72xx:~# echo 1 > /proc/MXtest
check DSI SER Reg ...
uart_bus_write 5 bytes:
[ 79 81 01 02 01 ]
uart_bus_write 5 bytes:
[ 79 81 01 02 01 ]
uart_bus_write 5 bytes:
[ 79 81 01 02 01 ]
uart_bus_write 5 bytes:
[ 79 81 01 02 01 ]
gmsl2_reg_read: Ret -EIO
root@ti-j72xx:~#
root@ti-j72xx:~#

       请帮助我解决这个职业问题。

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    顺便说一下、使用了串行端口/dev/ttyS0

    ([3.78184] 2820000.serial: tmio 0x2820000处的 ttyS0 (IRQ = 31、base_baud = 3000000)是8250)

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好 、Brijesh、

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with-vision-app-run_app_single_cam-sh/4117828#4117828"]我们在 proc_node 上使用了一种方法来检查 proc_crealizer。 但常见操作.proc_read 失败、确保 与串行器通信的串行端口被其他设备占用、因为 与初始化串行器相关的寄存器可在启动阶段通过串行端口进行读写操作、从而正常读取/写入。  VISION-APP 启动后、回显1 >/proc/test_read_node、将无法正常工作。[/quot]

    请 忽略此问题。 已解决！

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4116709#4116709"]是否有任何方法可以在串行器中检查它？ 通常、串行器可以提供有关其是否正确接收/检测帧的信息。  [/报价]

    通过检查 串行器上的相关寄存器，可以看出没有视频流被传递到串行器 。

    让我总结一下当前状态。

    SDK 版本：PSDKRA8.1

    2. HW：TDA4 (2*1920x1080)->串行器-> 1920x1080 LCD ( 连接两个 LCD 以使用分离器模式)

    我的目标：2*1920x1080 DSI 显示器。

    第四步：1920x1080显示屏

    －这失败了。 已通过 run_app_single_cam.sh 验证
    修改的文件：

    请确认！！！

    e2e.ti.com/.../8357.DSI.diff

    run_app_single_cam.sh 日志： 

    root@ti-j72xx:~#
root@ti-j72xx:~# cd /opt/vision_apps/
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps# source ./vision_apps_init.sh
root@ti-j72xx:/opt/vision_apps# [MCU2_0]      3.321650 s: CIO: Init ... Done !!!
[MCU2_0]      3.321722 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]      3.321764 s: APP: Init ... !!!
[MCU2_0]      3.321791 s: SCICLIENT: Init ... !!!
[MCU2_0]      3.322004 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[MCU2_0]      3.322055 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_0]      3.322091 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]      3.322126 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      3.322153 s: UDMA: Init ... !!!
[MCU2_0]      3.323231 s: UDMA: Init ... Done !!!
[MCU2_0]      3.323297 s: MEM: Init ... !!!
[MCU2_0]      3.323341 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]      3.323416 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
[MCU2_0]      3.323478 s: MEM: Init ... Done !!!
[MCU2_0]      3.323502 s: IPC: Init ... !!!
[MCU2_0]      3.323560 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_0]      3.323607 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     15.091555 s: IPC: HLOS is ready !!!
[MCU2_0]     15.106714 s: IPC: Init ... Done !!!
[MCU2_0]     15.106782 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     15.118362 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     15.118567 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     15.120113 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     15.120189 s: FVID2: Init ... !!!
[MCU2_0]     15.120265 s: FVID2: Init ... Done !!!
[MCU2_0]     15.120320 s: DSS: Init ... !!!
[MCU2_0]     15.120350 s: DSS: Display type is DSI !!!
[MCU2_0]     15.120378 s: DSS: M2M Path is enabled !!!
[MCU2_0]     15.120405 s: DSS: SoC init ... !!!
[MCU2_0]     15.120429 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]     15.120888 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.120928 s: SCICLIENT: Sciclient_pmSetModuleState module=150 state=2
[MCU2_0]     15.121315 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.121352 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
[MCU2_0]     15.121685 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.121719 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11
[MCU2_0]     15.122078 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     15.122115 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=9 freq=149139000
[MCU2_0]     15.123392 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     15.123429 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=9 state=2 flag=0
[MCU2_0]     15.123870 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     15.123906 s: DSS: SoC init ... Done !!!
[MCU2_0]     15.127328 s: DSS: Init ... Done !!!
[MCU2_0]     15.127397 s: VHWA: VPAC Init ... !!!
[MCU2_0]     15.127428 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
[MCU2_0]     15.127647 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.127692 s: VHWA: LDC Init ... !!!
[MCU2_0]     15.132117 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     15.132185 s: VHWA: MSC Init ... !!!
[MCU2_0]     15.142011 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     15.142077 s: VHWA: NF Init ... !!!
[MCU2_0]     15.143552 s: VHWA: NF Init ... Done !!!
[MCU2_0]     15.143616 s: VHWA: VISS Init ... !!!
[MCU2_0]     15.152700 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     15.152767 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     15.152816 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     15.152846 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     15.152871 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     15.154021 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target IPU1-0
[MCU2_0]     15.154275 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_NF
[MCU2_0]     15.154497 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_LDC1
[MCU2_0]     15.154721 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_MSC1
[MCU2_0]     15.154939 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_MSC2
[MCU2_0]     15.155277 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target VPAC_VISS1
[MCU2_0]     15.155554 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE1
[MCU2_0]     15.155809 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE2
[MCU2_0]     15.156078 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DISPLAY1
[MCU2_0]     15.156349 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DISPLAY2
[MCU2_0]     15.156583 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CSITX
[MCU2_0]     15.156854 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE3
[MCU2_0]     15.157122 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE4
[MCU2_0]     15.157401 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE5
[MCU2_0]     15.157667 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE6
[MCU2_0]     15.157924 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE7
[MCU2_0]     15.158191 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target CAPTURE8
[MCU2_0]     15.158427 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M1
[MCU2_0]     15.158647 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M2
[MCU2_0]     15.158869 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M3
[MCU2_0]     15.159100 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DSS_M2M4
[MCU2_0]     15.159155 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]     15.159204 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     15.174883 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     15.174940 s: CSI2RX: Init ... !!!
[MCU2_0]     15.174966 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     15.175075 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.175117 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
[MCU2_0]     15.175234 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.175272 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
[MCU2_0]     15.175373 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.175408 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
[MCU2_0]     15.175479 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.175510 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
[MCU2_0]     15.175580 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     15.176216 s: CSI2RX: Init ... Done !!!
[MCU2_0]     15.176276 s: ISS: Init ... !!!
[MCU2_0]     15.176323 s: IssSensor_Sensor_Module_Max96705_Init init
[MCU2_0]     15.176365 s: IssSensor_Sensor_Module_Max96715_Init init
[MCU2_0]     15.176402 s: IssSensor_Sensor_Module_Max96717_Init init
[MCU2_0]     15.176436 s: IssSensor_Sensor_Module_Max9295A_Init init
[MCU2_0]     15.176471 s: IssSensor_Sensor_Module_Max9295A_APA_AR0231_Init init
[MCU2_0]     15.176509 s: IssSensor_Init ... Done !!!
[MCU2_0]     15.176601 s: vissRemoteServer_Init ... Done !!!
[MCU2_0]     15.176662 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]     15.176697 s: UDMA Copy: Init ... !!!
[MCU2_0]     15.178158 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     15.178304 s: APP: Init ... Done !!!
[MCU2_0]     15.178349 s: APP: Run ... !!!
[MCU2_0]     15.178375 s: IPC: Starting echo test ...
[MCU2_0]     15.180960 s: APP: Run ... Done !!!
[MCU2_0]     15.182496 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]     15.182612 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]     15.182708 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_0]     15.182796 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_1]      3.341047 s: CIO: Init ... Done !!!
[MCU2_1]      3.341114 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]      3.341154 s: APP: Init ... !!!
[MCU2_1]      3.341179 s: SCICLIENT: Init ... !!!
[MCU2_1]      3.341387 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[MCU2_1]      3.341432 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_1]      3.341465 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]      3.341499 s: SCICLIENT: Init ... Done !!!
[MCU2_1]      3.341525 s: UDMA: Init ... !!!
[MCU2_1]      3.342619 s: UDMA: Init ... Done !!!
[MCU2_1]      3.342680 s: MEM: Init ... !!!
[MCU2_1]      3.342721 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]      3.342794 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!!
[MCU2_1]      3.342854 s: MEM: Init ... Done !!!
[MCU2_1]      3.342878 s: IPC: Init ... !!!
[MCU2_1]      3.342939 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_1]      3.342985 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     15.103132 s: IPC: HLOS is ready !!!
[MCU2_1]     15.118244 s: IPC: Init ... Done !!!
[MCU2_1]     15.118311 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_1]     15.118361 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_1]     15.118400 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     15.120162 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     15.120220 s: FVID2: Init ... !!!
[MCU2_1]     15.120291 s: FVID2: Init ... Done !!!
[MCU2_1]     15.120324 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     15.120350 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2
[MCU2_1]     15.120802 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     15.120841 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2
[MCU2_1]     15.121267 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     15.121301 s: VHWA: DOF Init ... !!!
[MCU2_1]     15.130835 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     15.130894 s: VHWA: SDE Init ... !!!
[MCU2_1]     15.133509 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     15.133566 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     15.133620 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     15.133651 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     15.133676 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     15.134874 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DMPAC_SDE
[MCU2_1]     15.135113 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DMPAC_DOF
[MCU2_1]     15.135337 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target IPU1-1
[MCU2_1]     15.135387 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     15.135421 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     15.135698 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     15.135739 s: UDMA Copy: Init ... !!!
[MCU2_1]     15.137998 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     15.138069 s: APP: Init ... Done !!!
[MCU2_1]     15.138104 s: APP: Run ... !!!
[MCU2_1]     15.138127 s: IPC: Starting echo test ...
[MCU2_1]     15.140687 s: APP: Run ... Done !!!
[MCU2_1]     15.141977 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_1]     15.142095 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_1]     15.142188 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_1]     15.181770 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
[C6x_1 ]      3.419666 s: CIO: Init ... Done !!!
[C6x_1 ]      3.419690 s: ### CPU Frequency = 1350000000 Hz
[C6x_1 ]      3.419701 s: APP: Init ... !!!
[C6x_1 ]      3.419708 s: SCICLIENT: Init ... !!!
[C6x_1 ]      3.419890 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C6x_1 ]      3.419901 s: SCICLIENT: DMSC FW revision 0x15
[C6x_1 ]      3.419911 s: SCICLIENT: DMSC FW ABI revision 3.1
[C6x_1 ]      3.419920 s: SCICLIENT: Init ... Done !!!
[C6x_1 ]      3.419929 s: UDMA: Init ... !!!
[C6x_1 ]      3.421078 s: UDMA: Init ... Done !!!
[C6x_1 ]      3.421101 s: MEM: Init ... !!!
[C6x_1 ]      3.421114 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!!
[C6x_1 ]      3.421131 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
[C6x_1 ]      3.421146 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ dd000000 of size 50331648 bytes !!!
[C6x_1 ]      3.421162 s: MEM: Init ... Done !!!
[C6x_1 ]      3.421171 s: IPC: Init ... !!!
[C6x_1 ]      3.421190 s: IPC: 6 CPUs participating in IPC !!!
[C6x_1 ]      3.421203 s: IPC: Waiting for HLOS to be ready ... !!!
[C6x_1 ]     15.054080 s: IPC: HLOS is ready !!!
[C6x_1 ]     15.057834 s: IPC: Init ... Done !!!
[C6x_1 ]     15.057861 s: APP: Syncing with 5 CPUs ... !!!
[C6x_1 ]     15.118360 s: APP: Syncing with 5 CPUs ... Done !!!
[C6x_1 ]     15.118373 s: REMOTE_SERVICE: Init ... !!!
[C6x_1 ]     15.119078 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_1 ]     15.119129 s:  VX_ZONE_INIT:Enabled
[C6x_1 ]     15.119143 s:  VX_ZONE_ERROR:Enabled
[C6x_1 ]     15.119153 s:  VX_ZONE_WARNING:Enabled
[C6x_1 ]     15.119943 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_1 ]     15.119957 s: APP: OpenVX Target kernel init ... !!!
[C6x_1 ]     15.120275 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_1 ]     15.120295 s: UDMA Copy: Init ... !!!
[C6x_1 ]     15.124411 s: UDMA Copy: Init ... Done !!!
[C6x_1 ]     15.124435 s: APP: Init ... Done !!!
[C6x_1 ]     15.125163 s: APP: Run ... !!!
[C6x_1 ]     15.125173 s: IPC: Starting echo test ...
[C6x_1 ]     15.126280 s: APP: Run ... Done !!!
[C6x_1 ]     15.126641 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P]
[C6x_1 ]     15.127045 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_1 ]     15.141297 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_1 ]     15.181629 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_2 ]      3.511664 s: CIO: Init ... Done !!!
[C6x_2 ]      3.511689 s: ### CPU Frequency = 1350000000 Hz
[C6x_2 ]      3.511699 s: APP: Init ... !!!
[C6x_2 ]      3.511707 s: SCICLIENT: Init ... !!!
[C6x_2 ]      3.511891 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C6x_2 ]      3.511902 s: SCICLIENT: DMSC FW revision 0x15
[C6x_2 ]      3.511912 s: SCICLIENT: DMSC FW ABI revision 3.1
[C6x_2 ]      3.511922 s: SCICLIENT: Init ... Done !!!
[C6x_2 ]      3.511931 s: UDMA: Init ... !!!
[C6x_2 ]      3.513086 s: UDMA: Init ... Done !!!
[C6x_2 ]      3.513108 s: MEM: Init ... !!!
[C6x_2 ]      3.513121 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e0000000 of size 16777216 bytes !!!
[C6x_2 ]      3.513139 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
[C6x_2 ]      3.513154 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e1000000 of size 50331648 bytes !!!
[C6x_2 ]      3.513170 s: MEM: Init ... Done !!!
[C6x_2 ]      3.513179 s: IPC: Init ... !!!
[C6x_2 ]      3.513198 s: IPC: 6 CPUs participating in IPC !!!
[C6x_2 ]      3.513211 s: IPC: Waiting for HLOS to be ready ... !!!
[C6x_2 ]     15.083412 s: IPC: HLOS is ready !!!
[C6x_2 ]     15.086774 s: IPC: Init ... Done !!!
[C6x_2 ]     15.086803 s: APP: Syncing with 5 CPUs ... !!!
[C6x_2 ]     15.118360 s: APP: Syncing with 5 CPUs ... Done !!!
[C6x_2 ]     15.118374 s: REMOTE_SERVICE: Init ... !!!
[C6x_2 ]     15.119102 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_2 ]     15.119154 s:  VX_ZONE_INIT:Enabled
[C6x_2 ]     15.119165 s:  VX_ZONE_ERROR:Enabled
[C6x_2 ]     15.119175 s:  VX_ZONE_WARNING:Enabled
[C6x_2 ]     15.119966 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_2 ]     15.119981 s: APP: OpenVX Target kernel init ... !!!
[C6x_2 ]     15.120298 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_2 ]     15.120319 s: UDMA Copy: Init ... !!!
[C6x_2 ]     15.124700 s: UDMA Copy: Init ... Done !!!
[C6x_2 ]     15.124722 s: APP: Init ... Done !!!
[C6x_2 ]     15.125418 s: APP: Run ... !!!
[C6x_2 ]     15.125429 s: IPC: Starting echo test ...
[C6x_2 ]     15.126679 s: APP: Run ... Done !!!
[C6x_2 ]     15.126991 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.]
[C6x_2 ]     15.127048 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P]
[C6x_2 ]     15.141332 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
[C6x_2 ]     15.181654 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
[C7x_1 ]      4.078501 s: CIO: Init ... Done !!!
[C7x_1 ]      4.078514 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]      4.078525 s: APP: Init ... !!!
[C7x_1 ]      4.078533 s: SCICLIENT: Init ... !!!
[C7x_1 ]      4.078702 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C7x_1 ]      4.078715 s: SCICLIENT: DMSC FW revision 0x15
[C7x_1 ]      4.078725 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]      4.078735 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]      4.078744 s: UDMA: Init ... !!!
[C7x_1 ]      4.079588 s: UDMA: Init ... Done !!!
[C7x_1 ]      4.079600 s: MEM: Init ... !!!
[C7x_1 ]      4.079610 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ 100000000 of size 268435456 bytes !!!
[C7x_1 ]      4.079630 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!!
[C7x_1 ]      4.079647 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]      4.079664 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]      4.079681 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e4000000 of size 402653184 bytes !!!
[C7x_1 ]      4.079699 s: MEM: Init ... Done !!!
[C7x_1 ]      4.079707 s: IPC: Init ... !!!
[C7x_1 ]      4.079720 s: IPC: 6 CPUs participating in IPC !!!
[C7x_1 ]      4.079734 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     15.111813 s: IPC: HLOS is ready !!!
[C7x_1 ]     15.113652 s: IPC: Init ... Done !!!
[C7x_1 ]     15.113667 s: APP: Syncing with 5 CPUs ... !!!
[C7x_1 ]     15.118360 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_1 ]     15.118373 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     15.118529 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     15.118553 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     15.118563 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     15.118573 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     15.118762 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1
[C7x_1 ]     15.118858 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2
[C7x_1 ]     15.118982 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3
[C7x_1 ]     15.119078 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4
[C7x_1 ]     15.119159 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5
[C7x_1 ]     15.119263 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6
[C7x_1 ]     15.119351 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7
[C7x_1 ]     15.119427 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8
[C7x_1 ]     15.119448 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     15.119460 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     15.119590 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     15.119603 s: APP: Init ... Done !!!
[C7x_1 ]     15.119611 s: APP: Run ... !!!
[C7x_1 ]     15.119621 s: IPC: Starting echo test ...
[C7x_1 ]     15.119776 s: APP: Run ... Done !!!
[C7x_1 ]     15.126645 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s]
[C7x_1 ]     15.127058 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s]
[C7x_1 ]     15.141358 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]
[C7x_1 ]     15.181701 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]

root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps# ./run_app_single_cam.sh
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
   101.741201 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
   101.748117 s:  VX_ZONE_INIT:Enabled
   101.748141 s:  VX_ZONE_ERROR:Enabled
   101.748152 s:  VX_ZONE_WARNING:Enabled
   101.750839 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
   101.751013 s:  VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!!
sensor_selection = [0]
ldc_enable = [0]
num_frames_to_run = [1000000000]
is_interactive = [1]
IttCtrl_registerHandler: command echo registered at location 0
IttCtrl_registerHandler: command iss_read_2a_params registered at location 1
IttCtrl_registerHandler: command iss_write_2a_params registered at location 2
IttCtrl_registerHandler: command iss_raw_save registered at location 3
IttCtrl_registerHandler: command iss_yuv_save registered at location 4
IttCtrl_registerHandler: command iss_read_sensor_reg registered at location 5
IttCtrl_registerHandler: command iss_write_sensor_reg registered at location 6
IttCtrl_registerHandler: command dev_ctrl registered at location 7
IttCtrl_registerHandler: command iss_send_dcc_file registered at location 8
 NETWORK: Opened at IP Addr = 0.0.0.0, socket port=5000!!!
   101.765722 s: ISS: Enumerating sensors ... !!!
   101.766367 s: ISS: Enumerating sensors ... found 0 : MAX96705_1MP_UYVY
   101.766377 s: ISS: Enumerating sensors ... found 1 : MAX96715_1MP_UYVY
   101.766383 s: ISS: Enumerating sensors ... found 2 : MAX96717_1MP_UYVY
   101.766389 s: ISS: Enumerating sensors ... found 3 : MAX9295A_2MP_UYVY
   101.766394 s: ISS: Enumerating sensors ... found 4 : MAX9295A_2MP_APA_AR0231_UYVY
   101.766400 s: ISS: Enumerating sensors ... found 5 : ECARX_8MP_UYVY
   101.766406 s: ISS: Enumerating sensors ... found 6 : ECARX_DMS_8MP
Select camera port index 0-7 : [MCU2_0]    101.765932 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CREATE
[MCU2_0]    101.766002 s: [iss_sensors] IssSensor_DeserializerInit Start
[MCU2_0]    101.766062 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    101.766167 s: Board_MAX96712GetI2CAddr : ACM i2c2 config

Invalid entry
. Please choose between 0 and 7
Select camera port index 0-7 : 0
7 registered sensor drivers
a : MAX96705_1MP_UYVY
b : MAX96715_1MP_UYVY
c : MAX96717_1MP_UYVY
d : MAX9295A_2MP_UYVY
e : MAX9295A_2MP_APA_AR0231_UYVY
f : ECARX_8MP_UYVY
g : ECARX_DMS_8MP
Select a sensor above or press '0' to autodetect the sensor : Invalid selection
. Try again
7 registered sensor drivers
a : MAX96705_1MP_UYVY
b : MAX96715_1MP_UYVY
c : MAX96717_1MP_UYVY
d : MAX9295A_2MP_UYVY
e : MAX9295A_2MP_APA_AR0231_UYVY
f : ECARX_8MP_UYVY
g : ECARX_DMS_8MP
Select a sensor above or press '0' to autodetect the sensor : f
Sensor selected : ECARX_8MP_UYVY
LDC Selection Yes(1)/No(0) : LDC Selection Yes(1)/No(0) : 0
Querying ECARX_8MP_UYVY
   109.885404 s: ISS: Querying sensor [ECARX_8MP_UYVY] ... !!!
   109.885846 s: ISS: Querying sensor [ECARX_8MP_UYVY] ... Done !!!
YUV Input selected. VISS and AEWB nodes will be bypassed.
   109.885864 s: ISS: Initializing sensor [ECARX_8MP_UYVY], doing IM_SENSOR_CMD_PWRON ... !!!
[MCU2_0]    109.885599 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY
[MCU2_0]    109.885668 s: Received Query for ECARX_8MP_UYVY
[MCU2_0]    109.886051 s: [iss_sensors] in func ecarx_cfgScript
[MCU2_0]    109.886116 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    109.886350 s: read 16 bits reg success: addr 0x29, reg 0x0, val 0x52
[MCU2_0]    109.886420 s: [iss_sensor] [read 0x00] i2c2 reading addr 0x52 register 0x00 value 0x52
[MCU2_0]    109.886486 s: MAX96712 config start TIVX_RAW_IMAGE_16_BIT 1052672 TIVX_RAW_IMAGE_8_BIT 1052673
[MCU2_0]    109.886547 s: ecarx_cfgScript, line 170, count 88
[MCU2_0]    109.886720 s: write 16 bits reg success: addr 0x29, reg 0x13, val 0x75
[MCU2_0]    110.046329 s: write 16 bits reg success: addr 0x29, reg 0x1, val 0xc9
[MCU2_0]    110.206358 s: write 16 bits reg success: addr 0x29, reg 0x40b, val 0x0
[MCU2_0]    110.206580 s: write 16 bits reg success: addr 0x29, reg 0x6, val 0x0
[MCU2_0]    110.206752 s: write 16 bits reg success: addr 0x29, reg 0x10, val 0x22
[MCU2_0]    110.206922 s: write 16 bits reg success: addr 0x29, reg 0x11, val 0x22
[MCU2_0]    110.207092 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    110.207262 s: write 16 bits reg success: addr 0x29, reg 0xf4, val 0xf
[MCU2_0]    110.207433 s: write 16 bits reg success: addr 0x29, reg 0xf0, val 0x62
[MCU2_0]    110.207604 s: write 16 bits reg success: addr 0x29, reg 0xf1, val 0xea
[MCU2_0]    110.207775 s: write 16 bits reg success: addr 0x29, reg 0x94a, val 0xc0
[MCU2_0]    110.207946 s: write 16 bits reg success: addr 0x29, reg 0x98a, val 0xc0
[MCU2_0]    110.208114 s: write 16 bits reg success: addr 0x29, reg 0x8a3, val 0xe4
[MCU2_0]    110.208281 s: write 16 bits reg success: addr 0x29, reg 0x8a4, val 0xe4
[MCU2_0]    110.208453 s: write 16 bits reg success: addr 0x29, reg 0x943, val 0x91
[MCU2_0]    110.208623 s: write 16 bits reg success: addr 0x29, reg 0x983, val 0x91
[MCU2_0]    110.208793 s: write 16 bits reg success: addr 0x29, reg 0x415, val 0x39
[MCU2_0]    110.208960 s: write 16 bits reg success: addr 0x29, reg 0x418, val 0x39
[MCU2_0]    110.209129 s: write 16 bits reg success: addr 0x29, reg 0x41b, val 0x39
[MCU2_0]    110.209306 s: write 16 bits reg success: addr 0x29, reg 0x41e, val 0x39
[MCU2_0]    110.209476 s: write 16 bits reg success: addr 0x29, reg 0x8a9, val 0xc8
[MCU2_0]    110.209646 s: write 16 bits reg success: addr 0x29, reg 0x90b, val 0x7
[MCU2_0]    110.209815 s: write 16 bits reg success: addr 0x29, reg 0x92d, val 0x15
[MCU2_0]    110.209984 s: write 16 bits reg success: addr 0x29, reg 0x90d, val 0x1e
[MCU2_0]    110.210154 s: write 16 bits reg success: addr 0x29, reg 0x90e, val 0x1e
[MCU2_0]    110.210329 s: write 16 bits reg success: addr 0x29, reg 0x90f, val 0x0
[MCU2_0]    110.210500 s: write 16 bits reg success: addr 0x29, reg 0x910, val 0x0
[MCU2_0]    110.210669 s: write 16 bits reg success: addr 0x29, reg 0x911, val 0x1
[MCU2_0]    110.210840 s: write 16 bits reg success: addr 0x29, reg 0x912, val 0x1
[MCU2_0]    110.211009 s: write 16 bits reg success: addr 0x29, reg 0x94b, val 0x7
[MCU2_0]    110.211182 s: write 16 bits reg success: addr 0x29, reg 0x96d, val 0x15
[MCU2_0]    110.211356 s: write 16 bits reg success: addr 0x29, reg 0x94d, val 0x1e
[MCU2_0]    110.211529 s: write 16 bits reg success: addr 0x29, reg 0x94e, val 0x5e
[MCU2_0]    110.211698 s: write 16 bits reg success: addr 0x29, reg 0x94f, val 0x0
[MCU2_0]    110.211867 s: write 16 bits reg success: addr 0x29, reg 0x950, val 0x40
[MCU2_0]    110.212036 s: write 16 bits reg success: addr 0x29, reg 0x951, val 0x1
[MCU2_0]    110.212212 s: write 16 bits reg success: addr 0x29, reg 0x952, val 0x41
[MCU2_0]    110.212383 s: write 16 bits reg success: addr 0x29, reg 0x98b, val 0x7
[MCU2_0]    110.212555 s: write 16 bits reg success: addr 0x29, reg 0x9ad, val 0x2a
[MCU2_0]    110.212722 s: write 16 bits reg success: addr 0x29, reg 0x98d, val 0x1e
[MCU2_0]    110.212890 s: write 16 bits reg success: addr 0x29, reg 0x98e, val 0x9e
[MCU2_0]    110.213059 s: write 16 bits reg success: addr 0x29, reg 0x98f, val 0x0
[MCU2_0]    110.213229 s: write 16 bits reg success: addr 0x29, reg 0x990, val 0x80
[MCU2_0]    110.213402 s: write 16 bits reg success: addr 0x29, reg 0x991, val 0x1
[MCU2_0]    110.213571 s: write 16 bits reg success: addr 0x29, reg 0x992, val 0x81
[MCU2_0]    110.213741 s: write 16 bits reg success: addr 0x29, reg 0x9cb, val 0x7
[MCU2_0]    110.213910 s: write 16 bits reg success: addr 0x29, reg 0x9ed, val 0x2a
[MCU2_0]    110.214081 s: write 16 bits reg success: addr 0x29, reg 0x9cd, val 0x1e
[MCU2_0]    110.214249 s: write 16 bits reg success: addr 0x29, reg 0x9ce, val 0xde
[MCU2_0]    110.214424 s: write 16 bits reg success: addr 0x29, reg 0x9cf, val 0x0
[MCU2_0]    110.214595 s: write 16 bits reg success: addr 0x29, reg 0x9d0, val 0xc0
[MCU2_0]    110.214767 s: write 16 bits reg success: addr 0x29, reg 0x9d1, val 0x1
[MCU2_0]    110.214955 s: write 16 bits reg success: addr 0x29, reg 0x9d2, val 0xc1
[MCU2_0]    110.215126 s: write 16 bits reg success: addr 0x29, reg 0x4a2, val 0x0
[MCU2_0]    110.215308 s: write 16 bits reg success: addr 0x29, reg 0x4aa, val 0x0
[MCU2_0]    110.215480 s: write 16 bits reg success: addr 0x29, reg 0x4ab, val 0x0
[MCU2_0]    110.215650 s: write 16 bits reg success: addr 0x29, reg 0x4a8, val 0x0
[MCU2_0]    110.215821 s: write 16 bits reg success: addr 0x29, reg 0x4a9, val 0x0
[MCU2_0]    110.215990 s: write 16 bits reg success: addr 0x29, reg 0x4a7, val 0xc
[MCU2_0]    110.216158 s: write 16 bits reg success: addr 0x29, reg 0x4a6, val 0xbf
[MCU2_0]    110.216333 s: write 16 bits reg success: addr 0x29, reg 0x4a5, val 0x35
[MCU2_0]    110.216505 s: write 16 bits reg success: addr 0x29, reg 0x4af, val 0xc0
[MCU2_0]    110.216675 s: write 16 bits reg success: addr 0x29, reg 0x4b1, val 0x40
[MCU2_0]    110.216845 s: write 16 bits reg success: addr 0x29, reg 0x4a0, val 0x4
[MCU2_0]    110.217013 s: write 16 bits reg success: addr 0x29, reg 0x6, val 0xff
[MCU2_0]    110.376360 s: write 16 bits reg success: addr 0x40, reg 0x2be, val 0x10
[MCU2_0]    110.376573 s: write 16 bits reg success: addr 0x40, reg 0x236, val 0x8
[MCU2_0]    110.376783 s: write 16 bits reg success: addr 0x40, reg 0x237, val 0x9
[MCU2_0]    110.376991 s: write 16 bits reg success: addr 0x40, reg 0x238, val 0xa
[MCU2_0]    110.377204 s: write 16 bits reg success: addr 0x40, reg 0x239, val 0xb
[MCU2_0]    110.377415 s: write 16 bits reg success: addr 0x40, reg 0x23a, val 0xc
[MCU2_0]    110.377626 s: write 16 bits reg success: addr 0x40, reg 0x23b, val 0xd
[MCU2_0]    110.377830 s: write 16 bits reg success: addr 0x40, reg 0x23c, val 0xe
[MCU2_0]    110.378034 s: write 16 bits reg success: addr 0x40, reg 0x23d, val 0xf
[MCU2_0]    110.378239 s: write 16 bits reg success: addr 0x40, reg 0x23e, val 0x0
[MCU2_0]    110.378448 s: write 16 bits reg success: addr 0x40, reg 0x23f, val 0x1
[MCU2_0]    110.378659 s: write 16 bits reg success: addr 0x40, reg 0x240, val 0x2
[MCU2_0]    110.378865 s: write 16 bits reg success: addr 0x40, reg 0x241, val 0x3
[MCU2_0]    110.379068 s: write 16 bits reg success: addr 0x40, reg 0x242, val 0x4
[MCU2_0]    110.379277 s: write 16 bits reg success: addr 0x40, reg 0x243, val 0x5
[MCU2_0]    110.379486 s: write 16 bits reg success: addr 0x40, reg 0x244, val 0x6
[MCU2_0]    110.379691 s: write 16 bits reg success: addr 0x40, reg 0x245, val 0x7
[MCU2_0]    110.379899 s: write 16 bits reg success: addr 0x40, reg 0x318, val 0x5e
[MCU2_0]    110.380107 s: write 16 bits reg success: addr 0x40, reg 0x2d3, val 0x0
[MCU2_0]    110.549357 s: write 16 bits reg success: addr 0x40, reg 0x2d3, val 0x10
[MCU2_0]    110.549574 s: write 16 bits reg success: addr 0x29, reg 0x8a2, val 0x0
[MCU2_0]    110.549782 s: write 16 bits reg success: addr 0x29, reg 0x8a2, val 0xf0
[MCU2_0]    110.549990 s: write 16 bits reg success: addr 0x29, reg 0x18, val 0xf
[MCU2_0]    110.909193 s: [iss_sensors] in func ecarx_read_cfgScript
[MCU2_0]    110.909254 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    110.909289 s:
[MCU2_0]    110.909309 s:
[MCU2_0]    110.909327 s: [iss_sensors] MAX96712 read status regs
[MCU2_0]    110.909356 s:
[MCU2_0]    110.909596 s: read 16 bits reg success: addr 0x29, reg 0x1a, val 0xda
[MCU2_0]    110.909848 s: read 16 bits reg success: addr 0x29, reg 0xa, val 0x0
[MCU2_0]    110.910096 s: read 16 bits reg success: addr 0x29, reg 0xb, val 0x0
[MCU2_0]    110.910341 s: read 16 bits reg success: addr 0x29, reg 0xc, val 0x0
[MCU2_0]    110.910592 s: read 16 bits reg success: addr 0x29, reg 0x10, val 0x22
[MCU2_0]    110.910835 s: read 16 bits reg success: addr 0x29, reg 0x6, val 0xff
[MCU2_0]    110.911080 s: read 16 bits reg success: addr 0x29, reg 0x5, val 0xc0
[MCU2_0]    110.911324 s: read 16 bits reg success: addr 0x29, reg 0x1dc, val 0x81
[MCU2_0]    110.911571 s: read 16 bits reg success: addr 0x29, reg 0x1fc, val 0x80
[MCU2_0]    110.911816 s: read 16 bits reg success: addr 0x29, reg 0x21c, val 0x80
[MCU2_0]    110.912061 s: read 16 bits reg success: addr 0x29, reg 0x23c, val 0x80
[MCU2_0]    110.912309 s: read 16 bits reg success: addr 0x29, reg 0x11f0, val 0x1
[MCU2_0]    110.912557 s: read 16 bits reg success: addr 0x29, reg 0x11f2, val 0x1
[MCU2_0]    110.912809 s: read 16 bits reg success: addr 0x29, reg 0x40a, val 0x0
[MCU2_0]    110.913055 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
[MCU2_0]    111.012404 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
[MCU2_0]    111.112397 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
   111.212692 s: ISS: Initializing sensor [ECARX_8MP_UYVY], doing IM_SENSOR_CMD_CONFIG ... !!!
   111.213152 s: ISS: Initializing sensor [ECARX_8MP_UYVY] ... Done !!!
[MCU2_0]    111.212400 s: read 16 bits reg success: addr 0x29, reg 0x8d0, val 0x0
[MCU2_0]    111.212445 s:
[MCU2_0]    111.212466 s:
[MCU2_0]    111.212486 s: [iss_sensors] MAX96712 read status regs end
[MCU2_0]    111.212517 s:
[MCU2_0]    111.212929 s: [iss_sensors] in func disableMAX96712Broadcast none
[MCU2_0]    111.212995 s: [iss_sensors] ecarx_8MP_Config
Scaler is disabled
   111.221786 s: ISS: Starting sensor [ECARX_8MP_UYVY] ... !!!
   111.223185 s: ISS: Starting sensor [ECARX_8MP_UYVY] ... !!!
get_dcc_dir_size : Could not open directory or directory is empty /opt/vision_apps/dcc/ECARX_8MP_UYVY/wdr


 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice:
Unsupported command



 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice: [MCU2_0]    111.222074 s: [iss_sensors] in func disableMAX96712Broadcast none
[MCU2_0]    111.222185 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    111.222465 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    111.222680 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x84
[MCU2_0]    111.222931 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x84
[MCU2_0]    111.222981 s: [iss_sensors] in func ecarx_8MP_StreamOn end
[MCU2_0]    111.223014 s:
[MCU2_0]    111.223718 s:  VX_ZONE_WARNING:[tivxCaptureSetTimeout:774]  CAPTURE: WARNING: Error frame not provided using tivxCaptureRegisterErrorFrame, defaulting to waiting forever !!!


Unsupported command



 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice: p


Summary of CPU load,
====================

CPU: mpu1_0: TOTAL LOAD =   0.50 % ( HWI =   0. 0 %, SWI =   0. 3 % )
CPU: mcu2_0: TOTAL LOAD =  11. 0 % ( HWI =   0. 0 %, SWI =   0. 0 % )
CPU: mcu2_1: TOTAL LOAD =  11. 0 % ( HWI =   0. 0 %, SWI =   0. 0 % )
CPU:  c6x_1: TOTAL LOAD =   0. 0 % ( HWI =   0. 0 %, SWI =   0. 0 % )
CPU:  c6x_2: TOTAL LOAD =   0. 0 % ( HWI =   0. 0 %, SWI =   0. 0 % )
CPU:  c7x_1: TOTAL LOAD =   0. 0 % ( HWI =   0. 0 %, SWI =   0. 0 % )


HWA performance statistics,
===========================



DDR performance statistics,
===========================

DDR: READ  BW: AVG =    967 MB/s, PEAK =   1463 MB/s
DDR: WRITE BW: AVG =    498 MB/s, PEAK =    642 MB/s
DDR: TOTAL BW: AVG =   1465 MB/s, PEAK =   2105 MB/s


Detailed CPU performance/memory statistics,
===========================================

CPU: mcu2_0: TASK:           IPC_RX:   0. 0 %
CPU: mcu2_0: TASK:       REMOTE_SRV:   0. 2 %
CPU: mcu2_0: TASK:        LOAD_TEST:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CPU_0:   0. 0 %
CPU: mcu2_0: TASK:          TIVX_NF:   0. 0 %
CPU: mcu2_0: TASK:        TIVX_LDC1:   0. 0 %
CPU: mcu2_0: TASK:        TIVX_MSC1:   0. 0 %
CPU: mcu2_0: TASK:        TIVX_MSC2:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_VISS1:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT1:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT2:   0. 3 %
CPU: mcu2_0: TASK:       TIVX_DISP1:   0. 3 %
CPU: mcu2_0: TASK:       TIVX_DISP2:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CSITX:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT3:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT4:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT5:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT6:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT7:   0. 0 %
CPU: mcu2_0: TASK:       TIVX_CAPT8:   0. 0 %
CPU: mcu2_0: TASK:      TIVX_DISP_M:   0. 0 %
CPU: mcu2_0: TASK:      TIVX_DISP_M:   0. 0 %
CPU: mcu2_0: TASK:      TIVX_DISP_M:   0. 0 %
CPU: mcu2_0: TASK:      TIVX_DISP_M:   0. 0 %

CPU: mcu2_0: HEAP:   DDR_SHARED_MEM: size =   16777216 B, free =   16689920 B ( 99 % unused)
CPU: mcu2_0: HEAP:           L3_MEM: size =     262144 B, free =     261888 B ( 99 % unused)

CPU: mcu2_1: TASK:           IPC_RX:   0. 0 %
CPU: mcu2_1: TASK:       REMOTE_SRV:   0. 0 %
CPU: mcu2_1: TASK:        LOAD_TEST:   0. 0 %
CPU: mcu2_1: TASK:         TIVX_SDE:   0. 0 %
CPU: mcu2_1: TASK:         TIVX_DOF:   0. 0 %
CPU: mcu2_1: TASK:       TIVX_CPU_1:   0. 0 %
CPU: mcu2_1: TASK:      IPC_TEST_RX:   0. 0 %
CPU: mcu2_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU: mcu2_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU: mcu2_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU: mcu2_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU: mcu2_1: TASK:      IPC_TEST_TX:   0. 0 %

CPU: mcu2_1: HEAP:   DDR_SHARED_MEM: size =   16777216 B, free =   16773376 B ( 99 % unused)
CPU: mcu2_1: HEAP:           L3_MEM: size =     262144 B, free =     262144 B (100 % unused)

CPU:  c6x_1: TASK:           IPC_RX:   0. 0 %
CPU:  c6x_1: TASK:       REMOTE_SRV:   0. 0 %
CPU:  c6x_1: TASK:        LOAD_TEST:   0. 0 %
CPU:  c6x_1: TASK:         TIVX_CPU:   0. 0 %
CPU:  c6x_1: TASK:      IPC_TEST_RX:   0. 0 %
CPU:  c6x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_1: TASK:      IPC_TEST_TX:   0. 0 %

CPU:  c6x_1: HEAP:   DDR_SHARED_MEM: size =   16777216 B, free =   16773376 B ( 99 % unused)
CPU:  c6x_1: HEAP:           L2_MEM: size =     229376 B, free =     229376 B (100 % unused)
CPU:  c6x_1: HEAP:  DDR_SCRATCH_MEM: size =   50331648 B, free =   50331648 B ( 14 % unused)

CPU:  c6x_2: TASK:           IPC_RX:   0. 0 %
CPU:  c6x_2: TASK:       REMOTE_SRV:   0. 0 %
CPU:  c6x_2: TASK:        LOAD_TEST:   0. 0 %
CPU:  c6x_2: TASK:         TIVX_CPU:   0. 0 %
CPU:  c6x_2: TASK:      IPC_TEST_RX:   0. 0 %
CPU:  c6x_2: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_2: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_2: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_2: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c6x_2: TASK:      IPC_TEST_TX:   0. 0 %

CPU:  c6x_2: HEAP:   DDR_SHARED_MEM: size =   16777216 B, free =   16773376 B ( 99 % unused)
CPU:  c6x_2: HEAP:           L2_MEM: size =     229376 B, free =     229376 B (100 % unused)
CPU:  c6x_2: HEAP:  DDR_SCRATCH_MEM: size =   50331648 B, free =   50331648 B ( 14 % unused)

CPU:  c7x_1: TASK:           IPC_RX:   0. 0 %
CPU:  c7x_1: TASK:       REMOTE_SRV:   0. 0 %
CPU:  c7x_1: TASK:        LOAD_TEST:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      TIVX_CPU_PR:   0. 0 %
CPU:  c7x_1: TASK:      IPC_TEST_RX:   0. 0 %
CPU:  c7x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c7x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c7x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c7x_1: TASK:      IPC_TEST_TX:   0. 0 %
CPU:  c7x_1: TASK:      IPC_TEST_TX:   0. 0 %

CPU:  c7x_1: HEAP:   DDR_SHARED_MEM: size =  268435456 B, free =  268435200 B (  3 % unused)
CPU:  c7x_1: HEAP:           L3_MEM: size =    8159232 B, free =    8159232 B (100 % unused)
CPU:  c7x_1: HEAP:           L2_MEM: size =     458752 B, free =     458752 B (100 % unused)
CPU:  c7x_1: HEAP:           L1_MEM: size =      16384 B, free =      16384 B (100 % unused)
CPU:  c7x_1: HEAP:  DDR_SCRATCH_MEM: size =  402653184 B, free =  402653184 B (  4 % unused)


GRAPH:         graph_84 (#nodes =   2, #executions =    133)
 NODE:       CAPTURE2:                  node_95: avg =  24400 usecs, min/max =  15843 /  37842 usecs, #executions =        133
 NODE:       DISPLAY1:                  node_96: avg =   8753 usecs, min/max =     71 /  17176 usecs, #executions =        133

 PERF:            TOTAL: avg =  33678 usecs, min/max =  16985 /  82488 usecs, #executions =        132

 PERF:            TOTAL:   29.69 FPS



 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice:
Unsupported command



 ==========================
 Demo : Single Camera w/ 2A
 ==========================

 p: Print performance statistics

 s: Save Sensor RAW, VISS Output and H3A output images to File System

 e: Export performance statistics

 u: Update DCC from File System


 x: Exit

 Enter Choice: x

   142.308527 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... !!!
[MCU2_0]    142.308811 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
   142.309833 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... Done !!!
[MCU2_0]    142.309111 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x84
[MCU2_0]    142.309336 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    142.309591 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    142.309644 s: [iss_sensors] in func ecarx_8MP_StreamOff end
[MCU2_0]    142.309680 s:
   142.352509 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... !!!
   142.353733 s: ISS: Stopping sensor [ECARX_8MP_UYVY] ... Done !!!
   142.353751 s:  VX_ZONE_ERROR:[ownReleaseReferenceInt:307] Invalid reference
[MCU2_0]    142.352735 s: Board_MAX96712GetI2CAddr : ACM i2c2 config
[MCU2_0]    142.353016 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    142.353238 s: write 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    142.353494 s: read 16 bits reg success: addr 0x29, reg 0x8a0, val 0x4
[MCU2_0]    142.353545 s: [iss_sensors] in func ecarx_8MP_StreamOff end
[MCU2_0]    142.353581 s:
[MCU2_0]    142.354200 s: ==========================================================
[MCU2_0]    142.354287 s:  Capture Status: Instance|0
[MCU2_0]    142.354321 s: ==========================================================
[MCU2_0]    142.354368 s:  overflowCount: 0
[MCU2_0]    142.354403 s:  spuriousUdmaIntrCount: 0
[MCU2_0]    142.354440 s:  frontFIFOOvflCount: 0
[MCU2_0]    142.354473 s:  crcCount: 0
[MCU2_0]    142.354505 s:  eccCount: 0
[MCU2_0]    142.354538 s:  correctedEccCount: 0
[MCU2_0]    142.354573 s:  dataIdErrorCount: 0
[MCU2_0]    142.354608 s:  invalidAccessCount: 0
[MCU2_0]    142.354642 s:  invalidSpCount: 0
[MCU2_0]    142.354680 s:  strmFIFOOvflCount[0]: 0
[MCU2_0]    142.354711 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
[MCU2_0]    142.354788 s:            0 |               934 |                  934 |                0 |                 0 |
Error : app_delete_graph returned 0xfffffff4
[MCU2_0]    142.355434 s: ==========================================================
[MCU2_0]    142.355524 s:  Capture Status: Instance|1
[MCU2_0]    142.355559 s: ==========================================================
[MCU2_0]    142.355607 s:  overflowCount: 0
[MCU2_0]    142.355643 s:  spuriousUdmaIntrCount: 0
[MCU2_0]    142.355680 s:  frontFIFOOvflCount: 0
[MCU2_0]    142.355715 s:  crcCount: 0
[MCU2_0]    142.355746 s:  eccCount: 0
[MCU2_0]    142.355779 s:  correctedEccCount: 0
[MCU2_0]    142.355813 s:  dataIdErrorCount: 0
[MCU2_0]    142.355848 s:  invalidAccessCount: 0
[MCU2_0]    142.355883 s:  invalidSpCount: 0
[MCU2_0]    142.355920 s:  strmFIFOOvflCount[0]: 0
[MCU2_0]    142.355951 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
   142.359975 s: ISS: De-initializing sensor [ECARX_8MP_UYVY] ... !!!
   142.360301 s: ISS: De-initializing sensor [ECARX_8MP_UYVY] ... Done !!!
   142.360316 s:  VX_ZONE_INIT:[tivxHostDeInitLocal:100] De-Initialization Done for HOST !!!
   142.364676 s:  VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!!
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
MEM: Alloc's: 6 alloc's of 66355460 bytes
MEM: Free's : 6 free's  of 66355460 bytes
MEM: Open's : 0 allocs  of 0 bytes
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#
root@ti-j72xx:/opt/vision_apps#

    5.第二步：2*1920x1080显示器

    -不 开始！

    也是如此。  

    当我 直接通过示波器检查 DSI 通道时、没有来自 TDA4的输出时钟。 它始终保持相同的电压(1.2V)而不会出现任何波动。

    串行器还需要设置三个参数。 如何在 TDA4 DSI 接口侧设置这些参数？

    2.如何 启用 DSI 连续时钟模式？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4118079#4118079"]2. 以及 如何启用 DSI 连续时钟模式？[/quot]

    我认为 DSI 配置为输出连续时钟、因此即使数据未传输、您也应该看到时钟。

    您正在使用多少个输出通道？ 您可以尝试使用2个通道吗？ 我还记得在使用4个通道时出现了一些问题、那么您是否可以首先尝试2通道模式？  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh

     运行 ./run_app_single_cam.sh 后，  通过示波器直接检查 DSI clkp 和 clkn 通道， TDA4没有输出 DSI_clk_p。 它始终保持相同的电压(1.2V)而不会出现任何波动。

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4118079#4118079"]1. 串行器还需要设置三个参数。 如何在 TDA4 DSI 接口端设置这些参数？[/quot]

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-DSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4118079#4118079"]

    [/报价]

    此外、还需要这三个参数来与串行器配对。

    请告诉我 如何在 TDA4 DSI 接口端设置这三个参数？

    另一种说法是三个参数、tda4 DSI 接口是否符合 DSI 基本配置1。 空数据包   2.启用 EOTP  3.同步脉冲?

    参数说明：
    DPI 构造函数根据来自同步事件短数据包、RGB888长数据包和消隐/空长数据包的视频时序构建 DPI 视频信号(HS/VS/DE/24位视频)。 视频时序模式 GMSL2 DSI 串行器支持两种视频时序模式：
    •具有同步脉冲的非突发模式
    •具有同步事件的非突发模式  

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4118091#4118091"]我认为即使在您配置了连续时钟数据时，也不应该看到连续输出时钟。]

    e2e.ti.com/.../DSIpatch.diff

    在更改为2通道后 、我测量的波形、我认为这不是正常时钟通道的波形。  e2e.ti.com/.../Hi-ECARX20220623_2D00_153233.mp4

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    您是否正在使用 EVM 进行检查？ 因为在 EVM 上、DSI 输出连接到 ub941串行器。

    如果您使用自己的板、 该板上提供了什么参考时钟？ 此补丁假设它是19.2MHz。 如果不同、我们必须相应地更改 DSITX_DPHY_REF_CLK_kHz_DEF 宏。

    此外、您能否运行一些演示并查看是否有任何时钟？  

    此致、

    Brijesh  

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh

    使用 定制板(PSDKLA8.1下的 max96789串行器及其驱动程序)。 不 是 ub941串行器。

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4121151#4121151]\n 如果您使用的是参考板、那么您的参考板有什么 可用时钟？ 此补丁假设它是19.2MHz。[/quot]

    1.帮助我了解此<reference sysclock available on my board> 。

    如果我记得正确、它  仍然使用 与我们定制板上的 EVM 设置相同的时钟。 没有什么改变！！

    正如您所说 的、所有这些 PLL 值都是根据19.2MHz 计算得出的。

    2.如何根据 系统时钟计算该值，如19.2MHz/20MHz/40MHz 等等 ？  就像这个19.2MHz 的频率从别处都没有出来了！

    或者您是说 19.2MHz 是串行器上的振荡器吗？

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4121151#4121151"]如果该选项与 VISION_EXP_DIF_RATE_RATE_UN_RUN_APP_SCON_DRV_CLK_CLK_SH/DPK_RACK_REGANTHON_DS_CK_REGENT]。

     1.猜您所说的区别是  EVM 和定制板之间的时钟系统差异。  

    2.如何从定制板获取时钟？

     

    此致、  

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/41233#4121233"]]如您所述，使用 PL2MHz/19.2MHz[ 引用所有内容]。

    但这个19.2MHz 时钟来自 SYSCLK、因此如果您在电路板上使用不同的 SYSCLK 晶体、则需要更改该基准。

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/41233#41233"]2. 如何根据 系统时钟计算该值，如19.2MHz/20MHz/40MHz 等等 ？  就像这个19.2MHz 完全没有出现[/引述]

    这是 SoC 的参考输入时钟、即板上的晶体。 您还需要在 tboo 引脚中指示参考时钟。 不确定是否已完成此操作。  

    请参阅 TRM/datasheet 的以下部分。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4121325英寸]这是板上的参考输入、即 SoC/时钟。]

    与我们的硬件团队确认后、系统时钟为19.2MHz。   与在 EVM 上使用的相同。  

    此外、已检查 ./run_app_single_cam.sh 和 ./run_app_multi_cam.sh、在 DSI clk_p 或 clk_n 引脚波形上进行探测仍然没有发生任何情况。  

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    我在 EVM 上测试了这个补丁、我认为它运行正常。 我能够从 UB941获得显示。  

    需要注意的一点是、如果提供的车道速度不正确、FB DIV 值将不正确、因此我无法获取数据。 就像我的 LCD 支持890.4Mbps 信道速度一样、如果我仅使用890Mbps 信道速度、则无法正常工作。 那么、您能否确保按照接收器的要求使用正确的通道速度。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4118079#4118079"]请确认！

     您能否 使用此补丁在 EVM 上测试 SDK 版本8.1？  

    1.我有一个问题、为什么在没有串行器影响的情况下无法测量 SoC 侧的 DSI-Tx clkp 或 clkn 信号。  

    还是仅仅因为 CLK 受到 lanespeed 速率计算误差的影响？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    8.1和8.2中没有驱动程序更改、我希望结果与8.1上的8.2相同。

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4125183#4125183"]

    1.我有一个问题、为什么在没有串行器影响的情况下无法测量 SoC 侧的 DSI-Tx clkp 或 clkn 信号。  

    还是仅仅因为 CLK 受到 lanespeed 速率计算误差的影响？

    [/报价]

    我没有得到这个。 您是否仅在配置串行器后才看到时钟？  DSI CLK 输出不依赖于 串行器。 只要 有来自 DSS 的数据、我们就应该看到 CLK。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4125398#4125398]DSI CLK 输出与 串行器无关。 只要 有来自 DSS 的数据、我们就应该看到 CLK。  [/报价]

    是、 无摄像头、无显示屏。  只应用了补丁、使用 SDK8.1和 SDK8.2在 EVM 上进行了测试、但两个 SDK 都未成功测量时钟。

    在 DSI-Tx clkp 或 clkn 上进行探头 、没有任何切换！！！

    请添加 图片附件以说明测量的时钟波形。

    加法。 SDK8.1 源文件 vision_apps_init.sh 成功。 SDK8.2未能按如下方式记录。  

    1.源故障是否影响时钟切换？ <我认为此源故障不会导致时钟 切换> 

    root@j7-evm:~# cd /opt/vision_apps/
root@j7-evm:/opt/vision_apps#
root@j7-evm:/opt/vision_apps#
root@j7-evm:/opt/vision_apps# source ./vision_apps_init.sh
root@j7-evm:/opt/vision_apps# [MCU2_0]      3.791415 s: CIO: Init ... Done !!!
[MCU2_0]      3.791482 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]      3.791524 s: APP: Init ... !!!
[MCU2_0]      3.791550 s: SCICLIENT: Init ... !!!
[MCU2_0]      3.791802 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[MCU2_0]      3.791852 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_0]      3.791886 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]      3.791923 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      3.791950 s: UDMA: Init ... !!!
[MCU2_0]      3.793256 s: UDMA: Init ... Done !!!
[MCU2_0]      3.793314 s: MEM: Init ... !!!
[MCU2_0]      3.793358 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]      3.793434 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
[MCU2_0]      3.793499 s: MEM: Init ... Done !!!
[MCU2_0]      3.793525 s: IPC: Init ... !!!
[MCU2_0]      3.793588 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_0]      3.793636 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     16.743623 s: IPC: HLOS is ready !!!
[MCU2_0]     16.758797 s: IPC: Init ... Done !!!
[MCU2_0]     16.758865 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     17.043977 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     17.044208 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     17.045753 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     17.045818 s: ETHFW: Init ... !!!
[MCU2_0]     17.065758 s: ETHFW: Shared multicasts (software fanout):
[MCU2_0]     17.065828 s:   01:00:5e:00:00:01
[MCU2_0]     17.065884 s:   01:00:5e:00:00:fb
[MCU2_0]     17.065929 s:   01:00:5e:00:00:fc
[MCU2_0]     17.065974 s:   33:33:00:00:00:01
[MCU2_0]     17.066019 s:   33:33:ff:1d:92:c2
[MCU2_0]     17.066062 s:   01:80:c2:00:00:00
[MCU2_0]     17.066106 s:   01:80:c2:00:00:03
[MCU2_0]     17.066161 s: ETHFW: Reserved multicasts:
[MCU2_0]     17.066186 s:   01:80:c2:00:00:0e
[MCU2_0]     17.066231 s:   01:1b:19:00:00:00
[MCU2_0]     17.066477 s: EnetMcm: CPSW_9G on MAIN NAVSS
[MCU2_0]     17.076406 s: CpswMacPort_setSgmiiInterface: MAC 2: SERDES PLL is not locked
[MCU2_0]     17.076483 s: CpswMacPort_setSgmiiInterface: MAC 2: Failed to set SGMII interface: -9
[MCU2_0]     17.076542 s: CpswMacPort_open: MAC 2: failed to set Q/SGMII interface: -9
[MCU2_0]     17.076589 s: EnetMod_open: cpsw9g.macport2: Failed to open: -9
[MCU2_0]     17.076636 s: Cpsw_openPortLinkWithPhy: Port 2: Failed to open MAC: -9
[MCU2_0]     17.076684 s: Cpsw_ioctlInternal: Port 2: Failed to open port link: -9
[MCU2_0]     17.076722 s: EnetMcm_enablePorts() failed to open MAC port: -9
[MCU2_0]     17.076858 s: CpswMacPort_setSgmiiInterface: MAC 5: SERDES PLL is not locked
[MCU2_0]     17.076920 s: CpswMacPort_setSgmiiInterface: MAC 5: Failed to set SGMII interface: -9
[MCU2_0]     17.076974 s: CpswMacPort_open: MAC 5: failed to set Q/SGMII interface: -9
[MCU2_0]     17.077021 s: EnetMod_open: cpsw9g.macport5: Failed to open: -9
[MCU2_0]     17.077066 s: Cpsw_openPortLinkWithPhy: Port 5: Failed to open MAC: -9
[MCU2_0]     17.077110 s: Cpsw_ioctlInternal: Port 5: Failed to open port link: -9
[MCU2_0]     17.077159 s: EnetMcm_enablePorts() failed to open MAC port: -9
[MCU2_0]     17.077290 s: CpswMacPort_setSgmiiInterface: MAC 6: SERDES PLL is not locked
[MCU2_0]     17.077351 s: CpswMacPort_setSgmiiInterface: MAC 6: Failed to set SGMII interface: -9
[MCU2_0]     17.077403 s: CpswMacPort_open: MAC 6: failed to set Q/SGMII interface: -9
[MCU2_0]     17.077449 s: EnetMod_open: cpsw9g.macport6: Failed to open: -9
[MCU2_0]     17.077494 s: Cpsw_openPortLinkWithPhy: Port 6: Failed to open MAC: -9
[MCU2_0]     17.077538 s: Cpsw_ioctlInternal: Port 6: Failed to open port link: -9
[MCU2_0]     17.077575 s: EnetMcm_enablePorts() failed to open MAC port: -9
[MCU2_0]     17.077706 s: CpswMacPort_setSgmiiInterface: MAC 7: SERDES PLL is not locked
[MCU2_0]     17.077765 s: CpswMacPort_setSgmiiInterface: MAC 7: Failed to set SGMII interface: -9
[MCU2_0]     17.077821 s: CpswMacPort_open: MAC 7: failed to set Q/SGMII interface: -9
[MCU2_0]     17.077869 s: EnetMod_open: cpsw9g.macport7: Failed to open: -9
[MCU2_0]     17.077921 s: Cpsw_openPortLinkWithPhy: Port 7: Failed to open MAC: -9
[MCU2_0]     17.077968 s: Cpsw_ioctlInternal: Port 7: Failed to open port link: -9
[MCU2_0]     17.078008 s: EnetMcm_enablePorts() failed to open MAC port: -9
[MCU2_1]      3.750942 s: CIO: Init ... Done !!!
[MCU2_1]      3.751012 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]      3.751055 s: APP: Init ... !!!
[MCU2_1]      3.751078 s: SCICLIENT: Init ... !!!
[MCU2_1]      3.751329 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[MCU2_1]      3.751377 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_1]      3.751410 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]      3.751445 s: SCICLIENT: Init ... Done !!!
[MCU2_1]      3.751471 s: UDMA: Init ... !!!
[MCU2_1]      3.752954 s: UDMA: Init ... Done !!!
[MCU2_1]      3.753018 s: MEM: Init ... !!!
[MCU2_1]      3.753060 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]      3.753136 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!!
[MCU2_1]      3.753198 s: MEM: Init ... Done !!!
[MCU2_1]      3.753223 s: IPC: Init ... !!!
[MCU2_1]      3.753285 s: IPC: 6 CPUs participating in IPC !!!
[MCU2_1]      3.753334 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     17.028687 s: IPC: HLOS is ready !!!
[MCU2_1]     17.043861 s: IPC: Init ... Done !!!
[MCU2_1]     17.043928 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_1]     17.043976 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_1]     17.044012 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     17.045849 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     17.045912 s: FVID2: Init ... !!!
[MCU2_1]     17.045981 s: FVID2: Init ... Done !!!
[MCU2_1]     17.046014 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     17.046041 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2
[MCU2_1]     17.046474 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     17.046521 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2
[MCU2_1]     17.046966 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     17.047000 s: VHWA: DOF Init ... !!!
[MCU2_1]     17.055461 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     17.055528 s: VHWA: SDE Init ... !!!
[MCU2_1]     17.058217 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     17.058273 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     17.058319 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     17.058348 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     17.058374 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     17.059540 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DMPAC_SDE
[MCU2_1]     17.059805 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target DMPAC_DOF
[MCU2_1]     17.060056 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:54] Added target IPU1-1
[MCU2_1]     17.060111 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     17.060149 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     17.060457 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     17.060512 s: UDMA Copy: Init ... !!!
[MCU2_1]     17.062275 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     17.062339 s: APP: Init ... Done !!!
[MCU2_1]     17.062369 s: APP: Run ... !!!
[MCU2_1]     17.062393 s: IPC: Starting echo test ...
[MCU2_1]     17.065304 s: APP: Run ... Done !!!
[MCU2_1]     17.066515 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_1]     17.066640 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_1]     17.066733 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
[C6x_1 ]      3.820004 s: CIO: Init ... Done !!!
[C6x_1 ]      3.820030 s: ### CPU Frequency = 1350000000 Hz
[C6x_1 ]      3.820041 s: APP: Init ... !!!
[C6x_1 ]      3.820049 s: SCICLIENT: Init ... !!!
[C6x_1 ]      3.820266 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C6x_1 ]      3.820278 s: SCICLIENT: DMSC FW revision 0x15
[C6x_1 ]      3.820287 s: SCICLIENT: DMSC FW ABI revision 3.1
[C6x_1 ]      3.820297 s: SCICLIENT: Init ... Done !!!
[C6x_1 ]      3.820306 s: UDMA: Init ... !!!
[C6x_1 ]      3.821759 s: UDMA: Init ... Done !!!
[C6x_1 ]      3.821777 s: MEM: Init ... !!!
[C6x_1 ]      3.821791 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!!
[C6x_1 ]      3.821808 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
[C6x_1 ]      3.821823 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ dd000000 of size 50331648 bytes !!!
[C6x_1 ]      3.821839 s: MEM: Init ... Done !!!
[C6x_1 ]      3.821848 s: IPC: Init ... !!!
[C6x_1 ]      3.821868 s: IPC: 6 CPUs participating in IPC !!!
[C6x_1 ]      3.821882 s: IPC: Waiting for HLOS to be ready ... !!!
[C6x_1 ]     15.517012 s: IPC: HLOS is ready !!!
[C6x_1 ]     15.520842 s: IPC: Init ... Done !!!
[C6x_1 ]     15.520870 s: APP: Syncing with 5 CPUs ... !!!
[C6x_1 ]     17.043976 s: APP: Syncing with 5 CPUs ... Done !!!
[C6x_1 ]     17.043989 s: REMOTE_SERVICE: Init ... !!!
[C6x_1 ]     17.044631 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_1 ]     17.044669 s:  VX_ZONE_INIT:Enabled
[C6x_1 ]     17.044681 s:  VX_ZONE_ERROR:Enabled
[C6x_1 ]     17.044690 s:  VX_ZONE_WARNING:Enabled
[C6x_1 ]     17.045407 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_1 ]     17.045426 s: APP: OpenVX Target kernel init ... !!!
[C6x_1 ]     17.045800 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_1 ]     17.045821 s: UDMA Copy: Init ... !!!
[C6x_1 ]     17.049394 s: UDMA Copy: Init ... Done !!!
[C6x_1 ]     17.049412 s: APP: Init ... Done !!!
[C6x_1 ]     17.050269 s: APP: Run ... !!!
[C6x_1 ]     17.050279 s: IPC: Starting echo test ...
[C6x_1 ]     17.051372 s: APP: Run ... Done !!!
[C6x_1 ]     17.051696 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P]
[C6x_1 ]     17.052082 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_1 ]     17.065867 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
[C6x_2 ]      3.913576 s: CIO: Init ... Done !!!
[C6x_2 ]      3.913602 s: ### CPU Frequency = 1350000000 Hz
[C6x_2 ]      3.913613 s: APP: Init ... !!!
[C6x_2 ]      3.913621 s: SCICLIENT: Init ... !!!
[C6x_2 ]      3.913843 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C6x_2 ]      3.913856 s: SCICLIENT: DMSC FW revision 0x15
[C6x_2 ]      3.913865 s: SCICLIENT: DMSC FW ABI revision 3.1
[C6x_2 ]      3.913875 s: SCICLIENT: Init ... Done !!!
[C6x_2 ]      3.913885 s: UDMA: Init ... !!!
[C6x_2 ]      3.915365 s: UDMA: Init ... Done !!!
[C6x_2 ]      3.915384 s: MEM: Init ... !!!
[C6x_2 ]      3.915397 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e0000000 of size 16777216 bytes !!!
[C6x_2 ]      3.915415 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
[C6x_2 ]      3.915430 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e1000000 of size 50331648 bytes !!!
[C6x_2 ]      3.915447 s: MEM: Init ... Done !!!
[C6x_2 ]      3.915455 s: IPC: Init ... !!!
[C6x_2 ]      3.915476 s: IPC: 6 CPUs participating in IPC !!!
[C6x_2 ]      3.915490 s: IPC: Waiting for HLOS to be ready ... !!!
[C6x_2 ]     15.656429 s: IPC: HLOS is ready !!!
[C6x_2 ]     15.660041 s: IPC: Init ... Done !!!
[C6x_2 ]     15.660069 s: APP: Syncing with 5 CPUs ... !!!
[C6x_2 ]     17.043975 s: APP: Syncing with 5 CPUs ... Done !!!
[C6x_2 ]     17.043988 s: REMOTE_SERVICE: Init ... !!!
[C6x_2 ]     17.044644 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_2 ]     17.044685 s:  VX_ZONE_INIT:Enabled
[C6x_2 ]     17.044695 s:  VX_ZONE_ERROR:Enabled
[C6x_2 ]     17.044705 s:  VX_ZONE_WARNING:Enabled
[C6x_2 ]     17.045433 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C6x_2 ]     17.045505 s: APP: OpenVX Target kernel init ... !!!
[C6x_2 ]     17.045832 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_2 ]     17.045852 s: UDMA Copy: Init ... !!!
[C6x_2 ]     17.049717 s: UDMA Copy: Init ... Done !!!
[C6x_2 ]     17.049736 s: APP: Init ... Done !!!
[C6x_2 ]     17.050549 s: APP: Run ... !!!
[C6x_2 ]     17.050559 s: IPC: Starting echo test ...
[C6x_2 ]     17.051769 s: APP: Run ... Done !!!
[C6x_2 ]     17.052096 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.]
[C6x_2 ]     17.052130 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P]
[C6x_2 ]     17.065898 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
[C7x_1 ]      4.145953 s: CIO: Init ... Done !!!
[C7x_1 ]      4.145969 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]      4.145980 s: APP: Init ... !!!
[C7x_1 ]      4.145988 s: SCICLIENT: Init ... !!!
[C7x_1 ]      4.146186 s: SCICLIENT: DMSC FW version [21.9.1--v2021.09a (Terrific Lla]
[C7x_1 ]      4.146200 s: SCICLIENT: DMSC FW revision 0x15
[C7x_1 ]      4.146210 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]      4.146220 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]      4.146229 s: UDMA: Init ... !!!
[C7x_1 ]      4.147338 s: UDMA: Init ... Done !!!
[C7x_1 ]      4.147350 s: MEM: Init ... !!!
[C7x_1 ]      4.147360 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ 100000000 of size 268435456 bytes !!!
[C7x_1 ]      4.147381 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!!
[C7x_1 ]      4.147398 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]      4.147415 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]      4.147432 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e4000000 of size 385875968 bytes !!!
[C7x_1 ]      4.147450 s: MEM: Init ... Done !!!
[C7x_1 ]      4.147458 s: IPC: Init ... !!!
[C7x_1 ]      4.147472 s: IPC: 6 CPUs participating in IPC !!!
[C7x_1 ]      4.147486 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     15.894623 s: IPC: HLOS is ready !!!
[C7x_1 ]     15.896563 s: IPC: Init ... Done !!!
[C7x_1 ]     15.896577 s: APP: Syncing with 5 CPUs ... !!!
[C7x_1 ]     17.043976 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_1 ]     17.043993 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     17.044146 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     17.044168 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     17.044178 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     17.044187 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     17.044375 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1
[C7x_1 ]     17.044505 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2
[C7x_1 ]     17.044573 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3
[C7x_1 ]     17.044639 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4
[C7x_1 ]     17.044703 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5
[C7x_1 ]     17.044832 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6
[C7x_1 ]     17.044903 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7
[C7x_1 ]     17.044964 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8
[C7x_1 ]     17.044985 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     17.044997 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     17.045180 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     17.045194 s: APP: Init ... Done !!!
[C7x_1 ]     17.045202 s: APP: Run ... !!!
[C7x_1 ]     17.045210 s: IPC: Starting echo test ...
[C7x_1 ]     17.045363 s: APP: Run ... Done !!!
[C7x_1 ]     17.051699 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s]
[C7x_1 ]     17.052101 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s]
[C7x_1 ]     17.065928 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]

root@j7-evm:/opt/vision_apps#
root@j7-evm:/opt/vision_apps# [  135.055160] Initializing XFRM netlink socket
[  138.159395] process 'docker/tmp/qemu-check787307623/check' started with executable stack

root@j7-evm:/opt/vision_apps#

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
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    大家好、墨菲、

    对于 SDK8.2、DSI 上预计没有输出、因为 MCU2_0看起来根本不初始化 DSI。 似乎无法在 以太网固件中的某个位置初始化。 不确定原因、我刚刚尝试过 EVM SDK8.2、它工作正常、我看不到以太网固件发生故障。 目前、您是否可以尝试禁用 MCU2_0上的以太网固件？  

    [MCU2_0] 17.506502 s：ETHFW：初始化... ！！！
    [MCU2_0] 17.526567 s：ETHFW：共享多播(软件扇出)：
    [MCU2_0] 17.526644 s：01：00：5e：00：00：01
    [MCU2_0] 17.526703 s：01：00：5e：00：00：fb
    [MCU2_0] 17.526754 s：01：00：5e：00：00：fc
    [MCU2_0] 17.526802：33：00：00：00：01
    [MCU2_0] 17.526851 s：33：ff：1D：92：C2
    [MCU2_0] 17.526899 s：01：80：C2：00：00：00
    [MCU2_0] 17.526947 s：01：80：C2：00：00：03
    [MCU2_0] 17.527008 s：ETHFW：保留多播：
    [MCU2_0] 17.527038 s：01：80：C2：00：00：0e
    [MCU2_0] 17.527087 s：01：1b：19：00：00：00
    [MCU2_0] 17.527350 s：EnetMcm：主 NAVSS 上的 CPSW_9G
    [MCU2_0] 17.536768 s：PHY 16处于活动状态
    [MCU2_0] 17.536854 s：PHY 17处于活动状态
    [MCU2_0] 17.536900 s：PHY 18处于活动状态
    [MCU2_0] 17.536935 s：PHY 19处于活动状态
    [MCU2_0] 17.537693 s：EnetPhy_bindDriver：PHY 16：OUI：0001c1型号：27 Ver：00 <-> vsc8514'：好
    [MCU2_0] 17.538043 s：EnetPhy_bindDriver：PHY 17：OUI：0001c1模型：27 Ver：00 <->'vsc8514'：确定
    [MCU2_0] 17.538394 s：EnetPhy_bindDriver：PHY 18：OUI：0001c1型号：27 Ver：00 <->'vsc8514'：确定
    [MCU2_0] 17.538718 s：EnetPhy_bindDriver：PHY 19：OUI：0001c1模型：27 Ver:00 <-> vsc8514'：好

    我在您的电路板中注意到的一件事是  、在电路板的引导端连接了一些东西。 是信息娱乐板吗？ 您可以移除此电路板吗？  

    此外、您能否检查 CTRLMMR_DPHY_TX0_CTRL 和 CTRLMMR_DPHY0_CLKSEL 的值
     寄存器？   两个寄存器 都必须设置为0x0。

    此致、

    Brijesh
      

  • 0
    TI__Guru**** 2779905 points
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    此外、查看时序信息、像素时钟似乎不正确(1920 + 110 + 220 + 40) x (1080 + 5 + 20 + 5) x 60 ~= 153MHz。 这需要大约918Mbps 的通道速度、153MHz x 24 / 4 ~= 918Mbps。 请检查 UB941是否 真正支持该分辨率/通道速度。

    prm.timings.width = 1920U；//1280U；
    PRM.timings.height = 1080U；//800U；
    prm.timings.hFrontPorch = 110U；
    prm.timings.hBackPorch = 220U；
    prm.timings.hSyncLen = 40U；
    prm.timings.vFrontPorch = 5U；
    prm.timings.vBackPorch = 20U；
    prm.timings.vSyncLen = 5U；
    prm.timings.pixelClock = 143040000ULL；//74250000ULL；

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
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    您好  、

    UB941支持 每通道1.5Gbps >  918Mbps

  • 0
    TI__Guru**** 2779905 points
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    尊敬的 Alex：

    但是、在什么像素时钟和哪种格式？ 您能检查一下吗？

    您能否尝试较低的分辨率、比如 SDK 提供的原始1280x800分辨率、看看您是否能够获得一些输出？  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
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    您好、Brejish、

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4126957#4126957"]以太网固件无法正常工作、我看不到以太网固件发生故障。 目前、您是否可以尝试禁用 MCU2_0上的以太网固件？  [/报价]

    CPSW9G <related files for making a boot SD card are missing> ！！ 请忽略！

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4125398#4125398]DSI CLK 输出与 串行器无关。 只要 有来自 DSS 的数据、我们就应该看到 CLK。  [/报价]

    注：SDK8.2

    1：EVM 未连接摄像头或屏幕。
    主要问题是 DSI-Tx 时钟、   

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4126957#4126957"]此外、请检查 LMCLKMR_RPM0的值
     寄存器？   两个寄存器 都必须设置为0x0。[/QUERP] 

    [MCU2_0]     15.340296 s: src/drv/dctrl/dss_dctrlDsi.c @ Line 616:
[MCU2_0]     15.340353 s: zpf_DSI_register: CSL_MAIN_CTRL_MMR_CFG0_DPHY_TX0_CTRL = 0 , CSL_MAIN_CTRL_MMR_CFG0_DPHY0_CLKSEL = 0

    还确认寄存器值设置为0。 仍然没有从探测点进行任何切换 。  

    修改：仅修改了文件(vision_apps/platform/j721e/rtos/common/app_cfg_MCU2_0.h)以启用 DSI 输出。

    e2e.ti.com/.../Hi-ECARX20220629_2D00_182154.mp4

    您能否添加 图片/视频附件以说明 clk 波形。

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
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    大家好、墨菲、

    请参阅以下 TT 吗？ 此 TT 上报告了类似问题、现在我们看到 DSI 的一些输出。  

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1112916/tda4vm-tda4vm-dsi-with-1080x1920-resolution-dose-not-work

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
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    您好  、Brijesh Jadav

    我将分辨率更改为1280*800，run_apps_dof.sh，显示以下错误：

    PAPI.c @第1856行：
    [MCU2_0] 75.875803 s：输入宽度+ startx/height + startY >显示宽度/高度
    [MCU2_0] 75.875853 s：src/drv/disp/dss_dispapi.c @第1471行：
    [MCU2_0] 75.875889 s：设置 DSS 参数 IOCTL 失败
    [MCU2_0] 75.875933 s：vx_zone_error：[TIvxDisplayCreate：630] display：error：display set Parameters failed！
    75.890828 s：vx_zone_error：[ownContextSendCmd：815]命令 ACK 消息返回故障 CMD_STATUS：-1
    75.890839 s：vx_zone_error：[ownContextSendCmd：851] tivxEventWait()失败。
    75.890845 s：vx_zone_error：[ownNodeKernelInit：538] Target kernel、TIVX_CMD_NODE_CREATE Failed for Node Output Display
    75.890851 s：vx_zone_error：[ownNodeKernelInit：539]请确保已为此内核注册目标回调
    75.890857 s：vx_zone_error：[ownNodeKernelInit：540]如果已注册目标回调、请确保此内核的 create 回调中未发生错误
    75.890914 s：vx_zone_error：[ownGraphNodeKernelInit：583] kernel init for node 3、kernel com.ti.hw.display…… 失败！！！
    75.890924 s：vx_zone_error：[vxVerifyGraph：2055]节点内核初始化失败
    75.890930 s：vx_zone_error：[vxVerifyGraph：2109] Graph verify failed
    75.892759 s：vx_zone_init：[TIVxHostDeInitLocal：100]主机已完成去初始化！！
    [MCU2_0] 75.890478 s：src/drv/disp/dss_dispapi.c @第1856行：
    [MCU2_0] 75.890528 s：输入宽度+ startx/height + startY >显示宽度/高度
    [MCU2_0] 75.890581 s：src/drv/disp/dss_dispapi.c @第1471行：
    [MCU2_0] 75.890627 s：设置 DSS 参数 IOCTL 失败
    [MCU2_0] 75.890674 s：vx_zone_error：[TIvxDisplayCreate：630]显示：错误：显示设置参数失败！
    75.897111 s：vx_zone_init：[TIvxDeInitLocal：193]取消初始化完成！！！

    我的修改是

    e2e.ti.com/.../8713.pdk.diffe2e.ti.com/.../vision_5F00_apps.diff

  • 0
    TI__Guru**** 2779905 points
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    尊敬的 Alex：

    在这种情况下、您能否更改 显示参数中的输出/目标分辨率和位置？ 这在 ti-processor-sdk-rtos-j721e-evm-08_02_00_05\vision_apps\apps\basic_demos\app_DOF\DOF_display_module.c 中指定  

    displayObj->output_display_params.outWidth = 1280；
    displayObj->output_display_params.outHeight = 800；
    displayObj->output_display_params.posX = 0；
    displayObj->output_display_params.posy = 0；

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
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    您好 、Brijesh、

    您能告诉我  output_display_params.pipeId 是什么意思吗？ DSI 输出是否正确？

        displayObj->output_display_params.opMode=TIVX_kernel_display_zero_buffer_copy_mode；
        displayObj->output_display_params.pipeId = 0；
        displayObj->output_display_params.outWidth = 1280；//output_display_width；
        displayObj->output_display_params.outHeight = 800；//output_display_height；
        displayObj->output_display_params.posX = 0；//(1920-output_display_width)；
        displayObj->output_display_params.posy = 0；//(1080-output_display_height)/2 - 80；
  • 0
    TI__Guru**** 2779905 points
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    尊敬的 Alex：

    pipeid 是指显示器中的视频管线、DSS 中有视频输入管线、两个 VID 和两个 VIDL。 我认为 pipeid 0和2是 VID 流水线、1和3是 VIDL 流水线。

    是的、参数看起来很好。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
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    您好、Brijesh、

    好消息！！  

    由于 硬件故障、EVM 和定制板都可以看到 CLK 信号切换。

    在 更改文件的分辨率后，使用默认的1280*800和./run_app_single_cam.sh 演示

    (ti-processor-sdk-rtos-j721e-evm-08_01_00_13\vision_apps\platform\j721e\rtos\common\app_init.c  ti-processor-sdk-rtos-j721e-evm-08_01_00_13\vision_apps\modules\src\app_display_module.c)  

     日志下方仍出现错误。 是否 需要修改死区文件或修改了错误的文件？ 

    [MCU2_0]     89.816007 s: [iss_sensors] ecarx_8MP_Config
    89.822116 s:  VX_ZONE_ERROR:[ownContextSendCmd:815] Command ack message returned failure cmd_status: -1
    89.822127 s:  VX_ZONE_ERROR:[ownContextSendCmd:851] tivxEventWait() failed.
    89.822135 s:  VX_ZONE_ERROR:[ownNodeKernelInit:538] Target kernel, TIVX_CMD_NODE_CREATE failed for node node_96
    89.822142 s:  VX_ZONE_ERROR:[ownNodeKernelInit:539] Please be sure the target callbacks have been registered for this core
    89.822149 s:  VX_ZONE_ERROR:[ownNodeKernelInit:540] If the target callbacks have been registered, please ensure no errors are occurring within the create callback of this kernel
    89.822232 s:  VX_ZONE_ERROR:[ownGraphNodeKernelInit:583] kernel init for node 1, kernel com.ti.hwa.display ... failed !!!
    89.822243 s:  VX_ZONE_ERROR:[vxVerifyGraph:2055] Node kernel init failed
    89.822250 s:  VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed
Scaler is disabled
    89.824925 s: ISS: Starting sensor [ECARX_8MP_UYVY] ... !!!


[MCU2_0]     89.821778 s: src/drv/disp/dss_dispApi.c @ Line 1856:
[MCU2_0]     89.821833 s: Input width+startX/height+startY > display width/height
[MCU2_0]     89.821887 s: src/drv/disp/dss_dispApi.c @ Line 1471:
[MCU2_0]     89.821920 s: Set DSS parameter IOCTL failed
[MCU2_0]     89.821961 s:  VX_ZONE_ERROR:[tivxDisplayCreate:630] DISPLAY: ERROR: Display Set Parameters Failed!

    此外，PSDKRA8.1中的 DSI 驱动器是否符合这三种配置或使用了其他设计配置 ？

    请告诉我、   因为串行器的配置必须与 DSI 驱动器设置中的配置相同！

    此致

    墨菲。

  • 0
    TI__Guru**** 2779905 points
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    大家好、墨菲、

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4129865#4129865"]由于定制信号切换，EVM 和 CLK 均可查看 自定义信号[引用]

    很高兴知道 CLK 信号上有一些输出。

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4129865#4129865"]

    在 更改文件的分辨率后，使用默认的1280*800和./run_app_single_cam.sh 演示

    (ti-processor-sdk-rtos-j721e-evm-08_01_00_13\vision_apps\platform\j721e\rtos\common\app_init.c  ti-processor-sdk-rtos-j721e-evm-08_01_00_13\vision_apps\modules\src\app_display_module.c)  

    [/报价]

    我认为单个摄像头示例不使用此显示模块。 显示参数硬编码在文件 ti-processor-sdk-rtos-j721e-evm-08_02_00_05\vision_apps\apps\basic_demos\app_single_cam\app_single_cam_main.c 中 请确保将 display_params.posX 和 display_params.posy 设置为0、 将 display_params.outWidth 和 display_params.outHeight 设置为1280x800分辨率。  

    您也可以使用多摄像头示例。 此示例使用模块文件夹中的显示模块、也可用于显示单个摄像头。  

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4129865#4129865"]由于   引用的驱动程序配置与 dSI/串行器相同，请告知我，请使用相同的配置！]

    不确定此配置是什么。 请帮帮我。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好 、Brijesh、

    我已修改 outWidth/outHeight   /posX  /posy ，但仍报告相同的错误。

    diff --git a/vision_apps/apps/basic_demos/app_DOF/DOF_display_module.c b/vision_apps/apps/basic_demos/app_DOF/DOF_display_module.c
    索引0b0b9c4d..24f28883 100644
    -- a/vision_apps/apps/basic_demos/app_DOF/DOF_display_module.c
    ++ b/vision_apps/apps/basic_demos/app_DOF/DOF_display_module.c
    @@-77、10 +77、10 @@ vx_status app_init_display1 (vx_context context、DisplayObj *显示对象、char * ob

    displayObj->output_display_params.opMode=TIVX_kernel_display_zero_buffer_copy_mode；
    displayObj->output_display_params.pipeId = 0；
    - displayObj->output_display_params.outWidth = output_display_width；
    - displayObj->output_display_params.outHeight = output_display_height；
    - displayObj->output_display_params.posX =(1920-output_display_width)；
    - displayObj->output_display_params.posy =(1080-output_display_height)/2 - 80；
    + displayObj->output_display_params.outWidth = 1280；//output_display_width；
    + displayObj->output_display_params.outHeight = 800；//output_display_height；
    + displayObj->output_display_params.posX = 0；//(1920-output_display_width)；
    + displayObj->output_display_params.posy = 0；//(1080-output_display_height)/2 - 80；

    status = vxCopyUserDataObject (displayObj->output_display_config、0、sizeof (tivx_display_params_t)、&displayObj->output_display_params、vx_write_only、 vx_memory_type_host)；
    APP_ASSERT (status=vx_Success)；
    @@-104、11 +104、10 @@ vx_status app_init_Display2 (vx_context context、DisplayObj *显示对象、char * ob

    displayObj->input_display_params.opMode=TIVX_kernel_display_zero_buffer_copy_mode；
    displayObj->input_display_params.pipeId = 2；
    - displayObj->input_display_params.outWidth = input_display_width；
    - displayObj->input_display_params.outHeight = input_display_height；
    + displayObj->input_display_params.outWidth = 1280；//input_display_width；
    + displayObj->input_display_params.outHeight = 800；//input_display_height；
    displayObj->input_display_params.posX = 0；
    - displayObj->input_display_params.posy =(1080-input_display_height)/2 - 80；
    -
    + displayObj->input_display_params.posy = 0；//(1080-input_display_height)/2 - 80；

    根目录@J7-EVM：/opt/vision_apps#./run_app_dof.sh
    应用程序：初始化... ！！！
    MEM：初始化... ！！！
    MEM：已初始化的 DMA 堆(FD=4)！！！
    MEM：初始化... 完成了！！！
    IPC：初始化... ！！！
    IPC：初始化... 完成了！！！
    远程服务：初始化... ！！！
    远程服务：初始化... 完成了！！！
    42.280451 s：GTC 频率= 200MHz
    应用程序：初始化... 完成了！！！
    42.287101 s：vx_zone_init：已启用
    42.287112 s：vx_zone_error：Enabled
    42.287126 s：vx_zone_warning：Enabled
    42.289660 s：vx_zone_init：[TIvxInitLocal：130]初始化完成！！！
    42.291597 s：vx_zone_init：[TIvxHostInitLocal：86]主机的初始化已完成！！！
    42.300046 s：vx_zone_error：[ownContextSendCmd：815]命令 ACK 消息返回故障 cmd_status：-1
    42.300063 s：vx_zone_error：[ownContextSendCmd：851] tivxEventWait()失败。
    42.300070 s：vx_zone_error：[ownNodeKernelInit：538] Target

  • 0
    TI__Guru**** 2779905 points
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    根目录@J7-EVM：/opt/vision_apps#./run_app_dof.sh
    应用程序：初始化... ！！！
    MEM：初始化... ！！！
    MEM：已初始化的 DMA 堆(FD=4)！！！
    MEM：初始化... 完成了！！！
    IPC：初始化... ！！！
    IPC：初始化... 完成了！！！
    远程服务：初始化... ！！！
    远程服务：初始化... 完成了！！！
    42.280451 s：GTC 频率= 200MHz
    应用程序：初始化... 完成了！！！
    42.287101 s：vx_zone_init：已启用
    42.287112 s：vx_zone_error：Enabled
    42.287126 s：vx_zone_warning：Enabled
    42.289660 s：vx_zone_init：[TIvxInitLocal：130]初始化完成！！！
    42.291597 s：vx_zone_init：[TIvxHostInitLocal：86]主机的初始化已完成！！！
    42.300046 s：vx_zone_error：[ownContextSendCmd：815]命令 ACK 消息返回故障 cmd_status：-1
    42.300063 s：vx_zone_error：[ownContextSendCmd：851] tivxEventWait()失败。
    42.300070 s：vx_zone_error：[ownNodeKernelInit：538]目标内核、TIVX_CMD_NODE_CREATE 对于节点 NODE_115失败
    42.300076 s：vx_zone_error：[ownNodeKernelInit：539]请确保已为此内核注册目标回调
    42.300083 s：vx_zone_error：[ownNodeKernelInit：540]如果已注册目标回调、请确保此内核的 create 回调中未发生错误
    42.300090 s：vx_zone_error：[ownGraphNodeKernelInit：583]针对节点0的内核初始化、kernel com.ti.hw.display…… 失败！！！
    42.300098 s：vx_zone_error：[vxVerifyGraph：2055]节点内核初始化失败
    42.300104 s：vx_zone_error：[vxVerifyGraph：2109] Graph verify failed
    GRPX：错误：无法验证图形！！！
    [MCU2_0] 42.299664 s：src/drv/disp/dss_dispapi.c @第1856行：
    [MCU2_0] 42.299712 s：输入宽度+ startx：/height+startY >显示宽度/高度
    [MCU2_0] 42.299761 s：src/drv/disp/dss_dispapi.c @第1471行：
    [MCU2_0] 42.299795 s：设置 DSS 参数 IOCTL 失败
    [MCU2_0] 42.299841 s：vx_zone_error：[TIvxDisplayCreate：630] display：error：display set Parameters failed！

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-DSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4119737#4119737"]

    此外、还需要这三个参数来与串行器配对。

    请告诉我 如何在 TDA4 DSI 接口端设置这三个参数？

    另一种说法是三个参数、tda4 DSI 接口是否符合 DSI 基本配置1。 空数据包   2.启用 EOTP  3.同步脉冲?

    参数说明：
    DPI 构造函数根据来自同步事件短数据包、RGB888长数据包和消隐/空长数据包的视频时序构建 DPI 视频信号(HS/VS/DE/24位视频)。 视频时序模式 GMSL2 DSI 串行器支持两种视频时序模式：
    •具有同步脉冲的非突发模式
    •具有同步事件的非突发模式  
    [/报价]

    DSI 驱动器如何设置这三个参数？

    因此，我们可以将串行器设置为与正常输出的 DSI 驱动器相同的配置！


    空数据包

    2.启用 EOTP

    3.同步事件的非突发事件

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    了解 TRM！ 让我总结一下这三个参数。  

    闪烁数据包

    2. 启用 EOT

    3. 同步 脉冲的非突发

     见上文  闪烁数据包 参数寄存器。

    现在得出一个结论、在设置这三个参数时、我需要做的是设置

    DSI_VID_MAIN_CTL 寄存器

    位<24-23>= 01  REG_BLKEOL_MODE  

    位<22-21>= 01  REG_BLKLINE_MODE  

    位<20>   = 1   SYNC_PULSE_HORDAL

    位<19>   = 1   SYNC_PULSE_ACTIVE

    位<18>   = 1   BURST_MODE  

    DSI_MCTL_MAIN_DATA_CTL 寄存器

    位<18>   = 1 DISP_EOT_GEN

    4.如何修改这些参数，请告诉我文件的位置！  

    5.此外，

    是否有一个演示例、用于直接通过 DSI 接口在屏幕上显示特定图像？

    实现是否需要使用 OpenVX 架构？ 如果使用、 我可以参考任何 OpenVX 文档吗？  

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
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    大家好、墨菲、

    是的、在 ti-processor-sdk-rtos-j721e-evm-08_02_00_05\pdk_jacinto_08_02_00_21\packages/ti\v\dds_dctrlsrc 文件中、这些参数中的许多都在 API dss DctrlSetVideoConfig 和 dss DctrlEnableDsDatapath 中更新   

    您可以找到本地 API dss DctrlUpdateVideoModeConfig、它会更新其中的许多参数。 请根据您的要求进行更改。  

    遗憾的是、在 EVM 上无法直接检查 DSI 接口。  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好 Brijesh，

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4131065#4131065"]

    5.此外，

    是否有一个演示例、用于直接通过 DSI 接口在屏幕上显示特定图像？

    实现是否需要使用 OpenVX 架构？ 如果使用、 我可以参考任何 OpenVX 文档吗？  

    [/报价]

    例如：

     1.照片存储在何处？

    2.需要调用什么 API？ 如何使用 OpenVX API 来实现这一点？

    特定图像--> SER --> DES -->显示面板

    是否有演示？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4131490#4131490"]1.  照片存储在何处？[/quot]

    这是什么意思？ 输入图？ 来自 DDR 的数据。 DSS 从 DDR 读取并将其转发到 DSI。

    [~引脚 userid="499496" URL"/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4131490#4131490"]2. 需要调用什么 API？ 使用 OpenVX API 来进行此操作？[/QUERP]

    是的、帧缓冲存储器在这里由 OpenVX 进行管理。  

    这里有一个演示、用于"Image"->"DS"->"DSI "->"Serializer"。 但没有反序列化->显示面板接收设备。

    此致、

    Brijesh  

  • 0
    TI__Guru**** 2779905 points
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    您好、Brijesh、

    这里有一个演示、用于"Image"->"DS"->"DSI "->"Serializer"。 但没有反序列化->显示面板接收设备。

    你是指哪个演示？

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    尊敬的 Alex：

    默认情况 下、当您在 OpenVX 或 PDK 中的 SDK 中启用 DSI 输出时、这是配置的路径、然后当您运行任何输出分辨率为1280x800的演示时、它会通过该路径发送数据。

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好 Brijesh，

    使用默认的1820×800配置，在连接摄像机的情况下， 可以在 DSI-Tx clk 信道和数据信道(0/1)上对数据/时钟进行分频。  

    在文件  ti-processor-sdk-rtos-j721e-evm-08_02_00_05\pdk_jacinto_08_02_00_21\packages \dss\drv\dss\dcs_rtc\dctrlos\dcs_ctrlSetVideoConfig 和 dss DctrlEnableDsiDatapath 中更新参数  

    TDA4默认输出 DSI -->无脉冲同步模式，无启用 EOT

    但是、每60帧测量一次脉冲、并且不包含有关 VSS+VBP+VFP 的信息？ 这是正常的吗？

    请确认示波器是否测量 TDA4输出的 TDA4数据包的波形符合 MIPI 协议。 这可能导致显示面板 DES 无法识别数据包！！

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
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     大家好、墨菲、

    我认为驱动程序中的突发模式设置(DSITX_GetVideoMode)没有更改、因此该模式的复位值为非突发模式。 如果需要突发模式输出，可以在 API dsDctrlUpdateVideoModeConfig 中更改它。

    同样、对于 EOT、您可以在  dsDctrlEnableDsiDatapath API 中设置 dispeteotGen 标志以启用 EOT 生成。 但据我所知、EOT 数据包不是强制性的。  如果显示屏使用 EOT 数据包、请在此 API 中启用此标志。

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Berijesh

    目前、使用 SDK8.1的默认 DSI 输出： 从这两个寄存器读取的值<0x48000B0和0x4800004>

    1.消隐数据包

    同步脉冲

    3.非突发

    禁用 Dep_EOT 和 Host_gen_EOT 

    root@ti-j72xx:~#
root@ti-j72xx:~# devmem2 0x48000B0
/dev/mem opened.
Memory mapped at address 0x3ff96910000.
Read at address  0x048000B0 (0x3ff969100b0): 0x80B8FE00
root@ti-j72xx:~#
root@ti-j72xx:~#
root@ti-j72xx:~# devmem2 0x4800004
/dev/mem opened.
Memory mapped at address 0x3ffb5e90000.
Read at address  0x04800004 (0x3ffb5e90004): 0x00060025
root@ti-j72xx:~#
root@ti-j72xx:~#

    已使用默认的1280x800分辨率通过 DSI 接口输出。 然而、测得的 MIPI 波形与 MIPI 协议描述的数据包不匹配。

    (参见图 3脉冲展开后、它应携带  有关 VSS+VBP+VFP、DSI 传输数据包的信息、详见图 1)！  

    但现在、扩展脉冲保持1.2V 电压、并且不包含任何信息。

    请帮助我理解这一点！！  它是否是非标准 MIPI-DSI？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh

    请您分享当前状态吗？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    供参考

    供参考

    LCD 数据表：

    1.垂直定时

     

    2.水平计时

    Vs-HS 时序

    TDA4 TRM：

    DSS0_VP_POL_FREQ 寄存器字段说明：

    根据上述资料，作出了以下修改。 

    else if(obj->initPrm.display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
{
    advVpParams.hVAlign = APP_DCTRL_HVSYNC_ALIGN_ON;//bit-ALIGN
    advVpParams.hVClkControl = APP_DCTRL_HVCLK_CTRL_ON;//bit-ONOFF
    advVpParams.hVClkRiseFall = APP_DCTRL_EDGE_POL_FALLING;//bit-RF<HS-VS timing>

    vpParams.actVidPolarity = APP_DCTRL_POL_HIGH;//bit-IEO <data-enable-high>
    vpParams.pixelClkPolarity = APP_DCTRL_EDGE_POL_FALLING;//IPC <Horizontal timing>
    vpParams.hsPolarity = APP_DCTRL_POL_LOW; //bit-IHS <Horizontal timing>
    vpParams.vsPolarity = APP_DCTRL_POL_LOW; //bit-IVS <Vertical timing>
}

    显示面板的更改是否正确？ 还是需要更改？

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    大家好、墨菲、

    但是、您为什么需要更改极性和其他参数？  

    我认为您应该根据接收器要求更改定时/消隐信息。  

    仅更改时序参数时、您会看到什么问题？  

    此致、

    Brijesh

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    您好、Brijesh、

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4146820#4146820"]但为什么需要更改其他参数极性？  [/报价]

    根据 LCD 数据表设置参数和极性。  

    [引用 userid="80721" URL"~/support/processors/group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_camer-sh/4146820#4146820"]

    我认为您应该根据接收器要求更改定时/消隐信息。  

    仅更改时序参数时、您会看到什么问题？  

    [/报价]

    只需更改  接收器所需的计时/消隐设置、  

    主要部分 是关键信息(VA/VBP/VFP)仍然缺失。 我认为 这些 缺失的关键信息会导致 SER 无法识别 DSI 接口的数据输出。

    有什么建议？

    请检查我捕获的波形！！！  此信息应在每个帧之间传输(脉冲)。 但到目前为止我们尝试过的所有组合都没有出现在帧之间。

    [引用 userid="499496" URL"~/support/processors-group/processors/f/processors-forum/1110365/tda4vm-tda4-dSI-interface-display-failed-with -vision-app-run_app_single_cam-sh/4138881#4138881"(请参阅图 3脉冲展开后、它应携带  有关 VSS+VBP+VFP、DSI 传输数据包的信息、详见图 1)！[/报价]

     

    此致、

    墨菲

  • 0
    TI__Guru**** 2779905 points
    请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

    而不是。

    LCD 数据表。

    e2e.ti.com/.../A1-LPM102G224B_5F00_Specification_5F00_Rev01_5F00_20180112.pdf