大家好、我正在尝试在基于 AM64 GPEVM 的定制板上启动处理器 SDK 8.0 Linux。
根据我的日志、我认为 SPL 正在加载、U-boot 开始加载、但最终会挂起以下日志(通过启用调试消息获取):
clk_set_defaults(flash@0) clk_set_default_parents: could not read assigned-clock-parents for 802399b0 ofnode_read_prop: assigned-clock-rates: <not found> cadence_qspi_apb_config_baudrate_div: ref_clk 166666666Hz sclk 25000000Hz Div 0x3, actual 20833333Hz cadence_spi_set_speed: speed=25000000 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 size=x, ptr=40, limit=640: aligned to 81f00600 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 jedec_spi_nor flash@0: Unknown command extension type cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 cadence_qspi_apb_chipselect : chipselect 0 decode 0 spi_get_bus_and_cs: bus=80239828, slave=81f00598 fdtdec_get_config_int: u-boot,spl-payload-offset jedec_spi_nor flash@0: from 0x00280000, len d cadence_qspi_apb_chipselect : chipselect 0 decode 0 Found FIT jedec_spi_nor flash@0: from 0x00280000, len d cadence_qspi_apb_chipselect : chipselect 0 decode 0 fit read sector 280000, sectors=1300, dst=807ffac0, count=1300, size=0x514 Selecting config 'k3-am642-evm' firmware: 'firmware-1' jedec_spi_nor flash@0: from 0x00280514, len d cadence_qspi_apb_chipselect : chipselect 0 decode 0
我正在尝试从 QSPI 引导、已删除最后4个引脚、并已在 ospi DTS 文件(K3-am642-EVM.dts)中将 TX、Rx 总线宽度设置为4。 由于 QSPI 基于 Winbond、我已在 drivers/MTD/SPI/SPI-NOR IDs.c 中添加以下条目{info ("w25q01jv"、0xef4021、0、64 * 1024、2048、 sect_4K | SPI_NOR_DUAL_READ | SPI_NOR_Quad_READ)}、并在 A53和 R5 defconfig 中添加了 CONFIG_SPI_FLASH_Winbond=y。
如何继续调试并解决此问题?
感谢您的任何帮助