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[参考译文] AM5726:内核启动挂起

Guru**** 2782615 points

Other Parts Discussed in Thread: AM5728, AM5726, BEAGLEBOARD-X15, DRA752

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/848623/am5726-kernel-boot-hangs

器件型号:AM5726
主题中讨论的其他器件:AM5728BeagleBoard-X15DRA752

你好

我有一个基于 beagle-x15/ti-EVM 的定制板。

我对 U-boot 进行了一些修改、例如、我的定制板没有 EEPROM 来检测板。

如果我启动板、我会收到一些 u-boot 消息、看起来似乎需要启动内核、但它卡住了。

U-Boot SPL 2019.01 (2019年10月16日- 17:50:53 +0200)
DRA752-GP ES2.0
尝试从 MMC1引导
默认模式无 pinctrl 状态
默认模式无 pinctrl 状态默认模式
加载 FAT 环境... ***警告- CRC 错误,使用默认环境

从 MMC 加载环境... 卡未响应电压选择!
警告-无块设备,使用默认环境



U-Boot 2019.01 (2019年10月16日- 17:50:53+0200)

CPU:DRA752-GP ES2.0
模型:TI AM5728 BeagleBoard-X15
板:SEC4
DRAM:1 GiB
大小的 DRAM 为1024 MB

beagle_x
MMC:OMAP SD/MMC:0、OMAP-MMC:1 ***
从 FAT 环境加载... ***警告- CRC 错误,使用默认环境

从 MMC 加载环境... 卡未响应电压选择!
***警告-无块设备,使用默认环境

***->此主板未知

,后期初始

化,后初始化2a

卡未响应电压选择!
无效的 MMC 设备
延迟初始化2b

结束延迟初始

化网络:无法获取以太网的 PHY@48484000:Addr 1

警告:以太网@48484000使用 ROM 中的 MAC 地址
eth0:以太网@48484000
按任意键停止自动引导: 0
切换到分区#0,确定
mmc0是
当前在设备0上找到的设备 SD/MMC
**无法读取文件引导。scr **
1490字节在2ms (727.5 KiB/s)内读取
从 uEnv.txt 从
mmc0导入环境...
正在运行 envcmd ...
在1ms (1000字节/秒)内读取1个字节
已设置。
切换到分区#0、好
的 mmc0是在
设备0
4211200字节中找到的当前设备 SD/MMC 在190ms (21.1 MiB/s)内读取
133193字节在8ms (15.9MiB/s)
###平展设备树状节点在88000000
启动使用0x88000000处的 FDT Blob
将设备树加载到8ffdc000、 结束8ff848... 确定

启动内核... 

打印机:

=> printenv
arch=arm
args_mmc=run finduid;setenv bootargs console=${console}${optargets}root=${targetUID=${targetid}rw fstypy=${mmcrootfstype}rootbotrate=115200

board=am57xx board_name=beedupdicle=from_boot=d15=dle=dle=dle=drgr
boot_boot_boot=dfastrgr




androidboot.serialno=${serial#}
;如果已请求、则重置 from_boot=d=d=drandrandrfrgr 命令=d=drfrandrfrgr 命令=drfrgr 命令=drgr 命令=drgr 命令=drandrfrfrfrgr 命令=drf=drfr2、d saveenv;echo Booting
delay=2
bootdir=/boot
bootenvfile=uEnv.txt
bootfile=zImage
bootm_size=0x10000000
bootpart=0:2
bootscript=echo running bootscript from MMC${mmcdev}...; source ${loadaddr}
console=ttyO2、115200n8
cpu=armv7
dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1;rootfs part 1 2;mLo fat 1;mLfat raw 0x100 0x200;u-boot.img raw 0x300 0x100;
mc raw 0x100;mcr 0x1000 nfb raw 0x100;mcr 0x1000 intrand 0x400 nfb raw 0x1000;mc raw 0x400 nfb 0dfb raw 0x1000;mc raw 0x1000 in.em-rw 0x1000;mcr 0dfb raw 0x400 nf 0dfb rw 0x1000;mc raw 0x400 nf 0dfb rw 0x1000;mc raw 0x1000 in.mp.mp.mp.mp.mp.mp.mp.
0x140000 0x080000;u-boot-env raw 0x1C0000 0x0100
dfu_alt_info_ram=内核 ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000
dfu_Bufsiz=0x10000
dofastboot=0 eMMC_boot=v=v2; tamble_env_env_boot=v_env_env_env_env=v2

;正在尝试从 setv_boot_env_env_env_env_env_boot_env_env=v_env_env_env_env_env_env_env_env_env_env_env_env_target= setenv mmcroot /dev/mmcblk0p2 rw;运行 mmcbo;
envboot=MMC dev ${mmcdev};如果 MMC 重新扫描;然后在器件${mmcdev}上回显 SD/MMC;如果运行 loadbootscript;如果 RU



fastboot.secure=GP



;etaddr=18:62:E4:6F:58:fastddrbboot.board=0x000000;如果
未定义、则运行 bootscript;如果 dtbt = 0xdtbt = 0xdftb、则为 dfb、则为 dr;如果 dtb、则为 dr = 0xdftb、则为 dfb、则为 dr = rfb、df tb、dr = 0xfb、df tb、dr = rb、fb、fb、dr = rb、fb、dr = rb、fb、dr = rb、 然后 setenv fdtfile dra7-e
finduid=part uuid mmc ${bootpart}uuid
fit_bootfile=fitImage
fit_loadaddr=0x90000000
get_loadaystring=用于$overlay_files 中的覆盖;do;setenv overlaystring ${overlit};dr{
loaddr}$
{loaddr}${loadaddr


}${v_dr}r}–loadaddr}${loaddr}${loadaddr}${loadaddr}r}–exportedr}${loadaddr}${loadaddr}${loadaddr}r ${dr}r}


loadimage=load ${devtype}${bootpart}${loadaddr}${bootdir}/${bootfile}
mmcboot=MMC dev ${mmcdev};setenv devnum ${mmcdev};setenv devtype MMC;如果 MMC 重新扫描;则回显 SD/MMC 设备上的${mmcdev};

如果${mmdt_dt = runs;如果 dtr = tmmwundtl;如果 dr = tr = fundtr;如果${mmdr = tandr = tr;tr = fdt = tr;
mmcrootfstype=ext4 rootwait
netargs=setenv bootargs console=${console}${optargets}root=/dev/nfs nfsroot=${serverip}:${loadpath}、${nfsopts}RW IP=DHCP
netboot=echo booting from network ...;setenautv rootload no;dhcp;运行 netflip? 运行 netargs;bootz ${loadaddr}-${fdta}
netloadfdt=tftp ${fdtaddr}${fdtfile}
netloadimage=tftp ${loadaddr}${bootfile}
nolds =nolock
partitions=uuuuuuid_disk=${u80dr}




/export/rootfs、r=uu80k=uuuuuuuuuu000=uu000=uuuuuu000=uuuuuuuuuuuu000=u000_bootloader=u000=u000=u000=u000=u000=u000=u000u000_disk=u000=u000=u000u000u000u000u000u000_loader=u000u000=u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000u000_







@@@






  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Rekoe、

    请参阅 帖子。

    此致、
    Kemal

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Kemal、

    现在可以在内核启动步骤中为我提供帮助吗?

    此致
    返利

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    请参阅 帖子。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Kemal、

    您能为我提供有关内核-挂起/紧急情况的帮助吗?

    现在、我已使用"调试支持"重建内核:
    请保持距离
    使 tisdk_am57xx-evm-rt_defconfig 成为文件
    使 menuconfig
    -> DEBUG_LL [=y]
    -> DEBUG_OMAP4UART3 [=y]
    -> EARLY_PRINTK [=y]
    -> DEBUG_UART_PHY [=0x48020000]  
    -> DEBUG_UART_virt [=0xfa020000]
    使-J8 zImage 成为文件

    在的 U-boot 中、"u-boot/board/ti/am57xx/board.c"我删除了电路板识别例程和一些其他内容。
    我已经修改了"arch/arm/dts/am57xx-beagle-x15.dts"中的"mux_data.h"和 DTS。
    我已将"zImage"和"arch/arm/dts/am57xx-beagle-x15.dtb"复制到 MMC 设备上的引导分区。

    如果我启动 manuell the "zImage"并获取内核紧急情况:

    u-boot 期间的手动说明:

    -> setenv bootargs console=ttyO2、115200 earlyprintk loglevel=3 mem=0x40000000 loglevel=7
    ->加载 MMC 0:1 0x88000000 sec4.dtb
    ->加载 MMC 0:1 0x82000000 zImage
    -> bootz 0x82000000 - 0x88000000

     

    这是 UART3输出:

    U-Boot SPL 2019.01 (2019年10月18日- 16:55:06 +0200)
    DRA752-GP ES2.0
    尝试从 MMC1引导
    默认模式无 pinctrl 状态
    对于默认模式无 pinctrl 状态
    从 FAT 加载环境... ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... 卡未响应电压选择!
    ***警告-无块设备,使用默认环境
    
    
    
    U-Boot 2019.01 (2019年10月18日- 16:55:06+0200)
    
    CPU:DRA752-GP ES2.0
    模型:TI AM5726 sec4
    板:SEC4
    DRAM:1 GiB
    大小的 DRAM 为1024 MB
    
    的
    OMAP beagle_x MMC:SD MMC/0
    正在从 FAT...加载环境 ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... MMC Device 1 not found
    *** Warning - No MMC card found,using default environment
    
    ***-> This Board is unknown
    
    晚期初始
    
    化2a invalid
    
    MMC device
    晚期初始化2b
    
    end of 晚期初始化
    
    网络:找不到以太网。
    按任意键停止自动引导:0
    =>
    => setenv bootargs console=ttyO2、115200 earlyprintk loglevel=3 mem=0x40000000 loglevel=7
    =>加载 MMC 0:1 0x88000000 sec4.DTB
    128072字节在7 ms (MIB/s)内读取
    =>加载 MMC 0:1 0x200188mb (Z800000000) 217.4mb 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b
    
    => bootz 0x82000000 - 0x88000000
    ##平展设备树 blob,88000000使用
    0x88000000的 FDT blob 启动
    正在将设备树加载到8ffdd000,结束8ff447... 确定
    
    启动内核...
    
    [0.000000]在物理 CPU 上引导 Linux 0x0
    [0.000000] Linux 版本4.19.38-rt19 (Rene@Ubuntu)(gcc 版本8.3.0 (A 配置文件 Archite9的 GNU 工具链
    [0.000000] CPU:ARMv7处理器[412fc0f2]修订版2 (ARMv7)、CR=30c5387d
    CPU:0.div 代码修补[0.0000]:
    PIPT / VIPT 非混叠数据高速缓存、PIPT 指令高速缓存
    [0.000000](共:FDT):机器型号:TI AM5726 sec4
    [0.000000]启动控制台[earlycon0]已启用
    [0.000000]内存策略:数据高速缓存 writealloc
    [0.000000]
    EFI:从 FDT 获取 EFI 参数:[0.000000] EFI:找不到。
    [0.000000] CMA:在0x00000000b400000
    [0.000000] OMAP4上保留24 MIB:将0x0000bfd00000映射到 DRAM 屏障的(ptrval)
    [0.000000] DRA752 ES2.0
    [0.000000] random:从 start_kernel+b0/0x480调用 get_randup=0
    [0.192] DRA752 ES2.0 [0.000000]随机:从 start_kernel+ b0x480调用 get_kernelb_b_bpu=字节、其中包含 crng_pu=0 [0.192]/zone64288u1、内嵌式 CPU
    组[0. 总页数:259648
    [0.000000]内核命令行:console=ttyO2,115200 earlyprintk loglevel=3 mem=0x40000000 loglevel=7
    [0.000000]条目高速缓存哈希表条目:131072 (顺序:8、1048576字节)
    [0.000000] inode 高速缓存哈希表条目:65000000 (顺序:6、26536字节)
    994888K/1045504K 可用(8192K 内核代码、329K rwdata、2644K rodata、2048K init、275K b)
    [ 0.0000M]虚拟内核内存布局:
    [ 0.0000] 向量:0xffffff0000 - 0xffffff1000 (4KB)
    [0.000000] Fixmap:0xc00000 - 0xc00000 (3072 KB)
    [0.000000] vmalloc:0xf0800000 - 0x0x800000 (240MB)
    [0.000000] 低内存:0xC0000000 - 0xf0000000 (768 MB)
    [0.000000] pkmap:bfe00000 - 0xC0000000 (2 MB)
    [0.000000] 模块:bbbf000000 - bbfe00000 (14 MB)
    [0.000000] .text:0x (ptrval)- 0x (ptrval)(10208 KB)
    [0.0000] init:0x (ptrval)-0x (ptrval)(2048KB)
    [0.000000] .data:0x (ptrval)- 0x (ptrval)(330KB)
    [0.000000] .bss:0x (ptrval)- 0x (ptrval)(276 KB)
    [0.000000] slub:HWalign=64、order=0-3、MinObjects=0、CPU=2、Nodes =1
    [0.000000] RCU:可抢占分层实现。
    [0.000000] RCU: RCU 优先级提升:优先级1延迟500毫秒。
    [0.000000]无加速宽限期(RCU_NORMAL、After _boot)。
    [0.000000]启用了 RCU 任务。
    [0.000000] NR_IRQ:16、nr_IRQ:16、预分配的 IRQ:16
    [0.000000] GIC:使用分离 EOI/Deactivate 模式
    [0.000000] ti_dt_clocks_register:缺少 clkctrl 节点、请更新您的 DTS。
    [0.000000] OMAP 时钟事件源:Timer1为32786Hz
    [0.000000] arch_timer:cp15计时器以6.14MHz (phys)运行。
    [ 0.0000]时钟源:ARCH_SYS_COUNTER:MASK:0xffffffffffffffFFFF max_cycles:0x16af5adb9、max_idle_ns:44079520s
    [ 0.000005] sched_clock:56位6MHz、分辨率162ns、
    
    IDLE 每4398046523ns 翻转一次[ 0.000012]切换到基于计时器的计时源:0x03334ns、0x000337FFFF 源:0x000337ns:0x000337FF_cycles 0.64ns:0x000337FF_resolution:0x000337FF64ns:0x000334ns
    32768Hz
    [0.000742]上的32K_COUNTER 控制台:彩色虚拟设备80x30
    [0.259629]警告:'console=ttyO2'已被'ttyS2'
    [0.259632]取代,这可确保您仍能看到内核消息。 请
    [0.259634]更新您的内核命令行。
    [0.259655]校准延迟环路(跳过)、使用计时器频率计算的值。 12.29 BogoMips (lpj=61475)
    [ 0.259663] pid_max:默认值:32768最小值:301
    [0.259798]安装高速缓存散列表条目:2048 (顺序:1、8192字节)
    [0.259806]安装点高速缓存散列表条目:2048 (顺序:1、8192字节)
    [0.260v2 CPU
    :CP0:POSM] 使用 ICIALU 权变措施
    [0.260816]/cpus/cpu@0缺少时钟频率属性
    [0.323138]/cpus/cpu@1缺少时钟频率属性
    [0.328588] CPU0:线程-1、CPU 0、套接字0、mpidr 8000000000
    [0.390201]为0x80200000 - 0x80200060
    [0.410175]设置静态标识映射 SRCU 分层实施:RCU
    [0.470688] EFI 服务将不可用。
    [0.490309] SMP:启动辅助 CPU ...
    [0.610718] CPU1:线程-1、CPU 1、插槽0、mpidr 80000001
    [0.610721] CPU1:sp幽灵 v2:使用 ICILLU 变通办法
    [0.610850] SMP:提起1个节点、2个 CPU
    [0.626137] SMP:总共激活2个处理器(24.59 BogoMips)。
    [0.632479] CPU:所有 CPU 均在 HYP 模式下启动。
    [0.637212] CPU:提供虚拟化扩展。
    [0.643069] devtmpfs:已初始
    化[0.680743] VFP 支持 v0.3:Implementor 41体系结构4第30部分变体 f rev 0
    [0.688926]时钟源:jiffies:mask:0xFFFFFFFF max_cycles:0xFFFFFFFF、max_idle_021:19112604462750000 ns
    [ 0.699583ns:512 pfus
    条目:0.5830ns、intrl 初始化的 pinctrl 子系统
    [0.712018] DMI 不存在或无效。
    [0.716404] NET:注册协议系列16
    [0.723660] DMA:为原子相干分配预分配256 KiB 池
    [0.731625] omap_hwmod:L3_main_2使用 OCP
    [0.756507] omap_hwmod:dma_system:no dt 节点
    [0.761090]--- [在此处剪切]-----
    [0.765837]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [0.775754] omap_hwmod:dma_system:没有 MPU 寄存器目标基
    座[0.782719]模块链接在
    
    通用[0.784b0中[0.7816]硬件树
    状图[0.7816](r5810x)[0.78164x:[0.7816]
    [0.785881][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [0.785887] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [0.785897][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [0.785905][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [0.785910] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 0.785916][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [0.785922] r9:c0e48824 R8:00000000 r7:c10150f8 r6:00000000 r5:c0bb6b64 r4:c1007488
    [0.785930][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [0.785934] r3:c0bb7008 r2:c0bb6b64
    [0.785938] r5:00000000 r4:c10150c0
    [0.785947][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [0.785953] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [0.785955] R4:c10150c0
    [0.785964][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 0.785967] R5:c1007488 R4:c10525c0
    [ 0.785975][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [0.785980] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [0.785988][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [0.785993] R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [0.785996] R4:00000000
    [0.786003][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [0.786006]异常堆栈(0xef09dfb0至0xef09dff8)
    [0.786011] dfa0: 00000000 00000000 00000000 00000000
    [0.786016] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [0.786020] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [0.786024] R5:c09b4c88 R4:00000000
    [0.786027]--[结束跟踪0000000000000001 ]--
    [0.994426] omap_hwmod:GPU:无节点
    [0.8359]-- [在此处剪切]-----
    [1.003135]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.013046] omap_hwmod:GPU:没有链接
    的 MPU 寄存器目标基座[ 1.019384]模块:
    [1.0022529]每个 CPU:swap0:0:CPU 污染 W 4.19.38-rt19 #1
    [ 1.022531]硬件名称:通用 DRA74X (平展设备树)
    [ 1.022534]背板:
    [ 1.022544][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.022550] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [1.022558][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [1.022565][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.022570] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.022575][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.022581] R9:c0e48824 R8:00000000 r7:c101427c R6:00000000 R5:c0bb6b64 R4:c1007488
    [1.022589][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.022593] r3:c0bb8c00 r2:c0bb6b64
    [1.022596] r5:00000000 r4:c1014244
    [1.022605][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [1.022610] r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [1.022612] r4:c1014244
    [1.022620][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.022624] R5:c1007488 R4:c10525c0
    [ 1.022630][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [1.022635] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.022643][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.022648] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [ 1.022650] r4:00000000
    [ 1.022657][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.022661]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.022664] dfa0: 00000000 00000000 00000000 00000000
    [1.022670] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.022674] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [1.022677] R5:c09b4c88 R4:00000000
    [1.022680]----结束跟踪0000000000000002 ]--
    [1.218178] omap_hwmod:hdq1w:1.022680]------无节点
    [在此处剪切]-----
    [1.227028]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.236927] omap_hwmod:hdq1w:没有 MPU 寄存器目标基
    座[1.243447]
    每个 CPU 中已链接的 PID 模块:1.246587:0:0:1个 CPU:1个已污染的 PID W 4.19.38-rt19 #1
    [1.246589]硬件名称:通用 DRA74X (平展设备树)
    [1.246591]回扫:
    [1.246601][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.246607] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [1.246614][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 1.246621][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.246625] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.246631][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.246636] r9:c0e48824 R8:00000000 r7:c10141c0 r6:00000000 r5:c0bb6b64 r4:c1007488
    [1.246644][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.246648] r3:c0bb8be8 r2:c0bb6b64
    [1.246651] r5:00000000 r4:c1014188
    [1.246659][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x246665]
    r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [ 1.246667] r4:c1014188
    [ 1.246675])[ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.246678] R5:c1007488 R4:c10525c0
    [ 1.246685][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [1.246690] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.246698][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.246703] R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [1.246705] R4:00000000
    [1.246712][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.246716]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.246720] dfa0: 00000000 00000000 00000000 00000000
    [1.246725] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.246730] dfe0:00000000 00000000 00000000 00000013 00000000
    [1.246733] R5:c09b4c88 R4:00000000
    [1.246736]--[结束跟踪000000000003]--
    [1.471038] omap_hwmod:smartreflex_core----- 1.6dt 节点
    数--- [在此处剪切]-----
    [1.480873]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.490775] omap_hwmod:SmartReflex_core:没有 MPU 寄存器目标基
    座[1.498267]
    在 CPU 中链接的 PM0:1.4907]模块:1.50Comm 0:1:0:1 W 4.19.38-rt19 #1
    [ 1.501410]硬件名称:通用 DRA74X (平展设备树)
    [ 1.501412]背板:
    [ 1.501422][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.501427] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [1.501435][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 1.501442][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.501447] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.501453][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.501458] r9:c0e48824 R8:00000000 r7:c10122a4 r6:00000000 r5:c0bb6b64 r4:c1007488
    [1.501466][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.501469] r3:c0bb8734 r2:c0bb6b64
    [1.501472] r5:00000000 r4:c101226c
    [1.501481][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [1.501486] r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [1.501488] r4:c101226c
    [1.501497][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.501500] R5:c1007488 R4:c10525c0
    [ 1.501506][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [1.501511] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.501519][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.501524] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [ 1.501526] r4:00000000
    [ 1.50151533 ][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.501536]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.501541] dfa0: 00000000 00000000 00000000 00000000
    [1.501545] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.501550] dfe0:00000000 00000000 00000000 00000013 00000000
    [1.501553] R5:c09b4c88 R4:00000000
    [1.501586]----结束跟踪0000000000000004 ]--
    [1.697117] omap_hwmod:SmartReflex_MPU
    ---- 1.70129----节点 [在此处剪切]-----
    [1.706869]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.716771] omap_hwmod:SmartReflex_MPU:没有 MPU 寄存器目标基
    座[1.724192]
    在每个 CPU 中链接的 PID 模块:1.727335:0:0:1个 CPU:1个 CPU:1个 PID W 4.19.38-rt19 #1
    [1.727337]硬件名称:通用 DRA74X (平展设备树)
    [1.727339]背板:
    [1.727349][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.727355] r7:c0bb657c R6:60000013 r5:00000000 r4:c10505a4
    [1.727362][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [1.727368][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.727373] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.727378][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.727384] R9:c0e48824 R8:00000000 r7:c101221c R6:00000000 R5:c0bb6b64 R4:c1007488
    [1.727392][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.727395] r3:c0bb8724 r2:c0bb6b64
    [1.727398] r5:00000000 r4:c10121e4
    [1.727407][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [1.727412] r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [1.72741] r4:c10121e4
    [1.727422] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.727426] R5:c1007488 R4:c10525c0
    [ 1.727432][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [1.727437] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.727445][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.727450] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [1.727452] r4:00000000
    [1.727459][ ](kernel_init)、来自[ ](RET_FAND_FANK+0x14/0x34)
    [1.727463]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.727467] dfa0: 00000000 00000000 00000000 00000000
    [1.727472] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.727476] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [1.727479] R5:c09b4c88 R4:00000000
    [1.727482]--[结束跟踪000000000005 ]--
    [1.944194] OMAP-hwmod:VPE:no 48dt --
    1.127] [在此处剪切]-----
    [1.952870]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.962770] omap_hwmod:VPE:没有 MPU 寄存器目标基
    座[1.96103]模块链接在
    :[1.972g:CPU:swap0:]中:[1.972g W 4.19.38-rt19 #1
    [1.972246]硬件名称:通用 DRA74X (平展设备树)
    [1.972248]背板:
    [1.972258][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.972263] r7:c0bb657c R6:60000013 r5:00000000 r4:c10505a4
    [1.972271][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [1.972277][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.972282] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.972287][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.972293] R9:c0e48824 R8:00000000 r7:c1015a6c R6:00000000 R5:c0bb6b64 R4:c1007488
    [1.973301][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.972305] r3:c0bb8e90 r2:c0bb6b64
    [1.972307] r5:00000000 r4:c1015a34
    [1.972316][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [1.972322] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [1.972324] R4:c1015a34
    [1.972332] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.972335] R5:c1007488 R4:c10525c0
    [ 1.972342][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [1.972346] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.972354][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.972359] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [ 1.972361] R4:00000000
    [ 1.972368][ 1.972368][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.972371]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.972376] dfa0: 00000000 00000000 00000000 00000000
    [1.972380] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.972385] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [1.972388] R5:c09b4c88 R4:00000000
    [1.972391]--[结束跟踪000000000006 ]--
    [2.168060] omap_hwmod:vip1:no 2.1778]--
    [在此处剪切]-----
    [2.176820]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 2.186721] omap_hwmod:vip1:没有 MPU 寄存器目标基
    座[2.193144]模块链接在
    [2.1961/cpomap0:2.283]中:vap0:vapg0:vap1 W 4.19.38-rt19 #1
    [2.196286]硬件名称:通用 DRA74X (平展器件树)
    [2.196288]背板:
    [2.196299][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [2.196305] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [2.196312][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 2.196319][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [2.196324] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 2.196329][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [2.196334] R9:c0e48824 R8:00000000 r7:c10159b0 R6:00000000 R5:c0bb6b64 R4:c1007488
    [2.196342][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [ 2.19634] r3:c0bb8e74 r2:c0bb6b64
    [ 2.19634] r5:00000000 r4:c1015978
    [ 2.196357][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x48/0x134)
    [2.196362] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [2.196364] R4:c1015978
    [ 2.372][ 2.196] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 2.196375] R5:c1007488 R4:c10525c0
    [ 2.196382][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [2.196386] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.196394][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.196399] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [ 2.196401] r4:00000000
    [ 2.196408][2.196408][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.196411]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.196415] dfa0: 00000000 00000000 00000000 00000000
    [2.196420] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.196425] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [2.196428] R5:c09b4c88 R4:00000000
    [2.196431]----结束跟踪0000000000000007 ]--
    [2.398886] omap_hwmod:vip2:no 2.2940dt ----
    [在此处剪切]-----
    [2.407651]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 2.417550] omap_hwmod:vip2:没有 MPU 寄存器目标基
    座[ 2.423974]链接的模块:[2.4271/PID
    :0:[2.427114 W 4.19.38-rt19 #1
    [2.427117]硬件名称:通用 DRA74X (平展设备树)
    [2.427119]背板:
    [2.427129][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [2.427135] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [2.427142][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [2.427149][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [2.427153] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 2.427159][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [2.427164] R9:c0e48824 R8:00000000 r7:c101592c R6:00000000 R5:c0bb6b64 R4:c1007488
    [2.427172][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [2.427176] R3:c0bb8e6c R2:c0bb6b64
    [2.427178] R5:00000000 R4:c10158f4
    [2.427187][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x48/0x134)
    [2.427193] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [2.427195] R4:c10158f4
    [2.427203][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [2.427207] R5:c1007488 R4:c10525c0
    [2.427213][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [2.427217] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.427225][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.427230] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [ 2.427233] r4:00000000
    [ 2.427240][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.427243]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.427248] dfa0: 00000000 00000000 00000000 00000000
    [2.427252] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.427257] dfe0:00000000 00000000 00000000 00000013 00000000
    [2.427260] R5:c09b4c88 R4:00000000
    [hw27263]--[结束跟踪0000000000000008 ]--
    [2.622878] omap_mod:vip3:无节点[2.626898]
    ---- [在此处剪切]-----
    [2.631638]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 2.641552] omap_hwmod:vip3:没有 MPU 寄存器目标基
    座[2.647994]模块链接在
    PID 中:2.650:vap1:vap1:vap1:vap135] W 4.19.38-rt19 #1
    [ 2.651140]硬件名称:通用 DRA74X (平展设备树)
    [ 2.651141]背板:
    [ 2.651151][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [2.651157] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [2.651164][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [2.651170][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [2.651175] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 2.651181][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [2.651186] R9:c0e48824 R8:00000000 r7:c10158a8 R6:00000000 R5:c0bb6b64 R4:c1007488
    [2.651194][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [2.651197] r3:c0bb8e64 r2:c0bb6b64
    [2.651200] r5:00000000 r4:c1015870
    [ 2.651208][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x48/0x134)
    [2.651214] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [2.651216] R4:c1015870
    [ 2.651224][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 2.651227] R5:c1007488 R4:c10525c0
    [ 2.651234][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [2.651238] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.651246][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.651251] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [2.651253] r4:00000000
    [2.651260][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.651263]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.651267(1999) dfa0: 00000000 00000000 00000000 00000000
    [2.651272] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.651276] dfe0:00000000 00000000 00000000 00000013 00000000
    [2.651279] R5:c09b4c88 R4:00000000
    [2.651282]----结束跟踪000000000009 ]--
    [2.937158]未处理故障:异步外部中断162(0x0000162=2.651282],[80000000009 0000]-[2.0000000178]
    
    
    1211 [#1]挤占 SMP ARM
    [2.937178]链接模块:
    [2.937186] CPU:0 PID:1 Comm:swapper/0污染:g W 4.19.38-rt19 #1
    [ 2.937188]硬件名称:通用 DRA74X (平展设备树)
    [ 2.937196] PC 位于_enable_sysc+0x5c/0x25c
    [ 2.937200] LR 位于_enable_sysc+0x48/0x25c
    [ 2.937204] PC:[ ] LR:[ ] PSR:40000013
    [2.937207] sp:ef09de38 IP:ef09de38 FP:ef09de64
    [2.937210] R10:c0e58320 R9:c0e48824 R8:00000000
    [2.937213] r7:c1012900 r6:00000000 r5:c1007216 r4:c10488:c1248r3
    :c12r3:c1248r3:c1:c1248r3:c1 00000078 r0:c10123e8
    [ 2.937221]标志:模式 SVC_32 ISA ARM 段上 FIQ 上的 nZcv IRQs 用户
    [ 2.937225]控制:30c5387d 表:80003000 DAC:fffffffd
    [ 2.937229]进程 swapper/0 (pid:1、stack limit = 0x = 0x (
    2.93720)[ 0x9370236])从0x09370236]到0x093720 (pid)[2.9360]
    c0224e90 c09b9e08
    [ 2.937241] de40:ef09de64 ff23978d c10123e8 c1052c10 00000000 c1012900 ef09de8c efde09de68
    [ 2.937246] de60:c021dc60 c021d8004 b8 c10123e8 c1000922480 c0923648 c0923624] c0923648 c0923648 c0923624] c1 c052c1 c0923648
    c1
    
    c10525c0 c1007488 ef09df4c ef09ed8 c02023fc c0e0cef0 00000000 c0b460
    [2.937267] dee0:c0bbb440 c0b400 c0bc6a5c c0c1007488 c0b0000 c0b418 00000002 00000002
    [2.937272] c0b400 c0bc1007482487 c10000000002 c1002472:c0ff10024822480 c1000002 c1000002 c1000002 c1000002 c1000002 c1002480 c1002482240002 c1000002 c1000002 c1000002 c100240002 c1000002 c1000002 c100240002 c1000002 c1000002 c100240002 c1000002 c100240002 c100240002 c1000002 c100240002 c1000002 c1000002
    
    ef09df94 ef09df50 c0e01048 c0202384 00000002 00000002 00000000 c0e004f0
    [2.937287] df60:c0c933f0 000000d1 c09b9e0000 c09b4c88 00000000 00000000
    00000000 00000000 [2.937292] df80:c0c09b00000000
    00000000 00000009 00000000 00000000 00000000 00000004000990000 b0990000 b080000 c0000 00000000 b0990000 b00000000 00000000 00000008000000000800000000080000000000 b0990000
    00000000 00000000 00000000
    [2.937306] dfe0:00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 00000000
    [2.937307]回溯:
    [ 2.937316][ ](_enable_sysc)从[ ](_ENABLE+0x158/0x284)
    [ 2.937322] r7:c1012900 R6:00000000 R5:c1052c10 R4:c10123e8
    [ 2.937329][ ](_enable)从[ ](_setup.part.16+0x1c0/0x4e0)
    [2.937334] r7:c1012420 r6:c1007488 r5:c101240c r4:c10123e8
    [ 2.937343][ ](_setup.part.16)、来自[ ](__omap_hwmod_setup_All+0x120/0x134)
    [2.937347] r7:c0e0ce4 r6:ffe000 r5:c100c728 r4:c10123e8
    [ 2.937356][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 2.937359] R5:c1007488 R4:c10525c0
    [ 2.937366][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [2.937370] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.9373737378][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.937384] R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [ 2.937386] R4:00000000
    [ 2.937393][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.937397]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.937401] dfa0: 00000000 00000000 00000000 00000000
    [2.937406] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.937410] dfe0:00000000 00000000 00000000 00000013 00000000
    [2.937413] R5:c09b4c88 R4:00000000
    [2.937420]代码:e3130080 1a000067 e5943004 e1a00004 (e5942044)
    [3.302369]
    内核:未尝试同步中断00002400036 -中断 exitcode=0x0000000b
    [ 3.302436]
    [ 3.302446] CPU1:停止
    [3.302452] CPU:1 PID:0 Comm:swapper/1被污染:g D W 4.19.38-rt19 #1
    [ 3.302454]硬件名称:通用 DRA74X (平展设备树)
    [ 3.302456]背板:
    [ 3.302467][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [3.302473] r7:fa212000 r6:60000193 r5:00000000 r4:c10505a4
    [ 3.302481][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [3.302489][ ](dump_stack)从[ ](handle_ipi+0x1bc/0x22c)
    [3.302494] r7:fa212000 r6:00000001 r5:00000000 r4:c1052840
    [3.302505][ ](handle_ipi)从[ ](GIC_Handle_IRQ+0x94/0x98)
    [3.302509] R6:fa21200c R5:c102707c R4:c100796c
    [ 3.302517][ ](GIC_Handle_IRQ)、来自[ ](_IRQ_Svc+0x58/0xa0)
    [3.302520]异常堆栈(0xef0e3f28至0xef0e3f70)
    [3.3025] 3f20: 00000000 000007bc 00000000 c021a140 ffe000 c10074bc
    [ 3.302531] 3f40:c1007504 00000002 00000001 c10521d6 c0bbbc84 c0ef0e3f84 c0e3f88 ef0e3f78
    [ 3.302534] 3f60:c6008 e0008
    :ffr4:ffr3 0008 e0008 e0006 cf 0e0008 cf 3f80 cf 3f8 cf cf cf 3f8:ffff rf 0e0008 e0006 cf cr 3 0008 e0006 cf r3 0008 e0006 cf rffr3
    ](arch_cpu_idle)从[ ](DEFAULT_IDLE_CALL + 0x34/0x40)
    [3.302558][ ](DEFAULT_IDLE_CALL)从[ ](do_idle+0x110/0x180)
    [ 3.302565][ ](DO 空闲)从[ ](cpu_startup_entry+0x20/0x24)
    [3.302571] r10:00000000 r9:412fc0f2 r8:80007000 r7:c1052848 r6:00000001 r5:ef0e2000
    [3.302574] r4:00000086 r3:ef0e2000
    [3.302581][ ](CPU_STARTUP_INPUK)、来自[ ](secondary _start_kernel+0x178/0x180)
    [3.302587][ ](secondary _start_kernel)从[<8020210c>](0x8020210c)
    [3.302592] r7:c1052848 r6:30c0387d r5:00000000 r4:af05e880
    

     

     

    下面是 DTB 重新编译的 DTS:

    /DTS-v1/;
    
    /{
    #address-cells =<0x2>;
    #size-cells =<0x2>;
    compatible ="ti、am572x-beagle-x15"、"ti、am5728"、"ti、dra742"、 "TI、dra74"、"ti、dra7";
    interrupt-parent =<0x1>;
    model ="TI AM5726 sec4";
    
    所选{
    stdout-path ="/ocp/serial@48020000";
    tick -timer ="/ocp/timer
    
    
    
    
    
    /ocp/i2c@48032000";};aliases{i2c0 ="/ocp/i2c
    /ocp/i2c@48070000";i2c1 ="i2600000"="/ocp/i2c
    /ocp/i2c@4802c2";i2c2 ="i2c2000@i2c";i2c2 ="i2c2 ="i2c2000@@i2c";"i2c"
    Serial0 ="/ocp/serial@4806a000";
    SERIAL1 ="/ocp/serial@4806c000";
    SERIAL2 ="/ocp/serial@48020000";
    serial3 ="/ocp/serial@4806e000";
    serial4 ="/ocp/serial@48066000";
    serial5 ="/ocp/serial@48068000";
    serial6 ="/ocp/serial@4842000";
    serial7 ="/ocp/serial@48422000";
    serial8 ="/ocp/serial@48424000";
    serial9 ="/ocp/serial@4ae2b000";
    Ethernet0 ="/ocp/ethernet@48484000/从器件@48480200";
    ethernet1 ="/ocp/ethernet@48484000/从器件@48480300";
    D_CAN0 ="/ocp/can@481cc000";
    D_CAN1 ="/ocp/can@481d0000";
    spi0 ="/ocp/qspi@4b300000";
    USB0 ="/ocp/omap_dwc3_1@48880000/USB@48890000";
    USB1 ="/ocp/omap_dwc3_2@488c0000/USB@488d0000";
    }
    
    计时器{
    Compatible ="arm、armv7-timer";
    interrupts =<0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xA 0x308>;
    interrupts-cortex
    =
    
    0x15>
    
    
    ;interrupts-cortex = 0x2@控制器<0x000>;interrupt-cortex = 0x48-tex = 0x3>
    REG =<0x0 0x48211000 0x0 0x1000 0x0 0x48212000 0x0 0x2000 0x0 0x48214000 0x2000 0x0 0x48216000 0x2000>;
    中断=<0x1 0x9 0x304>;
    中断父级=<0x2>;
    相位=<0x2>;
    
    
    中断控制器@48216000 0x1000
    
    
    = 0x480-0;
    
    中断母体= 0x1000;中断#omag4 = 0x1000;中断#wugu-0x1000 = 0x1000;中断-omapi-parent = 0x1000;中断-omap4 = 0x1000 = 0x1000;中断#wugu-0x1000;中断#omapi-cells = 0x1000
    phandle =<0x7>;
    };
    
    CPU{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    CPU@0{
    device_type ="CPU";
    compatible ="arm、cortex-a15";
    reg =<0x0>;
    operating points-v2 =<0x3>;
    Clocks =<0x4>;
    时钟名称="CPU";
    时钟延迟=<0x493e0>;
    冷却最小电平=<0x0>;
    冷却最大电平=<0x2>;
    #Cool-Cells =<0x2>;
    CPU0-SUPPLY =<0x5>;
    电压容差=<0x1>;
    phandle =<0xe>;
    };
    
    CPU@1{
    device_type ="cpu";
    compatible ="arm、cortex-a15";
    reg =<0x1>;
    operating points-v2 =<0x3>;
    };
    };
    
    opp-table{
    compatible ="操作点-v2-ti-cpu";
    SYSCON =<0x6>;
    opp-shared;
    phandle =<0x3>;
    
    opp_nom-1000000000{
    opp-Hz =<0x0 0x3b9aca00>;
    opp-microsuspend =<0x1020000>
    
    
    ;
    
    
    
    
    支持0x8bp-0x8100Hz
    ;opp-0x8p>= 0x1860V;opp-0x8p-0x18p>= 0x18bp>;opt = 0x18bp-0x8p-0x8p-0x18p>;支持0x18p-0x8p>
    
    
    soc{
    compatible ="ti、omap5-mpU";
    
    mpu{
    compatible ="ti、omap5-mpu";
    ti、hwmods ="mpu";
    };
    
    
    OCP{
    compatible ="ti、dra7-L3-NOC"、"simple-bus";
    #address-cells =<0x1000000;
    #size-cells = 0x000_cl3
    = 0x000000
    ;0x000_1000000
    ;0x000000 = 0x000_100prine";0x000000 = 0x000_000_100prine"
    interrupts-extended =<0x1 0x0 0x4 0x7 0x0 0xA 0x4>;
    u-boot、dm-spl;
    
    L4@
    
    
    
    
    
    
    
    @4a000000{compatible ="ti、dra7-L4-cfg"、"simple-bus";#address-cells =<0x1>;#size-cells =<0x1>;ranges= 0x2000>
    、<cells = 0x2000>
    
    
    ;<cells = 0x2000>;<cabus-cells = 0x2000>;<scm = 0x2000>
    范围=<0x0 0x2000 0x2000>;
    u-boot、dm-spl;
    phandle =<0xF2>;
    
    SCM_conf@
    
    
    
    
    
    
    
    
    @0{compatible ="SYSCON"、"simple-bus";reg =<0x0 0x1400>;#address-cells =<0x1>;#size-cells =<0x1>;ranges =<SYSCON"、"0x00>= 0xpbias;<0x4pbias = 0x00>;<0xpbandle= 0xpbias = 0x00>;<0xpbuls = 0x4pbuls = 0x00>
    
    
    
    
    
    pbias MMC_omap5{
    reguler-name ="pbias MMC_omap5";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x325aa0>;
    phandle =<bb4>;
    };
    };
    
    时钟{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    phandle =<0xf4>;
    
    dss_shdcp_clk@558{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0x9>;
    ti、bit-shift =<0x0>;
    reg =<0x558;reg;
    phandle =<0xf5>;
    };
    
    ehrpwm0_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xA>;
    ti、bit-shift =<0x14>;
    reg =<0x558>;
    phandle =<0xe8>;
    };
    
    ehrpwm1_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xA>;
    ti、bit-shift =<0x15>;
    reg =<0x558>;
    phandle =<0xe9>;
    };
    
    ehrpwm2_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xA>;
    ti、bit-shift =<0x16>;
    reg =<0x558>;
    phandle =<0xEA>;
    };
    
    sys_32k_ck{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0xb 0xc 0xc>;
    ti、bit-shift =<0x8>;
    reg =<0x6c4>;
    phandle =<0x50>;
    };
    };
    };
    
    pinmux@1400{
    compatible ="ti、dra7-padconf"、"pinctrl-single";
    reg =<0x1400 0x468>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    #pinctrl-cells =<0x1>;
    #interrupt-cells =<0x1>;
    中断控制器;
    pinctrl-single、寄存器宽度=<0x20>;
    pinctrl-single、函数掩码=<0x3fffffff>;
    phandle =<b0>;
    
    mmc1_PINs_default{
    pinctrl-single、引脚= 0x354
    
    
    
    
    364 0x60000 0x3586 0x60000 0x60000 0x36860 0x60000 0x60000 0x36860 0x60000;0x3680x3680x3680x600000x60060000x0006 0x368060 0x6001 0x6001 0x368060 0x6001 0x6001 0x0000x0000x368060 0x0000x0000x0000x0000x0000x368_0x0000x368_0x0006 0x0000x0000x0000x0000x0000x0006 0x0001~0x0000x0000x0000x0000x0000x0000x368
    
    
    
    mmc1_PINS_hs{
    pinctrl-single、pins =<0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>;
    phandle =<0x364b7>;
    };mmc1_pins_s0x601b0
    
    0x601b0 0x601b0 0x601b0 0x60b0 0x364b0> 0x60b00x60b0> 0x60b00x60b0> 0x364b00x60b00x60b00x60b0>
    ;0x358b00x60b00x60b00x60b00x60b00x60b00x60
    
    
    
    mmc1_PINs_sdr50{
    pinctrl-single、pins = 0x354 0x601a0 0x358 0x601a0 0x35c 0x601a0 0x360 0x601a0 0x364 0x601a0 0x368 0x601a0>;
    phandle = 0xf8>;
    };
    
    mmc1_pins 0x60100> 0x60100
    0x3640x60100> 0x603560100;0x603564 0x60100 0x60100 0x60100 0x60350 0x60c> 0x60350 0x60100> 0x60100> 0x60350 0x60100> 0x60350 0x60100> 0x60100> 0x60350 0x60100>
    
    
    
    mmc1_PINs_sdr104{
    pinctrl-single、PINS = 0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>;
    phandle = 0x0x0001;
    };
    
    mmc2_PINS_DEFAULT{
    pinctrl-single、PINS = 0x9600C 0x60001 0x6000001 0x0001 0x0001 0x6000001 0x0001 0x0001 0x0001 0x600A 0x6001 0x0001 0x0001 0x0001 0x0001 0x0001 0x6001 0x0001 0x0001 0x0001 0x6001 0x6001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x600A 0x6001 0x6001 0x600
    
    
    
    mmc2_PINS_hs{
    pinctrl-single、pins =<0x9C 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
    phandle =<0xFC>;
    };
    
    mmc2_PINS_DDR_3_3V_rev11{
    pinctrl-single、pins =<0x9C 0x60101 0x60101 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>;
    phandle = 0xFD
    ;}
    
    mmc2_PINS_DDR_1_8v_rev11{
    pinctrl-single、pins =<0x9C 0x60101 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x60101 0x60101>;
    phandle = 0xFE
    };
    
    mmc2_PINS_DDR_rev20{
    pinctrl-single、PINS =<0x9C 0x60001 0x60001 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
    phandle =<0xff>;
    }
    
    mmc2_PINS_HS200{
    pinctrl-single、PINS =<0x9C 0x60b1010 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0x8c 0x60101 0x60101 0x60101 0x94 0x60101 0x60101 0x60101 0x60101>;
    phandle =<0x1001030x60103c0 0x601030x601030x601030x1030x30x1030x601030x3030x0008>0x601030x601030x3030x0001~0x601030x3030x3030x3030x0001~0x3030x00030x00030x00030x0001~0x0001~0x3601030x00030x0003
    
    
    
    
    
    
    
    MMC4_PINS_hs{
    pinctrl-single、pins =<0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x60103 0x60103 0x3fc 0x60103>;
    phandle =<0x102>;
    };
    
    mmc3_PINS_DEFAULT{
    pinctrl-single 0x60000 0x3800 0x600c 0x60000
    
    ;0x38400 0x38400 0x600c 0x60000 = 0x60000 0x38400 0x3840 0x38400 0x600c 0x60000;0x38400 0x38400 0x600c 0x600c 0x60000 0x60000 0x38400 0x600c 0x60000 0x60000 0x
    
    mmc3_PINS_hs{
    pinctrl-single、pins =<0x37c 0x60000 0x380 0x60000 0x384 0x60000 0x388 0x60000 0x38c 0x60000 0x390 0x60000>;
    phandle =<0x104>;
    };
    
    mmc3_PINs_sdr12{
    pinctrl-single、pins = 0x60000 0x38600
    0x60000 0x3840;0x3840 0x3840 0x3840 0x3860 0x3840 0x3860 0x3860 0x3840 0x3860 0x3860 0x3860 0x3860 0x38C 0x3860 0x60000;0x3840 0x3840 0x3840 0x3860 0x38
    
    
    mmc3_PINs_sdr25{
    pinctrl-single、pins =<0x37c 0x60000 0x380 0x60000 0x384 0x60000 0x388 0x60000 0x38c 0x60000 0x390 0x60000>;
    phandle =<0x106>;
    };
    
    mmc3_PINs_sdr50{
    pinctrl-single、pins = 0x38100 0x60100 0x38100 0x38100 0x3860c 0x60100;0x3860100 0x3840 0x3840 0x3860 100 0x3840 0x3840 0x3840 0x3840 0x3840 0x3860
    100 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840
    
    
    MMC4_PINS_SDDR12{
    pinctrl-single、PINS =<0x3e8 0x60103 0x3ec 0x60103 0x60103 0x60103 0x3f4 0x60103 0x60103 0x60103 0x3fc 0x60103>;
    PHandle =<0x108>;
    };
    
    MMC4_PINS_SDR25{
    = 0x60103 0x60103 0x60103 0x3fc 0x60103>;0x60103cF = 0x60103cF
    
    
    
    
    = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF = 0x60103cF 0x60103cf@
    
    
    #SYSCON-Cells =<0x2>;
    phandle =<0xAA>;
    };
    
    SCM_conf@1c24{
    compatible ="SYSCON";
    reg =<0x1c24 0x24>;
    phandle =<0xbc>;
    };
    
    dma-router@b78{
    compatible ="dma、dra7-crossti-ti";
    reg = 0xdma-cells = 0xdma-map>
    
    ;<0xdma-cells
    
    = 0xdma-dma-cells = 0xdma-dma-cells;<0xdma-dma-dma-cells = 0xdma-dma = 0xdma-c
    phandle =<0xaf>;
    };
    
    dma-router@C78{
    compatible ="ti、dra7-dma-crossbar";
    reg =<0xc78 0x7c>;
    #dma-cells =<0x2>;
    dma-requests =<0xcc>;
    ti、dma-safe-map =<0x0>;
    dma-ma-masters =<0xe>;
    phandle =<0xcd>;
    };
    
    
    cm_core_aon@5000{
    compatible ="ti、dra7-cm-core-aon";
    reg =<0x5000 0x2000>;
    phandle =<0x10a>;
    
    Clocks{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    phandle =<0x43>
    
    
    ;<clock-clocks
    
    
    
    = 0x4<lock<atl-0x0>;#clock<lock<lock<lock-clock<atl = 0x4<x0>
    
    atl_clkin1_ck{
    #clock-cells =<0x0>;
    compatible ="ti、dra7-atl-clock";
    Clocks =<0xF>;
    phandle =<0x42>;
    };
    
    atl_clkin2_ck{
    #clock-cells =<0x0>;
    compatible ="ti、dra7-atl-clock";
    Clocks =<0xF>;
    phandle =<0x41>;
    };
    
    atl_clkin3_ck{
    #clock-cells =<0x0>;
    compatible ="ti、dra7-atl-clock";
    Clocks =<0xF>;
    phandle =<0x40>;
    };
    
    HDMI_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x2F>;
    };
    
    MLB_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0xA5>;
    };
    
    mlbp_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>;
    phandle =<0xa6>;
    };
    
    pciesref_acs_clk_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x5f5e100>;
    phandle =<0x5a>;
    };
    
    Ref_clkin0_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    相位=<0x45>;
    };
    
    Ref_clkin1_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    相位=<0x46>;
    };
    
    Ref_clkin2_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    相位=<0x47>;
    };
    
    Ref_clkin3_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    相位=<0x48>;
    };
    
    RMII_clk_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    相位=<0x71>;
    };
    
    sdvenc_CLKIN_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    phandle =<0x10c>;
    };
    
    SECURE_32k_clk_src_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x8000>;
    phandle =<0x8F>;
    };
    
    SYS_clk32_crystal_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x8000>;
    phandle =<0xb>;
    };
    
    SYS_clk32_pseude_ck{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x10>;
    clock-mult =<0x1>;
    clock-div =<0x262>;
    phandle =<0xc>;
    };
    
    virt_12000000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0xb71b00>;
    phandle =<0x7f>;
    };
    
    virt_13000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0xc65d40>;
    phandle =<0x10d>;
    };
    
    virt_16800000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1005900>;
    phandle =<0x81>;
    };
    
    virt_19200000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x124f800>;
    phandle =<0x82>;
    };
    
    virt_20000000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1312d00>;
    phandle =<0x80>;
    };
    
    virt_26000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x18cba80>;
    phandle =<0x83>;
    };
    
    virt_27000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x19bfcc0>;
    phandle =<0x84>;
    };
    
    virt_38400000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x249f000>;
    phandle =<0x85>;
    };
    
    SYS_clkin2{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1588800>;
    相位=<0x44>;
    };
    
    USB_OTG_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x8c>;
    };
    
    video_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x39>;
    };
    
    video_m2_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x2e>;
    };
    
    VIDEO2_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x3a>;
    };
    
    VIDEO2_M2_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x2D>;
    };
    
    DPLL_AEC_CK@1e0{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-m4xen-clock";
    Clocks =<0x11 0x12>;
    reg =<0x1e0 0x1e4 0x1ec 0x1e8>;
    phandle =<0x13>;
    };
    
    DPLL_Abe-clocks
    
    = 0x13>;#am2-cock-clocks
    
    
    = 0x13>;#am4;am2-am4 = 0x13>
    
    DPLL_ABE_M2x2_ck@1f0{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x14>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1f0>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    phandle =<0x15>;
    };
    
    Abe_clk@108{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x15>;
    ti、max-div =<0x4>;
    reg =<0x108>;
    TI、索引-二进制功率;
    相位=<0x87>;
    };
    
    DPLL_AAB_m2@1f0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x13>;
    ti、max-div =<0x1f>;
    ti、自动空闲-移位=<0x8>;
    reg =<0x1f0>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    phandle =<0x6f>;
    };
    
    DPLL_AABE_m3x2_ck@1f4{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x14>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1F4>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x16>;
    };
    
    DPLL_CORE_BYP_MUx@12c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x16>;
    ti、bit-shift =<0x17>;
    reg =<0x12c>;
    phandle =<0x17>;
    };
    
    DPLL_CORE_CK@120{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-CORE-clock";
    Clocks =<0x10 0x17>;
    reg =<0x120 0x124 0x12c 0x128>;
    phandle =<0x18>;
    };
    
    DPLL_CORE_x2_CK{
    #clock-cells = 0x18>
    
    ;<clock-clock-cells
    
    = 0x18>;<0xx2-clock-clock-clocks = 0x18>;}
    
    DPLL_CORE_h12x2_ck@13c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x13c>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x1a>;
    };
    
    MPU_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clock=<0x1a>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x1b>;
    };
    
    DPLL_MPU_ck@
    
    
    
    
    
    
    
    @160{#clock-cells =<0x0>;compatible ="ti、omap5-MPU-DPLL-clock";Clocks =<0x10 0x1b>;reg =<0x160 0x164 0x16c 0x168>;phandle =<ti 0x4>;}<ti 0x4mcock-clocks
    
    =<tid<1m8>;<tid-mcock-r= 0x170-mcle
    
    = 0xds-rock<tid<1mcle;<ti
    ;<dle<1mcock-r=<ds-randcock<1mcock<1mcy<1mcy
    reg =<0x170>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x1c>;
    };
    
    MPU_dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x1c>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    相位=<0x93>;
    };
    
    DSP_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1a>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    相位=<0x1d>;
    };
    
    DPLL_DSP_BYP_mux@240{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x1d>;
    ti、bit-shift =<0x17>;
    reg =<0x240>;
    phandle =<0x1E>
    ;};
    
    DPLL_DSP_CK@234{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x10 0x1E>;
    reg =<0x234 0x238 0x240 0x23c>;
    Assigned Clock-Rates
    =<0x23c34600>;
    phandle = 0x1f>;
    }
    
    DPLL_DSP_m2_ck@244{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x1f>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x244>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    分配的时钟=<0x20>;
    分配的时钟速率=<0x23c34600>;
    PHANDLE =<0x20>;
    };
    
    IVA_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1a>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x21>;
    };
    
    DPLL_IVA_BYP_mux@1AC{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x21>;
    ti、bit-shift =<0x17>;
    reg =<0x1ac>;
    phandle =<0x22>;
    };
    
    DPLL_IVA_CK@1a0{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-clock";
    时钟=<0x10 0x22>;
    reg =<0x1a0 0x1a4 0x1ac 0x1a8>;
    分配的时钟=<0x23>;
    分配的时钟速率=<0x45723>;
    
    }
    
    DPLL_IVA_m2@1b0{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x23>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1b0>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    分配的时钟=<0x24>;
    分配的时钟速率=<0x17257f16>;
    phandle =<0x24>;
    };
    
    IVA_dclk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x24>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x95>;
    };
    
    DPLL_GPU_BYP_mux@2e4{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x16>;
    ti、bit-shift =<0x17>;
    reg =<0x2e4>;
    phandle =<0x25>
    ;}
    
    DPLL_GPU_CK@2d8{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-clock";
    时钟=<0x10 0x25>;
    reg =<0x2d8 0x2dc 0x2e4 0x2e0>;
    分配的时钟=<0x26>;
    分配的时钟速率=<0x4c1dle>
    
    ;}<79dle>
    
    DPLL_GPU_m2_ck@2e8{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x26>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2e8>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    分配的时钟=<0x27>;
    分配的时钟速率=<0x195f286b>;
    phandle =<0x27>;
    };
    
    DPLL_CORE_m2_ck@130{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x18>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x130>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x28>;
    };
    
    core_DPLL_OUT_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x28>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x97>;
    };
    
    DPLL_DDR_BYP_mux@21c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x16>;
    ti、bit-shift =<0x17>;
    reg =<0x21c>;
    phandle =<0x29>;
    };
    
    DPLL_DDR_CK@210{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x10 0x29>;
    reg =<0x210 0x214 0x21c 0x218>;
    phandle =<0x2a>;
    };
    
    DPLL_DDR_m2_ti@220 <
    时钟=<clock-cells =<0x8div
    
    
    ;<0x2a
    ;tid-cock-cells =<0x1div;dock-cock =<0x2A;<0xdock-cyclock-clock-cyclock<0x1div =<0x2A;<0x
    reg =<0x220>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x89>;
    };
    
    DPLL_GMAC_BYP_MUx@2B4{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x16>;
    ti、bit-shift =<0x17>;
    reg =<0x2b4>;
    phandle =<0x2b>;
    };
    
    DPLL_GMAC_CK@
    
    
    
    
    
    
    
    @2a8{#clock-cells =<0x0>;compatible ="ti、OMAP4-DPLL";Clocks =<0x10 0x2b>;reg =<0x2a8 0x2ac 0x2b4 0x2b0>;phandle =<0x2c>;};dplL_gMAC_clock<0x2m8>
    ;<0x2mcock
    
    
    = 0x2mcock-m8>;<0x2mcock-r= 0x2mcle d=<0x2m8>;<0x2mcock-r= 0x2mcle d=<0xd=<0x2m8>;auto-d<0xd<
    
    reg =<0x2b8>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x8a>;
    };
    
    VIDEO2_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子-时钟";
    Clocks=<0x2D>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x99>;
    };
    
    video/dclk_ddiv{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x2e>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x9a>;
    };
    
    HDMI_dclk_ddiv{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x2F>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x9b>;
    };
    
    PER_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x16>;
    时钟多路复用=<0x1>;
    Clock-div =<0x2>;
    PHANDLE =<0x5E>;
    };
    
    USB_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x16>;
    时钟多路复用=<0x1>;
    Clock-div =<0x3>;
    PHANDLE =<0x62>;
    };
    
    EV_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1a>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x30>;
    };
    
    DPLL_EVE_BYP_mux@290{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x30>;
    ti、bit-shift =<0x17>;
    reg =<0x290>;
    phandle =<0x31>;
    };
    
    DPLL_EIV_CK@284{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x10 0x31>;
    reg =<0x284 0x288 0x290 0x28c>;
    phandle =<0x32>;
    };
    
    DPLL_EIV_m2_ti@
    
    auti{#clock-cells = 0x32
    
    ;tid-cells = 0x32;dock-cock-cock<0xdiv =<0x32;dle=<0xdle>;}
    
    reg =<0x294>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x33>;
    };
    
    EVE_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x33>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0xa4>;
    };
    
    DPLL_CORE_h13x2_ck@140{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x3f>;
    ti、autidle-shift =<0x8>;
    reg =<0x140>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x10e>;
    };
    
    DPLL_CORE_h14x2_ck@144{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x144>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x72>;
    };
    
    DPLL_CORE_h22x2_ck@154{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x154>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x3b>;
    };
    
    DPLL_CORE_h23x2_ck@158{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x158>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x7E>;
    };
    
    DPLL_CORE_h24x2_ck@15c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x15c>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x10f>;
    };
    
    DPLL_DDR_x2_CK{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x2a>;
    phandle =<0x34>;
    };
    
    DPLL_DDR_h11x2_ck@228{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x34>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x228>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x110>;
    };
    
    DPLL_DSP_x2_CK{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x1f>;
    phandle =<0x35>;
    };
    
    DPLL_DSP_m3x2_ck@248{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x35>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x248>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    分配的时钟=<0x36>;
    分配的时钟速率=<0x17d78400>;
    相位=<0x36>;
    };
    
    DPLL_GMAC_x2_ck{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-x2-cock";
    时钟=<0x2C>;
    相位=<0x37>;
    };
    
    DPLL_GMAC_h11x2_ck@2c0{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x37>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c0>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x38>;
    };
    
    DPLL_GMAC_h12x2_ck@2c4{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x37>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c4>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x111>;
    };
    
    DPLL_GMAC_h13x2_ck@2c8{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x37>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c8>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    phandle =<0x112>;
    };
    
    DPLL_GMAC_m3x2_ck@2bc{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x37>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2bc>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x113>;
    };
    
    GMII_m_clk_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x38>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    phandle =<0x114>;
    };
    
    HDMI_clk2_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x2F>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x4e>;
    };
    
    HDMI_div_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x2F>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x54>;
    };
    
    L3_iclk_div@100{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    ti、max-div =<0x2>;
    ti、bit-shift =<0x4>;
    reg =<0x100>;
    时钟=<0x1a>;
    ti、索引-二进制功率;
    phandle =<0x9>;
    };
    
    L4_ROOT_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因数-时钟";
    时钟=<0x9>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    phandle =<0xA>;
    };
    
    video_1_clk2_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x39>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x4c>;
    };
    
    video_1_div_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x39>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x52>;
    };
    
    video_clk2_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x3a>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x4d>;
    };
    
    video/div_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x3a>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x53>;
    };
    
    ipu1_gfclk_mux@520{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clocks =<0x15 0x3b>;
    ti、bit-shift =<0x18>;
    reg =<0x520>;
    assigned 为时钟=<0x3cock>;
    assigned clock-shocks =<0x3cocks;alls =<0x3cocks
    phandle =<0x3c>;
    };
    
    McASP1_ahclkr_mux@550{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4c>;
    ti、bit-shift = 0x550;
    <0xreg =
    0x450
    ;<phandle = 0x5cle = 0x450;<0x4cle = 0x4cle = 0x550;<0x5cle = 0x4
    
    McASP1_ahclkx_mux@550{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x18>;
    reg = 0x550>
    
    ;<cf phandle}=<0x550>;
    
    McASP1_aux_gfclk_mux@550{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x550>;
    phandle =<0xce>;
    };
    
    timer5_gfclk_mux@558{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54 0x55>;
    ti、bit-shift =<0x18>;
    reg =<0x558>;0x558
    
    }=<phandle};
    
    timer6_gfclk_mux@560{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54 0x55>;
    ti、bit-shift =<0x18>;
    reg =<0x560>;
    }= 0x5160;
    
    
    timer7_gfclk_mux@568{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54 0x55>;
    ti、bit-shift =<0x18>;
    reg =<0x568>;
    <0x117>
    ;}
    
    timer8_gfclk_mux@570{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54 0x55>;
    ti、bit-shift =<0x18>;
    reg =<0x570>;
    }<phandle
    };
    
    uart6_gfclk_mux@580{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x580>;
    phandle =<0x119>;
    };
    
    dummy_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    相位=<0x11a>;
    };
    };
    
    时钟域{
    phandle =<0x11b>;
    }
    ;
    
    cm_core@
    
    
    
    
    
    
    
    
    
    @8000{Compatible ="ti、dra7-cm-core";reg =<0x8000 0x3000>;phandle =<0x11c>;Clocks{#address-cells =<0x1>;#size-cells =<0x2020cells =<0x202020cells;<0x20cock_clock_clock<0x204<0x20cells
    
    ;<0x204<1cells =<0x20cells;<0x20cell_clock_clock_clock<0x204<0x20cock_cells;<0x204<0x20cells =<0x204
    
    
    phandle =<0x58>;
    };
    
    DPLL_PCIe_ref_m2ldo_ck@210{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x58>;
    ti、max-div =<0x1f>;
    ti、auto-ide-shift =<0x8>;
    reg =<0x210>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x59>;
    };
    
    apll_PCIe_in_clk_mux@
    
    
    
    
    
    
    
    
    @
    
    
    
    
    
    
    
    @4ae06118{compatible ="ti、mux-clock";Clocks =<0x59 0x5a>;#clock-cells =<0x0>;reg =<0x21c 0x4>;ti、bit-shift =<0x7>;phandle =<0x21b>;}<clock-clock-clock<0x72x1kHz
    ;clip_clock<0x72x1kHz;clip_clock-clock<x1kHz;<pet<pet<x3b>= 0x32b>
    时钟=<0x50>;
    #clock-cells =<0x0>;
    reg =<0x13b0>;
    ti、bit-shift =<0x8>;
    phandle =<0xbd>;
    };
    
    optfclk_pciephy2_32kHz@4a0093b8{
    兼容="ti、gate-clock";
    时钟=<0x50>;
    #clock-cells =<0x0>;
    reg =<0x13b8>;
    ti、bit-shift =<0x8>;
    phandle =<0xc0>;
    };
    
    optfclk_pciephy_div@4a00821c{
    兼容="ti、分频器时钟";
    时钟=<0x5c>;
    #clock-cells =<0x0>;
    reg =<0x21c>;
    ti、分频器=<0x2 0x1>;
    
    ti、bit-shift = 0x8;<0xdiv
    
    = 0x5d>;<0xd>
    
    optfclk_pciephy1_clk@4a0093b0{
    compatible ="ti、gate-clock";
    Clocks =<0x5c>;
    #clock-cells =<0x0>;
    reg =<0x13b0>;
    ti、bit-shift =<0x9>;
    phandle =<0xbe>;
    };
    
    optfclk_pciephy2_clk@4a0093b8{
    兼容="ti、gate-clock";
    时钟=<0x5c>;
    #clock-cells =<0x0>;
    reg =<0x13b8>;
    ti、bit-shift =<0x9>;
    phandle =<0xc1>;
    };
    
    optfclk_pciephy1_div_clk@4a0093b0{
    compatible ="ti、gate-clock";
    Clocks =<0x5d>;
    #clock-cells =<0x0>;
    reg =<0x13b0>;
    ti、bit-shift =<0xA>;
    phandle =<bbbbv>;
    };
    
    optfclk_pciephy2_div_clk@4a0093b8{
    兼容="ti、gate-clock";
    时钟=<0x5d>;
    #clock-cells =<0x0>;
    reg =<0x13b8>;
    ti、bit-shift =<0xA;
    phandle =<0xC2>;
    };
    
    apll_PCIe_clkvcoldo{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x5c>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x11e>;
    };
    
    apll_PCIe_clkvcoldo_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x5c>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x11f>;
    };
    
    apll_PCIe_m2_ck{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x5c>;
    时钟多普勒=<0x1>;
    时钟 div =<0x1>;
    phandle =<0x8e>;
    };
    
    DPLL_PER_BYP_mux@14c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x5e>;
    ti、bit-shift =<0x17>;
    reg =<0x14c>;
    phandle =<0x5f>
    ;}
    
    DPLL_PER_CK@140{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x10 0x5f>;
    reg =<0x140 0x144 0x14c0x148>;
    phandle =<0x60>;
    };
    
    DPLL_PER_m2_ck@150{
    #clock-cells =
    
    <0x60>;
    
    ti、shock-cells =<0x60>;auto-cock-cells =<0x60>;<idr = 0x60>;ti、ti = 0x60>;tidr = 0x60>
    reg =<0x150>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x61>;
    };
    
    func_96m_aon"
    
    
    ;clock-cells/div{#clock-cells =<0x0>;compatible ="固定因子-时钟";Clock=<0x61>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x9C>;
    };
    
    DPLL_USB_BYP_mux@18c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x62>;
    ti、bit-shift =<0x17>;
    reg =<0x18c>;
    phandle =<0x63>
    ;}
    
    DPLL_USB_ck@180{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-j-type-clock";
    Clocks =<0x10 0x63>;
    reg =<0x180 0x184 0x18c 0x188>;
    phandle =<0x64>;
    };
    
    DPLL_USB_ti_ti_190@=
    
    
    0x64;<clock-m8>
    ;auto-shock = 0x64>;<id-mcle = 0x64>;dock-mcle = 0x64>;dock-mcock = 0x64>
    
    reg =<0x190>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x67>;
    };
    
    DPLL_PCIe_ref_m2_ck@210{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x58>;
    ti、max-div =<0x7f>;
    ti、autobide-shift =<0x8>;
    reg =<0x210>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x8d>;
    };
    
    DPLL_PER_x2_CK{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x60>;
    phandle =<0x65>;
    };
    
    DPLL_PER_h11x2_ck@158{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x65>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x158>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x66>;
    };
    
    DPLL_PER_h12x2_ck@15c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x65>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x15c>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x6a>;
    };
    
    DPLL_PER_h13x2_ck@160{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x65>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x160>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x7c>;
    };
    
    DPLL_PER_h14x2_ck@164{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x65>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x164>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x73>;
    };
    
    DPLL_PER_M2x2_CK@150{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x65>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x150>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x57>;
    };
    
    DPLL_USB_clkdcoldo{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x64>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x69>;
    };
    
    func_128m_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x66>;
    时钟多普勒=<0x1>;
    clock-div =<0x2>;
    phandle =<0x77>;
    };
    
    func_12m_fclk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x57>;
    时钟多普勒=<0x1>;
    clock-div =<0x10>;
    phandle =<0x120>;
    };
    
    func_24m_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x61>;
    时钟多普勒=<0x1>;
    Clock-div =<0x4>;
    phandle =<0x3f>;
    };
    
    func_48m_fclk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x57>;
    时钟多普勒=<0x1>;
    clock-div =<0x4>;
    phandle =<0x56>;
    };
    
    func_96m_fclk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x57>;
    时钟多普勒=<0x1>;
    clock-div =<0x2>;
    phandle =<0x121>;
    };
    
    l3init_60m_fclk@
    
    
    
    
    
    
    
    
    @104{#clock-cells =<0x0>;compatible ="ti、divider-clock";Clocks =<0x67>;reg =<0x104>;ti、dividers =<0x1 0x8>;phandle =<0x122>;};clock<0xbclock<0>
    =<0xbclock-clock<0>;clock<0xb<0>
    
    
    
    
    phandle =<0x123>;
    };
    
    l3init_960m_gfclk@6c0{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0x69>;
    ti、bit-shift =<0x8>;
    reg =<0x6c0>;
    phandle =<0x6e>;
    };
    
    dss_32kHz_clk@1120{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0xb>;
    reg =<0x1120>;
    phandle =<0x124>;
    };
    
    dss_48MHz_clk@1120{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x56>;
    ti、bit-shift =<0x9>;
    reg =<0x1120>;
    phandle =<0xe6>;
    };
    
    dss_dss_clk@1120{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x6a>;
    ti、bit-shift =<0x8>;
    reg =<0x1120>;
    TI、set-rate 父级;
    phandle =<0xe3>;
    };
    
    dss_HDMI_clk@1120{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0x6b>;
    ti、bit-shift =<0xA>;
    reg =<0x1120>;
    phandle =<0xe7>;
    };
    
    dss_video1_clk@1120{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x6c>;
    ti、bit-shift =<0xc>;
    reg =<0x1120>;
    phandle =<0xe4>;
    };
    
    dss_video2_clk@1120{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x6d>;
    ti、bit-shift =<0xd>;
    reg =<0x1120>;
    phandle =<0xe5>;
    };
    
    GPIO2_dbclk@1760{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1760>;
    phandle =<0x125>;
    };
    
    GPIO3_dbclk@1768{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1768>;
    phandle =<0x126>;
    };
    
    GPIO4_dbclk@1770{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1770>;
    phandle =<0x127>;
    };
    
    GPIO5_dbclk@1778{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1778>;
    phandle =<0x128>;
    };
    
    GPIO6_dbclk@1780{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1780>;
    phandle =<0x129>;
    };
    
    GPIO7_dbclk@1810{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1810>;
    phandle =<0x12a>;
    };
    
    GPIO8_dbclk@1818{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1818>;
    phandle =<0x12b>;
    };
    
    mmc1_clk32k@1328{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1328>;
    PHANDLE =<0x12c>;
    };
    
    mmc2_clk32k@1330{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1330>;
    phandle =<0x12d>;
    };
    
    mmc3_clk32k@1820{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1820>;
    phandle =<0x12e>;
    };
    
    MMC4_clk32k@1828{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1828>;
    phandle =<0x12f>;
    };
    
    SATA_ref_clk@1388{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x10>;
    ti、bit-shift =<0x8>;
    reg =<0x1388>;
    phandle =<0xbb>;
    };
    
    USB_OTG_SS1_refclk960m@13f0{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x6e>;
    ti、bit-shift =<0x8>;
    reg =<0x13f0>;
    phandle =<0xc5>;
    };
    
    USB_OTG_SS2_refclk960m@1340{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x6e>;
    ti、bit-shift =<0x8>;
    reg =<0x1340>;
    phandle =<0xc8>;
    };
    
    USB_phy1_always_on" clk32k@640{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x640>;
    phandle =<0xc4>;
    };
    
    USB_phy2_always_on" clk32k@688{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x688>;
    phandle =<0xc7>;
    };
    
    USB_phy3_always_on" clk32k@698{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x698>;
    phandle =<0xc9>;
    };
    
    ATL_DPLL_clk_mux@c00{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x50 0x39 0x3a 0x2F>;
    ti、bit-shift =<0x18>;
    reg =<0xc00>;
    phandle = 0x70>
    ;}
    
    atl_gfclk_mux@c00{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x9 0x6f 0x70>;
    ti、bit-shift =<0x1a>;
    reg =<0xc00>;
    phandle =<0xF>;
    };
    
    RMII_50MHz_clk_mux@13d0{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x38 0x71>;
    ti、bit-shift =<0x18>;
    reg =<0x13d0>;
    phandle =<0x130>;
    };
    
    GMAC_RFT_clk_mux@13d0{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x39 0x3a 0x6f 0x2F 0x9>;
    ti、bit-shift =<0x19>;
    reg =<0x13d0>;
    phandle =<0x11>;
    };
    
    GPU_CORE_Gclk_mux@1220{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x72 0x73 0x27>;
    ti、bit-shift =<0x18>;
    reg =<0x1220>;
    分配的时钟=<0x74>;
    分配的时钟父节点=<0x27>;
    phandle =<0x74>;
    };
    
    GPU_hyd_gclk_mux@1220{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x72 0x73 0x27>;
    ti、bit-shift =<0x1a>;
    reg =<0x122>;
    分配的时钟= 0x75>
    ;分配的时钟= 0x27>;分配的时钟=分配的父级
    phandle =<0x75>;
    };
    
    l3instr_ts_gclk_div@E50{
    #clock-cells =<0x0>;
    兼容="ti、divider 时钟";
    时钟=<0x76>;
    ti、bit-shift =<0x18>;
    reg =<0xe50>;
    TI、分频器=<0x8 0x10 0x20>;
    相位=<0x131>;
    };
    
    mcasp2_ahclkr_mux@1860{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3f 0x40 0x41 0x42 0x43 0x44 0x44 0x45
    
    = 0x1860
    
    ;<0x46>= 0x49>;<shift = 0x49>;<0x49>
    
    mcasp2_ahclkx_mux@1860{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x1860>;
    reg = 0xdle>
    
    ;}= 0x1860;
    
    mcasp2_aux_gfclk_mux@1860{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x1860>;
    phandle =<0xD1>;
    };
    
    mcasp3_ahclkx_mux@1868{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x18>;
    reg = 0x1868>
    
    ;}<phandle = 0x68;
    
    mcasp3_aux_gfclk_mux@1868{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x1868>;
    phandle =<0xd4>
    ;}
    
    mcasp4_ahclkx_mux@1898{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x18>;
    reg = 0x1898>
    
    ;}<phandle = 0x7;
    
    mcasp4_aux_gfclk_mux@1898{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x1898>;
    phandle =<0xd6>
    ;}
    
    mcasp5_ahclkx_mux@1878{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x18>;
    reg = 0x1878>
    
    ;}<phandle = 0x78;
    
    mcasp5_aux_gfclk_mux@1878{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x1878>;
    phandle =<0xd8>
    ;}
    
    mcasp6_ahclkx_mux@1904{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4dB>;
    ti、bit-shift =<0x18>;
    reg = 0x1904
    
    ;}= 0x1904;
    
    mcasp6_aux_gfclk_mux@1904{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x1904>;
    phandle =<0xda>;
    };
    
    mcasp7_ahclkx_mux@1908{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x18>;
    reg
    = 0x1908>
    ;<phandle}= 0x2041;
    
    mcasp7_aux_gfclk_mux@1908{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x16>;
    reg =<0x1908>;
    phandle =<0xdc>
    ;}
    
    mcasp8_ahclkx_mux@1890{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a>;
    ti、bit-shift =<0x16>;
    reg = 0x1890;
    }<phandle>
    
    
    mcasp8_aux_gfclk_mux@1890{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4b 0x4c 0x4d 0x4e>;
    ti、bit-shift =<0x18>;
    reg =<0x1890>;
    phandle =<0xde>
    ;}
    
    mmc1_fclk_mux@1328{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x77 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1328>;
    phandle =<0x78>;
    };
    
    mmc1_fclk_div@1328{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    clock =<0x78>;
    ti、bit-shift =<0x19>;
    ti、max-div =<0x4>;
    reg =<0x1328>;
    ti、index-power-of -two;
    phandle =<0x132>;
    };
    
    mmc2_fclk_mux@1330{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clock =<0x77 0x57>;
    ti、bit-shift =<0x18>;
    reg
    = 0x1330;<phandle
    = 0x79;reg = 0x79;
    
    mmc2_fclk_div@1330{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    clock =<0x79>;
    ti、bit-shift =<0x19>;
    ti、max-div =<0x4>;
    reg =<0x1330>;
    ti、index-power-of -two;
    phandle =<0x133>;
    };
    
    mmc3_gfclk_mux@1820{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clocks =<0x56 0x57>;
    ti、bit-shift =<0x1820;
    reg
    = 0x71820;reg = 0x71820;
    
    
    mmc3_gfclk_div@1820{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x7a>;
    ti、bit-shift =<0x19>;
    ti、max-div =<0x4>;
    reg =<0x1820(2008);
    ti、index-power-of -two;
    phandle =<0x134>;
    };
    
    MMC4_gfclk_mux@1828{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clocks =<0x56 0x57>;
    ti、bit-shift =<0x187b
    
    
    ;reg = 0x28>;<phandle = 0x18>;
    
    MMC4_gfclk_div@1828{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x7B>;
    ti、bit-shift =<0x19>;
    ti、max-div =<0x4>;
    reg =<0x1828>;
    ti、index-power-of -two;
    phandle =<0x135>;
    };
    
    QSPI_gfclk_mux@1838{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clocks =<0x77 0x7c>;
    ti、bit-shift =<0x18>
    
    
    ;reg = 0x18d>;
    
    QSPI_gfclk_div@1838{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x7d>;
    ti、bit-shift =<0x19>;
    ti、max-div =<0x4>;
    reg =<0x1838>;
    ti、index-power-of -two;
    phandle =<0xba>;
    };
    
    timer10_gfclk_mux@1728{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    clocks =<0x4f 0x50 0x44 0x45 0x46 0x47 0x47 0x53;
    randle
    
    
    = 0x54;<0x53 = 0x54;reg = 0x54;randle = 0x54 = 0x54;reg = 0x53
    
    timer11_gfclk_mux@1730{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1730>;
    phandle = 0x137;
    }
    
    timer13_gfclk_mux@17c8{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x17c8>;
    }<0x138>;
    
    
    timer14_gfclk_mux@17d0{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x17d0>
    
    ;}<phandle};
    
    timer15_gfclk_mux@17d8{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x17d8>
    
    ;}<0x13a;
    
    timer16_gfclk_mux@1830{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1830>;
    0x13b>
    ;}
    
    timer2_gfclk_mux@1738{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1738>;
    <0x13c>
    ;}
    
    timer3_gfclk_mux@1740{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1740>;
    <0x13d>
    ;}
    
    timer4_gfclk_mux@1748{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1748>;
    <0x13le>
    ;}
    
    timer9_gfclk_mux@1750{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1750>;
    phandle = 0x13f>
    ;}
    
    uart1_gfclk_mux@1840{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1840>;
    phandle =<0x140>;
    };
    
    uart2_gfclk_mux@1848{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1848>;
    phandle =<0x141>;
    };
    
    uart3_gfclk_mux@1850{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1850>;
    phandle =<0x142>;
    };
    
    uart4_gfclk_mux@1858{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1858>;
    phandle =<0x143>;
    };
    
    uart5_gfclk_mux@1870{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1870>;
    phandle =<0x144>;
    };
    
    uart7_gfclk_mux@18d0{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x18d0>;
    phandle =<0x145>;
    };
    
    uart8_gfclk_mux@18e0{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x18e0>;
    phandle =<0x146>;
    };
    
    uart9_gfclk_mux@18e8{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x18e8>;
    phandle =<0x147>;
    };
    
    vip1_gclk_mux@1020{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x9 0x7E>;
    ti、bit-shift =<0x18>;
    reg =<0x1020>;
    phandle =<0x148>;
    };
    
    vip2_gclk_mux@1028{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x9 0x7E>;
    ti、bit-shift =<0x18>;
    reg =<0x1028>;
    phandle =<0x149>;
    };
    
    vip3_gclk_mux@1030{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x9 0x7E>;
    ti、bit-shift =<0x18>;
    reg =<0x1030>;
    phandle =<0x14a>;
    };
    };
    
    时钟域{
    phandle =<0x14b>;
    
    coreao_clkdm{
    compatible ="ti、时钟域";
    时钟=<0x64>;
    phandle =<0x14c>;
    };
    };
    };
    };
    
    L4@4ae00000{
    compatible ="ti、dra7-l4-wkup"、"simple-bus";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x4ae00000 0x3f000>;
    phandle =<0x14d>;
    
    counter@4000 =<ti
    
    
    
    
    
    
    @4000 =<rex32k>;reprm = 0x360-eprm;"rem = 0x360-eprm = 0x000";rem = 0x360-rem;counter = 0x360-eprm = 0x000";"prm = 0x3600";rem = 0x000";prm = 0x360-eprm = 0x000";counter
    
    
    中断=<0x0 0x6 0x4>;
    相位=<0x14f>;
    
    时钟{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    相位=<0x150>;
    
    sys_clkin1@110{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";<0x85>
    
    
    ;0x85>;0x81-起始
    数= 0x85>;0x85>
    
    
    Abe_DPLL_sys_clk_mux@118{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x118>
    ;
    Phandle =<0x86>;
    };
    
    ti_DPLL_bype_mux@
    
    
    
    
    
    
    
    @114{#clock-cells = 0x50>
    ;clock_mux<0x86>;
    兼容时钟=
    0x12>;clock_mux_mux<0x12>;clock<0x12>
    reg =<0x10c>;
    phandle =<0x11>;
    };
    
    Abe_24m_fclk@
    
    
    
    
    
    
    
    
    @11c{#clock-cells =<0x0>;compatible ="ti、diver-clock";Clocks =<0x15>;reg =<0x11c>;ti、divers =<0x8 0x10>;phandle =<rema-clock<0x178>
    ;<TI-clock<rev = 0x178<rev =
    
    0x87>;clock-clock<rev = 0x178<rev = 0xdries>;<rev = 0x178-clus>;<rema-clock<rev = 0xdock<rev = 0xdle
    
    
    phandle =<0x88>;
    };
    
    Abe_giclk_div@174{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x88>;
    reg =<0x174>;
    ti、max-div =<0x2>;
    phandle =<0x51>;
    };
    
    Abe_LP_clk_div@
    
    
    
    
    
    
    
    
    @1d8{#clock-cells =<0x0>;compatible ="ti、diver-clock";Clocks =<0x15>;reg =<0x1d8>;ti、divers =<0x10 0x20>;phandle =<0xa7>;cldiv
    =<0x120>;ats-clock<0xdock<1<rev
    =<0x1d<x0>;ab_dock-cls =<xd<xd<xd<xd<1<xd<xd<xd>;ab<xd<xd<xd<xd<xd<1<
    
    
    
    phandle =<0x3E>;
    };
    
    adc_gfclk_mux@
    
    
    
    
    
    
    
    @1dc{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clocks =<0x10 0x44 0x50>;reg =<0x1dc>;phandle =<0x151>;};sys_clk1_degin =
    
    0x8;cldiv = 0xcock-cl8;cldiv = 0xcock<0xcock<0x8;cock-cldiv =<0xcycl<0xcock<0x8>
    
    
    
    TI、index-power-of -two;
    phandle =<0x90>;
    };
    
    sys_clk2_dclk_ddiv@1cc{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x44>;
    ti、max-div =<0x40>;
    reg =<0x1cc>;
    TI、索引-二进制功率;
    相位=<0x91>;
    };
    
    per_abe_x1_dclk_ddiv@1bc{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x6f>;
    ti、max-div =<0x40>;
    reg =<0x1bc>;
    TI、索引-二进制功率;
    相位=<0x92>;
    };
    
    dsp_gclk_div@18c{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x20>;
    ti、max-div =<0x40>;
    reg =<0x18c>;
    TI、索引-二进制功率;
    相位=<0x94>;
    };
    
    GPU_dclk@1a0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x27>;
    ti、max-div =<0x40>;
    reg =<0x1a0>;
    TI、索引-二进制功率;
    相位=<0x96>;
    };
    
    EMIF_phy_dclk_ddiv@190{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x89>;
    ti、max-div =<0x40>;
    reg =<0x190>;
    TI、索引-二进制功率;
    相位=<0x98>;
    };
    
    GMAC_250m_dlk_dclk_ddiv@19c{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x8a>;
    ti、max-div =<0x40>;
    reg =<0x19c>;
    TI、索引-二进制功率;
    相位=<0x8b>;
    };
    
    GMAC_MAIN_clk{
    #clock-cells =<0x0>;
    兼容="固定因数-时钟";
    时钟=<0x8b>;
    时钟-多普勒=<0x1>;
    Clock-div =<0x2>;
    phandle =<0xe0>;
    };
    
    l3init_480m_dclk_ddiv@1ac{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x67>;
    ti、max-div =<0x40>;
    reg =<0x1ac>;
    TI、索引-二进制功率;
    相位=<0x9d>;
    };
    
    USB_OTG_Dclk_ddiv@184{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x8c>;
    ti、max-div =<0x40>;
    reg =<0x184>;
    TI、索引-二进制功率;
    相位=<0x9e>;
    };
    
    SATA_dclk_div@1C0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x10>;
    ti、max-div =<0x40>;
    reg =<0x1c0>;
    TI、索引-二进制功率;
    相位=<0x9f>;
    };
    
    PCIe2_dclk_ddiv@1b8{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x8d>;
    ti、max-div =<0x40>;
    reg =<0x1b8>;
    TI、索引-二进制功率;
    相位=<0xa0>;
    };
    
    pcie_dclk_div@1B4{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x8e>;
    ti、max-div =<0x40>;
    reg =<0x1b4>;
    TI、索引-二进制功率;
    相位=<0xa1>;
    };
    
    emu_dclk_ddiv@194{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x10>;
    ti、max-div =<0x40>;
    reg =<0x194>;
    TI、索引-二进制功率;
    相位=<0xa2>;
    };
    
    SECURE_32k_dclk_ddiv@1c4{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x8F>;
    ti、max-div =<0x40>;
    reg =<0x1c4>;
    TI、index-power-of-two;
    phandle =<0xa3>;
    };
    
    clkoutmux0_clk_mux@
    
    
    
    
    
    
    
    @158{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clocks =<0x90 0x91 0x92 0x93 0x95 0x97 0x98 0x98 0x8b = 0x9a 0x9b;0x9a 0x9a 0x9a 0x9b = 0xa1 0x9b = 0x9b = 0xa1 0x9b;0x9a 0x9a 0xa1 0x9a 0x9a 0xa 0x9a 0xa 0xa cle = 0x9b = 0x9a 0x9a 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x1 0x1 0x1 0x1 0xa
    
    compatible ="ti、mux-clock";
    Clocks = 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x8b 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4>;
    reg =<0x15c>;
    phandle = 0x160_mux>
    
    
    @mux>;
    clock-clocks = 0x152-nock<0x152>;
    
    时钟=<0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x8b 0x99 0x9a 0x9b 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4>;
    reg =<0x160>;
    phandle =<0x68>;
    };custefus_0x9e 0xa1 0xa2 0xa3 0xa3 0xa3 0xa4;
    
    
    
    reg;<clock-cocks=<cock<cock<cycl>;<cycl=0xd=0xd=0xd=<cock-cock<cycl<xt>
    
    
    
    phandle =<0x153>;
    };
    
    eve_clk@180{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x330x36>;
    reg =<0x180>;
    phandle =<0x154>;
    };
    
    HDMI_DPLL_mux@
    
    
    
    
    
    
    
    @164{#clock-clock-clle= 0x164;clock-clock<0x10>
    ;<clock-clock-clock<0x134<l>;clock-clock-clock<l= 0x134<l>;clock-clock-clock<l= 0x4<l= 0x10>;clock-clock<l= 0x134<l= 0x10>;clock-clock<cl<cl
    
    时钟=<0xA5>;
    ti、max-div =<0x40>;
    reg =<0x134>;
    TI、索引-二进制功率;
    相位=<0x49>;
    };
    
    mlbp_clk@130{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0xa6>;
    ti、max-div =<0x40>;
    reg =<0x130>;
    TI、索引功率2;
    相位=<0x4a>;
    };
    
    per_abe_x1_gfclk2_div@138{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x6f>;
    ti、max-div =<0x40>;
    reg =<0x138>;
    TI、索引-二进制功率;
    相位=<0x4b>;
    };
    
    timer_sys_clk_div@144{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x10>;
    reg =<0x144>;
    ti、max-div =<0x2>;
    phandle =<0x4f>;
    }
    
    ;video_DPLL_clk_mux@
    
    
    
    
    
    
    
    @
    
    
    
    
    
    
    
    @168{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clocks =<0x10 0x44>;reg =<0x168>;phandle =<0x6c>;};video_DPLL_upclock<0x10>= 0x10>;<mux_clock-clock-clock<0x10>;<cock-clock<0x10>;<mux_mux<cock-cl<cl<cl<l= 0x10>= 0x10>;<cock-clus_clus_clock<cycl<l>
    
    
    时钟=<0x10 0xa7>;
    reg =<0x108>;
    phandle =<0x76>;
    };
    
    GPIO1_dbclk@1838{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x1838>;
    phandle =<0x155>;
    };
    
    dcan1_sys_clk_mux@1888{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x10 0x44>;
    ti、bit-shift =<0x18>;
    reg =<0x188>;
    phandle =<0xe2>;
    };
    
    Timer1_gfclk_mux@1840{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x4f 0x50 0x44 0x45 0x46 0x47 0x48 0x51 0x52 0x53 0x54>;
    ti、bit-shift =<0x18>;
    reg =<0x1840>;
    phandle = 0x156>
    ;}
    
    uart10_gfclk_mux@1880{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x56 0x57>;
    ti、bit-shift =<0x18>;
    reg =<0x1880>;
    phandle =<0x157>;
    };
    };
    
    时钟域{
    phandle =<0x158>;
    }
    ;SCM_conf
    
    @c000{
    compatible ="SYSCON";
    reg =<0xc000 0x1000>;
    phandle =<0x6>;
    }
    ;
    
    axi@
    
    
    
    
    
    @0{compatible ="simple-bus";#size-cells =<0x1>;#address-cells = 0x1000000 = 0x1000000
    ;0x50000> PCIe 范围0x1000000 = 0x0000-0x50000>
    REG =<0x51000000 0x2000 0x51002000 0x14c 0x1000 0x2000>;
    reg 名称="RC_dbics"、"ti_conf"、"config";
    中断=<0x0 0xe8 0x4 0x0 0xe9 0x4>;
    #address-cells =<0x3>;
    #size-cells =<0x2>;
    设备0x0000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0
    
    
    #interrupt-cells =<0x1>;
    num-lanes =<0x1>;
    Linux、PCI-domain =<0x0>;
    ti、hwmds ="pcie1";
    phys =<0xa8>;
    phy-names ="PCIe-phy0";
    interrupt-map-mask =<0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1
    0xa9 0x1 0x0 0x0 0x0 0x0 0x2 0x0 0x0 0x0 0x0 0x3 0xa9 0x3 0x3 0x4
    
    
    
    
    
    ;interrupt-cells = 0x4 0x0000> 0x4;interrupt-cells 0x0000.0x4 0x0000.0159= 0x0000.0x4;interrupt-cell-cells 0x0000.0x0000.0x0000.0x0000.0x0000.0x0000.0x0000.0x0000.0x0000.
    #interrupt-cells =<0x1>;
    phandle =<0xa9>;
    };
    
    
    PCIe_EP@51000000{
    兼容="ti、dra7-PCIe-EP";
    reg =<0x51000000 0x28 0x51002000 0x14c 0x51001000 0x28 0x1000 0x10000000>;
    reg-names ="EP_dbics"、"ti_docs"、"adbids"
    中断=<0x0 0xe8 0x4>;
    num-lanes =<0x1>;
    num-ib-windows =<0x4>;
    num-ob-windows =<0x10>;
    ti、hwmods ="pcie1";
    phys =<0xa8>;
    phy-names ="PCIe-phy0";
    ti、SYSCON-unaligned 访问=<0xAA 0x14 0x2>;
    status ="disabled";
    phandle =<0x15a>;
    };
    };
    
    AXI@1{
    兼容="简单总线";
    #SIZE-Cells =<0x1>;
    #ADDREST-Cells =<0x1>;
    范围=<0x51800000 0x51800000 0x3000 0x0 0x30000000 0x10000000>;
    状态="禁用";
    
    PCIe@51800000{
    兼容="dbti,dra7-pce";
    reg = 0x5180000"
    ;0x164"0x2000_config" 0x2000"
    ;0x5180c" 0x164"0x2000"
    #address-cells =<0x3>;
    #size-cells =<0x2>;
    device_type ="PCI";
    范围=<0x81000000 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x30013000 0x13000 0x0 0x0x0x0 0x000>;
    总线范围=<0x0 0xFF>;
    #interrupt-cells = 0x1
    、
    PCIe2
    = 0x1;<PCId'域= 0x1;<PCIed000>
    phys =<0xAB>;
    phy-names ="PCIe-phy0";
    interrupt-map-mask =<0x0 0x0 0x0 0x0 0x0
    0x1 0xac 0x1 0x0 0x0 0x0 0x2 0x0 0x0 0x0 0x0 0x3 0xac 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x0 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x2 0x2 0x2 0xac 0x2 0x2 0x2 0x0 0x0 0x0 0x0 0x0
    
    
    
    
    
    
    };
    };
    };
    
    ocmcram@40300000{
    compatible ="MMIO-SRAM";
    reg =<0x40300000 0x80000>;
    ranges =<0x0 0x40300000 0x80000>;
    #address-cells =<0x1>;
    #size-cells =<0x15b>;ranges
    = 0x40000
    
    @
    
    
    
    
    
    @reg
    ;sram = 0x400000 sram = 0x400000;"mm-reg";"0x400mram = 0x4000-";"= 0x400mram = 0x400";"mm"= 0x400mram = 0x400mr"
    
    ;0x400mr"= 0x400mram = 0x400";0x400mr"= 0x400mram = 0x400";
    范围=<0x0 0x40400000 0x100000 >;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    phandle =<0x15c>;
    };
    
    ocmcram@40500000{
    status ="disabled";
    compatible ="MMIO-SRAM";
    reg =<0x40500000 0x100000>;
    ranges =<0x0 0x40500000 0x100000>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    phandle =<0x15d>;
    };
    
    带隙@4a0021e0{
    reg =<0x4a0021e0 0xc 0x4a00232c 0xc 0x4a002380 0x2C 0x4a0023c0 0x3c 0x4a002564 0x8 0x4a002574 0x50>;
    compatible ="ti、dra79-bandap";
    interrupts =<0x4a0025>
    ;热
    启动
    
    = 0xdemcell-0x4a002574 0x752>;<thermal = 0xds-bandec #-cells;<0xds-bandcells = 0x5cells;<0xds-bandcells
    
    DSP_SYSTEM@40d00000{
    compatible ="SYSCON";
    reg =<0x40d00000 0x100>;
    phandle =<bbx9>;
    };
    
    padconf@4844a000{
    compatible ="ti、dra7-iodelay";
    reg =<0x4844a000 0xinctrl>;
    #address-cells =<0x1>;
    <0x15pandle>;<0x1cell-cells
    
    = 0x1cells = 0x1cells;<0x1cell-cells = 0x1cells = 0x1cells;<0x
    
    mmc1_iodelay_DDR_rev11_conf{
    pinctrl-PIN-array =<0x618 0x23c 0x21c 0x620 0x5f5 0x0 0x624 0x0 0x258 0x628 0x0 0x62c 0x37 0x630 0x193 0x78 0x634 0x0 0x638 0x0 0x0 0x63c 0x0 0x640 0x0 0x650 0x0 0x0 0x6580x0 0x0 0x64c 0x0 0x0 0x64 0x0 0x0 0x0 0x65 0x65 0x0 0x0 0x64 0x0 0x65 0x65 0x0 0x65 0x0 0x64 0x0 0x65 0x0 0x65 0x0 0x64 0x0 0x65 0x65 0x65 0x0 0x0 0x0 0x65c 0x0 0x0>;
    phandle =<0x15f>;
    };
    
    mmc1_iodelay_ddr50_rev20_conf{
    pinctrl-pino-array =<0x618 0x434 0x14a 0x620 0x4f7 0x0 0x654 0x2d2 0x0 0x628 0x0 0x62c 0x0 0x630 0x2ef 0x0 0x644 0x0 0x640 0x14 0x648 0x0 0x0 0x6580x0 0x6580x0 0x6580x0 0x64C 0x0 0x0 0x0 0x0 0x6580x0 0x6580x0 0x6580x0 0x0 0x640 0x0 0x0 0x0 0x0 0x6580x0 0x0 0x6580x0 0x6580x0 0x0 0x6580x0 0x0 0x0 0x65c 0x0 0x0>;
    phandle =<0x160>;
    };
    
    mmc1_iodelay_sdr104_rev11_conf{
    pinctrl-pin_pine-array = 0x620 0x427 0x11 0x628 0x0 0x62c 0x17 0x0 0x634 0x0 0x640 0x650 0x0 0x6580x0 0x6580 0x658C0 0x658C0 0x658C0 0x658C0 0x658C0 0x658C0 0x658C0 0x658C0 0x658C0 0x65400x658C0 0x65400x65400x658C0 0x658C0 0x658C0
    
    
    
    mmc1_iodelay_sdr104_rev20_conf{
    pinctrl-pino-array =<0x620 0x258 0x190 0x628 0x0 0x62c 0x0 0x0 0x634 0x0 0x638 0x1E 0x0 0x640 0x0 0x0 0x644 0x0 0x0 0x64c 0x0 0x0 0x650 0x162 0x0 0x0 0x658>0x6580 0x658>0x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x000
    
    
    
    mmc2_iodelay_hs200_rev11_conf{
    pinctrl-pino-array =<0x190 0x26d 0x258 0x12c 0x0 0x1a8 0x2e3 0x258 0xf0 0x1ac 0xf4 0x32c 0x258 0x1b8 0x1c0 0x1c0 0x3ba 0x2580x1c0 0x2580x1d0x1c0 0x2580x1c0 0x1c0 0x2580x1c00x1c00x1c00x2580x1c00x1c00x1c00x1c00x1c00x2580x1c00x1c00x1c00x2580x1c00x1c00x1c00x1c00x1c00x1c00x 0x235 0x258 0x200 0x3c 0x0 0x364 0x3c9 0x258 0x368 0xb4 0x0>;
    phandle =<0x163>;
    };
    
    mmc2_iodelay_HS200_rev20_conf{
    pinctrl-PIN-array =<0x190 0x112 0x0 0x194 0xa2 0x0 0x1a8 0x191 0x1ac 0x49 0x0 0x1b4 0x1d1 0x0 0x1b8 0x73 0x0 0x1c0 0x279 0x1c4 0x1c0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x106 0x0 0x200 0x2e 0x0 0x364 0x2ac 0x0 0x368 0x4c 0x0>;
    相位=<0x164>;
    };
    
    mmc2_iodelay_DDR_3_3V_rev11_conf{
    pinctrl-pin-array =<0x18c 0x0 0x78 0x190 0x0 0x194 0xae 0x0 0x1a4 0x109 0x168 0x1a8 0x0 0x1ac 0x0 0x1b0 0x78 0x78 0x1b4 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1c0 0x1d 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x78 0x1f0 0x0 0x1F4 0x78 0x0 0x1f8 0x78 0x78 0x64 0x1fc 0x0 0x0 0x200 0x0 0x0 0x360 0x165 0x0 0x0x0x0x0
    0x0 0x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000x000
    
    
    mmc2_iodelay_DDR_1_8v_rev11_conf{
    pinctrl-pin-array =<0x18c 0x0 0x190 0x0 0x194 0xae 0x0 0x1a4 0x112 0xf0 0x1a8 0x0 0x1ac 0x0 0x1b0 0x1b0 0x1c 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x3c 0x1f0 0x0 0x0 0x1F4 0x78 0x0 0x1f8 0x79 0x364 0x1fc 0x0 0x0 0x200 0x0 0x166 0x0 0x360 0x0x0 0x0x0
    0x0x0 0x0x0 0x0 0x0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3F4 0x0x0x0 0x0x3c0 0x0x3c 0x
    
    
    mmc3_iodelay_manual1_conf{
    pinctrl-PIN-array =<0x678 0x196 0x0 0x680 0x293 0x0 0x684 0x0 0x688 0x0 0x68c 0x0 0x0 0x690 0x82 0x0 0x694 0x0 0x0 0x698 0x0 0x0 0x0 0x69c 0xA9 0x0 0x6a0 0x0 0x0 0x6a0 0x0 0x6b0 0x0 0x0 0x6b0 0x0 0x0 0x0 0x6b0 0x0 0x0 0x00x6b0 0x0 0x00x00x00x00x00x6 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x6 0x0 0x0 0x 0x0 0x0 0x6bc 0x0 0x0>;
    phandle =<0x167>;
    };
    
    MMC4_iodelay_DS_rev11_conf{
    pinctrl-PIN-array =<0x840 0x0 0x848 0x0 0x84c 0x60 0x0 0x850 0x0 0x854 0x0 0x0 0x870 0x246 0x0 0x874 0x0 0x0 0x78 0x0 0x0 0x0 0x87c 0x187 0x0 0x880 0x0 0x888 0x880 0x0 0x880 0x0 0x880 0x0 0x880 0x88 0x88 0x0 0x880 0x0 0x88 0x88 0x88 0x88 0x88 0x88 0x0 0x88 0x88 0x88 0x0 0x88 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x 0x0 0x0 0x89c 0x0 0x0>;
    phandle =<0x168>;
    };
    
    MMC4_iodelay_DS_rev20_conf{
    pinctrl-pine-array =<0x840 0x0 0x848 0x0 0x84c 0x133 0x0 0x850 0x0 0x854 0x0 0x0 0x870 0x311 0x0 0x874 0x0 0x0 0x78 0x0 0x0 0x0 0x87c 0x265 0x280 0x0 0x888 0x0 0x880 0x0 0x0 0x880 0x0 0x0 0x880 0x0 0x880 0x0 0x8848 0x0 0x0 0x88 0x88 0x88 0x88 0x88 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x88 0x88 0x0 0x 0x0 0x0 0x89c 0x0 0x0>;
    phandle =<0x169>;
    };
    
    MMC4_iodelay_sdr12_hs_sdr25_rev11_conf{
    pinctrl-pine-array =<0x840 0x0 0x848 0xa5b 0x0 0x84c 0x763 0x0 0x850 0x0 0x854 0x0 0x870 0x779 0x0 0x874 0x0 0x0 0x898 0x878 0x8780x0 0x890 0x880 0x0 0x880 0x880 0x0 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x870 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x8C 0x880 0x880 0x0 0x 0x0 0x0 0x89c 0x0 0x0>;
    phandle =<0x16a>;
    };
    
    MMC4_iodelay_sdr12_hs_sdr25_rev20_conf{
    pinctrl-pin_array =<0x840 0x0 0x848 0x47b 0x0 0x84c 0x72a 0x0 0x850 0x0 0x854 0x0 0x870 0x875 0x0 0x874 0x0 0x0 0x898 0x878 0x878 0x7880 0x88c 0x0 0x8880 0x780 0x8880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x 0x0 0x0 0x89c 0x0 0x0>;
    phandle =<0x16b>;
    };
    
    
    DMA 控制器@4a056000{
    compatible ="ti、omap4430-sdma";
    reg =<0x4a056000 0x1000>;
    interrupts =<0x0 0x7 0x4 0x8 0x4 0x4 0x0 0x0 0x4
    
    0x4;<0x4 DMA-通道;0x4 0x4 0x4 0x4 0x4 DMA-
    通道;0x4 0x4 =
    0x4 0x4 0x4 DMA-通道;<0x4 0x4 0x4 DMA-通道;0x4 0x4-0X0>
    };
    
    EDMA@43300000{
    compatible ="ti、EDMA3-tpcc";
    ti、hwmods ="tpcc";
    reg =<0x43300000 0x100000>;
    reg-names ="EDMA3_cc";
    interrupts =<0x0 0x169 0x4 0x4 0x4 0x0 0x167 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0xEDMA3 0x3
    ="eDMA3_cc3;"eDMAint_requests";"eDMA3-r_int_int";
    
    #dma-cells =<0x2>;
    ti、tptcs =<0xad 0x7 0xae 0x0>;
    phandle =<0xe>;
    };
    
    tptc@
    
    
    
    
    
    
    
    
    @43400000{compatible ="ti、EDMA3-tptc";ti、hwptmonds ="tptc0";reg =<0x43400000
    ;tintrabout1 = 0x0003;tagramtinc = 0x0003;tintrabout1 = 0x0003;tintrabout1 = 0xtag3;tagmands = 0xtag3;tag3 = 0x000<tagc = 0x000"
    
    
    中断=<0x0 0x173 0x4>;
    中断名称="EDMA3_tcertcertcertrint";
    相位=<0xaE>;
    }
    
    ;GPIO@4hw10000{
    兼容="ti、OMAP4-GPIO";
    reg =<0x4ae10000 0x200>;
    中断=<0x0 0x18 0x4>;
    ti、mods ="GPIO-2"
    
    ;控制器#GPIO1-cells;
    
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<b1>;
    };
    
    GPIO@48055000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48055000 0x200>;
    中断=<0x0 0x19 0x4>;
    ti、hwmods ="GPIO2;<gp4
    
    
    控制器-cells;<interrupts-cells-cells = 0xgp4;<gpio2;<gpio>
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<0x16c>;
    };
    
    GPIO@48057000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48057000 0x200>;
    中断=<0x0 0x1A 0x4>;
    hwmods ="gpio3";<gpio
    
    controllers-cells;<gpio
    控制器<0x2;<gpio>
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<0x16d>;
    };
    
    GPIO@48059000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48059000 0x200>;
    中断=<0x0 0x1b 0x4>;
    hwmods ="gpio4";<gpio
    
    
    控制器= 0x2;<gpio 控制器单元;<gpio 控制器<inter-cells
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<0x16e>;
    };
    
    GPIO@4805b000{
    Compatible ="ti、OM-GPIO";
    reg =<0x4805b000 0x200>;
    interrupts =<0x0 0x1c 0x4>;
    hwmods ="gpio5"
    
    
    ;控制器#interrupt-cell-cells;<GPIO5-cell-cells;<0xgp4控制器<0xcell-cell-cells;<GPI
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<0x16f>;
    };
    
    GPIO@4805d000{
    compatible ="ti、omag4-gpio";
    reg =<0x4805d000 0x200>;
    中断=<0x0 0x1d 0x4>;
    ti、mods ="gpio6
    
    ;
    控制器#interrupts-cell-cells;<gpio2;<gpio-cells = 0xgpio6;<gpio>
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<bbx6>;
    };
    
    GPIO@48051000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48051000 0x200>;
    中断=<0x0 0x1E 0x4>;
    ti、hwmods ="GPIO7";<GPIO-controller
    
    ;<GPIO-cells = 0x2;<interrupts-cells-cells;<GPIO-controllers-cells;<GPIO-cells
    
    #interrupt-cells =<0x2>;
    u-boot、dm-spl;
    phandle =<0x170>;
    };
    
    GPIO@48053000{
    Compatible ="ti、OM4-GPIO";
    reg =<0x48053000 0x200>;
    interrupts =<0x0 0x74 0x4>;
    ti、hwmods ="GPIO8";<GPIO-controllers-cells
    
    ;<0xcell-cells;<GPIO4-cells = 0x4;<GPIO-cells;<interrupts-cells;
    
    #interrupt-cells =<0x2>;
    phandle =<0x171>;
    }
    
    ;串行@4806a000{
    compatible ="ti、dra742-UART"、"ti、omap4-UART";
    reg =<0x4806a000 0x100>;
    interrupts-extended =<0x1 0x0 0x43 0x4>;
    ti、mods ="uateg"
    
    
    
    
    ;<0xdcdcr = 0x32>= 0xdc-shock = 0x3r";<dma-shock = 0xdr = 0xdma-shift;<0xdr = 0x3atr = 0xdr = 0x3atr = 0xdr = 0xdr = 0xdr;<dcr = 0xdcr = 0x3atr;
    
    phandle =<0x172>;
    }
    
    ;串行@4806c000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x4806c000 0x100>;
    interrupts =<0x0 0x44 0x4>;
    ti、hwmods ="uart2";
    时钟频率=<0x2dc6c000;
    
    0x33>;dma= 0x173>;
    "phr"= 0x173r"
    ;"phandr"= 0x173"
    ;ta-rx = 0x173";"phrx = 0x173";}
    
    串行@48020000{
    Compatible ="ti、dra742-UART"、"ti、omAP4-UART";
    reg =<0x48020000 0x100>;
    interrupts = 0x0 0x45 0x4>;
    ti、hwmods ="uart3";
    Clock-frequency =<0x2dc6c00>;
    status ="oke";
    DMA = 0x174= 0x45>
    
    ;dma-shift
    
    
    
    = 0x3mr = 0x45>;0x3df = 0x3dr = 0x3df = 0x3dr;df = 0x3df = 0x3df = 0x3dr;df = 0xdf = 0x3df rs;0x3df = 0xdf = 0x3df rs;0xdf = 0x3df =
    
    串行@4806e000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x4806e000 0x100>;
    interrupts =<0x0 0x41 0x4>;
    ti、hwmods ="uart4";
    时钟频率=<0x2dc6c00>;
    status ="禁用";
    DMA= 0x37>
    ;0x175TX =
    0x175TX = 0x175s;0x175TX = 0x175s = 0x175s;0x175s = 0x175s = 0x175s = 0x175s;rf
    
    
    串行@48066000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48066000 0x100>;
    interrupts =<0x0 0x64 0x4>;
    ti、hwmods ="uart5";
    时钟频率=<0x2dc6c00>;
    status ="disabled";
    DMAs = 0x176>
    ;0x3f rx = 0x176rf;}f rf rx = 0x176rf rf = 0x176cf;[0x176c]
    
    
    
    串行@48068000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48068000 0x100>;
    interrupts =<0x0 0x65 0x4>;
    ti、hwmods ="uart6";
    时钟频率=<0x2dc6c00>;
    status ="disabled";
    DMAs = 0x177">
    ;0x4f rx = 0x177-f;}f rf rx = 0x177-rf
    
    
    
    串行@48420000{
    兼容="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48420000 0x100>;
    中断=<0x0 0xda 0x4>;
    ti、hwmods ="uart7";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    phandle = 0x178>;
    };
    
    串行@48422000{
    兼容="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48422000 0x100>;
    中断=<0x0 0xdb 0x4>;
    ti、hwmds ="uart8";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    phandle = 0x179>;
    };
    
    串行@48424000{
    兼容="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48424000 0x100>;
    中断=<0x0 0xdc 0x4>;
    ti、hwmds ="uart9";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    <0x17andle = 0x17a;
    };
    
    串行@4ae2b000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x4ae2b000 0x100>;
    interrupts =<0x0 0xdd 0x4>;
    ti、hwmds ="uart10";
    时钟频率=<0x2dc6c00>;
    status ="disabled";
    <0x17dcphandle>;
    };
    
    邮箱@4a0f4000{
    兼容="ti、omap4-mailbox";
    reg =<0x4a0f4000 0x200>;
    中断=<0x0 0x15 0x4 0x87 0x4 0x0 0x0 0x86 0x4>;
    ti、hwmds ="mailbox1";
    #mbox-cells =<0x1>;
    ti、mbox-FIFOs =<0x8-num
    ;<0xnum = 0x8-num = 0xnum;<8-num = 0xnum = 0xnum
    status ="禁用";
    phandle =<0x17c>;
    };
    
    mailbox@4883a000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x4883a000 0x200>;
    interrupts =<0x0 0xED 0x4 0x0 0xee 0x4 0xef 0x4 0x0 0x0 0xf0 0x4>;
    ti、mohvs = 0x4mbox
    
    
    =<mail-box>;<muss = 0xnum = 0x4muss;<mcum-box>
    status ="禁用";
    phandle =<0x17d>;
    };
    
    mailbox@4883c000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x4883c000 0x200>;
    interrupts =<0x0 0xF1 0x4 0x0 0x2 0x4 0x3 0x3 0x4 0x4 0x4 0x4 0x4;
    ti、mcbox =<mail-box>
    ;muss
    = 0x4 0x4 0x4 0x4 num;<mailbox>= 0x4 mcums = 0x4 0x4 mcums;<mailbox = 0x4mnum-*** = 0x4 <mailbox>
    
    status ="禁用";
    phandle =<0x17e>;
    }
    
    ;mailbox@4883e000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x4883e000 0x200>;
    interrupts =<0x0 0xf5 0x4 0xf6 0x4 0x0 0xf7 0x4 0x0 0xf8 0x4>;
    ti-mbox
    
    = 0xmuss = 0x4num
    ;<muss = 0x4num、mcums = 0x4s;<mbo-box = 0xmuss = 0x4muss;<mnum-mailbox = 0x4muss = 0x4muss;<muss = 0x4muss;
    status ="禁用";
    phandle =<0x17f>;
    };
    
    mailbox@48840000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48840000 0x200>;
    interrupts =<0x0 0xf9 0x4 0xfa 0x4 0xfb 0x4 0x0 0xFC 0x4 0xFC 0x4>;
    ti、mohr= 0xmcub>
    ;<0xmuss
    = 0xnum = 0x4mcub>;框<0xmuss = 0xmcum-box>;<0xmnum-mailbox>
    
    状态="确定";
    相位= 0x180>;
    
    mbox_ipc3x{
    ti、mbox-TX =<0x6 0x2 0x2>;
    ti、mbox-Rx =<0x4 0x2 0x2>;
    状态="确定";
    相位=<0x181>;
    
    
    
    
    
    
    
    
    };mbox_dsp1_ipcbox = 0x2;<0x182>;<0x2;phandle = 0x2;}
    
    邮箱@48842000{
    Compatible ="ti、OMAP4-mailbox";
    reg =<0x48842000 0x200>;
    interrupts =<0x0 0xFD 0x4 0x0 0xFF 0x4 0x4 0x0 0x100 0x4>;
    ti、hwmds ="mailbox6";
    #mbox-cells =<0x1>;
    ti、mbox>
    = 0xnum = 0x4num;<mnum-users-users-num-users= 0x4num = 0xnum = 0x4num;<mbox-users-num-users-num-users-
    状态="确定";
    相位= 0x183>;
    
    mbox_ipc3x{
    ti、mbox-TX =<0x6 0x2 0x2>;
    ti、mbox-Rx =<0x4 0x2 0x2>;
    状态="确定";
    相位=<0x184>;
    };mbox_dsp2_RX=<0x185>
    
    
    
    
    ;状态
    = 0x185mbox = 0x2;<0x2>;状态= 0x185mrx = 0x2;phandle = 0x2;}
    
    
    
    邮箱@48844000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48844000 0x200>;
    interrupts =<0x0 0x101 0x4 0x102 0x4 0x103 0x4 0x0 0x104 0x4>;
    ti、hwmds ="mailbox7";
    #mbox-cells =<0x1>;
    <mbox-users=0xnum
    、<0x4mc盒= 0xnum;<mnum-users-users-num-users=0x4mcum-num-users<0x4>;<mbox<mnum-users-
    status ="禁用";
    phandle =<0x186>;
    }
    
    ;邮箱@48846000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48846000 0x200>;
    中断=<0x0 0x105 0x4 0x0 0x106 0x4 0x107 0x4 0x0 0x108 0x4>;
    ti、hwmos = 0x4-mbox
    
    
    ;<musers-box>
    status ="禁用";
    phandle = 0x187>;
    }
    
    ;邮箱@4885e000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x4885e000 0x200>;
    中断=<0x0 0x109 0x4 0x0 0x10a 0x4 0x10b 0x4 0x0 0x10c 0x4>;
    ti、mohrb
    
    = 0x4;<mailbox>= 0xmnum = 0x4;<blus-*** = 0x4mc盒子= 0x4muss;<0x4mnum-mailbox>;<blus-*** = 0x4mcums = 0xnum = 0x4mcr <blus-***
    
    status ="禁用";
    phandle = 0x188>;
    }
    
    ;邮箱@48860000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48860000 0x200>;
    interrupts =<0x0 0x10d 0x4 0x10e 0x4 0x0 0x10f 0x4 0x4 0x4 0x0 0x110 0x4>;
    ti、hwmos = 0x4-mbox
    
    = 0xmnum;<0x4-mcums = 0x4-mnum>;mailbox = 0xmnum-*** = 0x4-mcells;<0x4-mnum-box>
    
    状态="禁用";
    相位= 0x189>;
    }
    
    ;邮箱@48862000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48862000 0x200>;
    中断=<0x0 0x111 0x4 0x112 0x0 0x113 0x4 0x0 0x114 0x4>;
    FIFti、monds ="0x4mbox"
    
    ;<0xmnum1-musers-box";<0x4mnum1-mbox>;<0x4mnum1-mnum1-mbox>
    
    status ="禁用";
    phandle =<0x18a>;
    };
    
    mailbox@48864000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48864000 0x200>;
    interrupts =<0x0 0x115 0x4 0x0 0x116 0x4 0x0 0x117 0x4 0x0 0x118 0x4>;
    ti、hwmos = 0x4-mbox
    
    
    =<mnum>;<mail-box>;<mnum-cells = 0x4-mbox>
    status ="禁用";
    phandle =<0x18b>;
    }
    
    ;邮箱@48802000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48802000 0x200>;
    interrupts =<0x0 0x17b 0x4 0x17c 0x4 0x17d 0x4 0x0 0x17e 0x4>;
    ti、mcbox
    
    
    = 0x13>;<mnum-mailbox= 0xmuss;<0xmcums = 0x13>
    status ="禁用";
    phandle =<0x18c>;
    };
    
    计时器@4ae18000{
    compatible ="ti、omap5430-timer";
    reg =<0x4ae18000 0x80>;
    中断=<0x0 0x20 0x4>;
    ti、hwmonds ="Timer1";
    ti、timer-alwon;
    phandle = 0x18d>
    ;}
    
    计时器@48032000{
    compatible ="ti、omap5430-timer";
    reg =<0x48032000 0x80>;
    interrupts =<0x0 0x21 0x4>;
    ti、hwmods ="timer2";
    phandle =<0x18e>;
    };
    
    计时器@
    
    
    
    
    
    
    
    @48034000{compatible ="ti、omap5430-timer ="0x34000";timer = 0x480000";<timer = 0x34000";timer = 0x34000";timer = 0x34000"计时器= 0x34000";timer = 0x34000";timer = 0x34000"计时器= 0x34000";timer = 0x34000"
    
    reg =<0x48036000 0x80>;
    中断=<0x0 0x23 0x4>;
    ti、hwmds ="timer4";
    phandle =<0x190>;
    };
    
    计时器@
    
    
    
    
    
    
    
    @488191{compatible ="ti、omap5430-timer";reg =<0x48820000 0x80>;中断=<0x0 0x4824、reg = 0x4850;timermoti = 0x8230;timermotr = 0x4820;
    timer = 0x4821;timermoti = 0x4820;timer = 0x000>
    
    中断=<0x0 0x25 0x4>;
    ti、hwmds ="timer6";
    phandle =<0x192>;
    }
    
    ;计时器@
    
    
    
    
    
    
    
    @48824000{Compatible ="ti、omap5430-timer";reg =<0x48824000 0x80>;interrupts =<0x0 0x26 0x4>;hwmoti
    、monds ="0x4880";<0x4830> timere= 0x48000";timere= 0x4830> timere= 0x48000";<timere80>
    
    
    
    phandle =<0x194>;
    }
    
    ;计时器@4803e000{
    compatible ="ti、omap5430-timer";
    reg =<0x4803e000 0x80>;
    interrupts =<0x0 0x28 0x4>;
    ti、hwmds ="timer9";
    phandle =<0x195>;
    
    
    
    
    
    
    
    
    };计时器@48086000{compatible = 0x80>;timeramoti = 0x4600>;timerams = 0x80<0x80>;timere= 0x80>;timere= 0x4mandle = 0x80<0x80>;timerams = 0x80";timere= 0x80";timer = 0x80"
    
    计时器@48088000{
    compatible ="ti、omap5430-timer";
    reg =<0x48088000 0x80>;
    interrupts =<0x0 0x2a 0x4>;
    ti、hwmods ="timer11";
    phandle =<0x197>;
    };
    
    timer@4ae20000{
    compatible ="ti、omap5430-timer";reg
    
    
    = 0x198
    、timer
    
    = 0x4wandle;<timer = 0x000a、timer = 0x000a、timer = 0x80>
    };
    
    计时器@48828000{
    compatible ="ti、omap5430-timer";
    reg =<0x48828000 0x80>;
    中断=<0x0 0x153 0x4>;
    ti、hwmods ="timer13";
    phandle =<0x199>;
    };
    
    计时器@
    
    
    
    
    
    
    
    @4882a000{compatible ="ti、omap5430-reg;<0x48000"计时器= 0x48000";timer = 0x480004;timer = 0x480004;timer = 0x480004;timer = 0x48000a timer = 0x48000";timer = 0x48000"
    
    reg =<0x4882c000 0x80>;
    中断=<0x0 0x155 0x4>;
    ti、hwmds ="timer15";
    phandle =<0x19b>;
    }
    
    ;计时器@
    
    
    
    
    
    
    
    @4882e000{compatible ="ti、omap5430-timer";reg =<0x4882e000 0x80>;中断= 0x14000
    ;t
    = 0x4dT = 0x4hinds;t = 0x4dT = 0x14000;timereande = 0x4dT = 0x4dT = 0x14000>
    中断=<0x0 0x4b 0x4>;
    ti、hwmods ="ap4_timer2";
    phandle =<0x19d>;
    };
    
    hwlock@4a0f6000{
    compatible ="ti、OMwd-spinlock";
    reg =<0x4a0f6000 0x1000>;
    ti、hwmods ="lock";#x19e>
    ;#vandcell-cells
    
    = 0x19e>
    
    DMM@4e000000{
    compatible ="ti、omap5-DMM";
    reg =<0x4e000000 0x800>;
    interrupts =<0x0 0x6c 0x4>;
    ti、hwmods ="DMM";
    };
    
    i2c@48070000{
    compatible ="ti、OM-i2c";
    reg =<0x4800000
    
    = 0x100>;
    <cells
    
    = 0x100>= 0x100";<cells = 0x2700>= 0x100";<cells = 0x100"= 0xcells = 0x100";<cells = 0x100"= 0x100";<cells = 0x100>
    时钟频率=<0x61a80>;
    u-boot、dm-spl;
    phandle =<0x19f>;
    
    tps659038@58{
    compatible ="ti、tps659038";
    reg =<0x58>;
    interrupt-parent =<0xb1>;
    interrupt =<0x0 0x8>;
    #interrupt-cells-cells =<ti-controllers-hand-handle>
    
    
    ;powercontroller-hand-rle;interrupt-hand-hand-rle =<0x2;power-hand-rupt-mas;power-hand-
    phandle =<bb2>;
    
    tps659038_PMIC{
    compatible ="ti、tps659038-PMIC";
    
    稳压器{
    
    smps12}{
    regulator-name ="smps12";
    regulator-min-microvolt =<0xcf850>;
    regulator-max-microvolt =<0x1312d0>;
    regulator-step-on-holds;regulator-step-on;regulator-always 启动;regulator-always
    
    phandle =<0x5>;
    };
    
    smps3{
    reguler-name ="smps3";
    reguler-min-microvolt =<0x149970>;
    reguler-max-microvolt =<0x149970>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xf0>;
    };
    
    smps45{
    reguler-name ="smps45";
    reguler-min-microvolt =<0xcf850>;
    reguler-max-microvolt =<0x1312d0>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0x1a0>;
    };
    
    smps6{
    reguler-name ="smps6";
    reguler-min-microvolt =<0xcf850>;
    reguler-max-microvolt =<0x118c30>;
    reguler-always-on;
    reguler-boot-on;
    phandle =<0x1A1>;
    };
    
    smps8{
    reguler-name ="smps8";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always-on;
    reguler-boot-on;
    phandle =<0x1a2>;
    };
    
    ldo1{
    reguler-name ="ldo1";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-boot-on;
    reguler-always-on;
    phandle =<bbbv8>;
    };
    
    ldo2{
    reguler-name ="ldo2";
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0x1a3>;
    };
    
    ldo3{
    reguler-name ="ldo3";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always-on;
    reguler-boot-on;
    phandle =<0x1a4>;
    };
    
    ldo4{
    reguler-name ="ldo4";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always-on;
    reguler-boot-on;
    phandle =<0x1a5>;
    };
    
    ldo9{
    reguler-name ="ldo9";
    reguler-min-microvolt =<0x100590>;
    reguler-max-microvolt =<0x100590>;
    reguler-always-on;
    reguler-boot-on;
    范德尔=<0x1a6>;
    };
    
    ldoln{
    reguler-name ="ldoln";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always-on;
    reguler-boot-on;
    phandle =<0x1a7>;
    };
    
    ldousb{
    reguler-name ="ldousb";
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-boot-on;
    phandle =<0xc6>;
    };
    
    regen1{
    reguler-name ="regen1";
    reguler-boot-on;
    reguler-always-on;
    phandle =<0xef>;
    };
    };
    };
    
    tps659038_RTC{
    Compatible ="ti,Palms-rtc";
    interrupt-parent =<b2>;
    interrupts =<0x8 0x2>;
    WAKEUP - SOURCE;
    phandle =<0x1a8>;
    };
    
    tps659038_pwr_Button{
    compatible ="ti,parmas-wrbutton";
    
    <0x2>
    
    ;<parent = 0x2>;shorts659038_wakeup_ble= 0x2;<parent;<parall-seconds;<parent = 0x2>;<parent;<parent = 0x2>;<parent;<parent = 0x2;<parent
    
    
    
    tps659038_gpio{
    compatible ="ti、Palms-gpio";
    gpi-controller;
    #gpi-cells =<0x2>;
    phandle =<0x1a>;
    };
    };
    };
    
    i2c@48072000{
    兼容="ti、OMAP4-i2c";
    reg =<0x48072000 0x100>;
    中断=<0x0 0x34 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c2";
    状态="禁用";
    phandle =<0x1ab>;
    };
    
    i2c@48060000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x48060000 0x100>;
    interrupts =<0x0 0x38 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmonds ="i2c3"
    ;status ="确定";
    时钟频率=<0x61a80>;
    相位=<0x1ac>;
    
    RTC@6F{
    兼容="microchip、mcp7941x";
    reg =<0x6f>;
    中断扩展=<0x1 0x0 0x2 0xb2 0x1 0x424>;
    中断名称="IRQ"、"WAKEUP";
    VCC-SUPPLY =<0x3>;唤醒
    源
    phandle =<0x1AD>;
    };
    }
    
    ;i2c@4807a000{
    兼容="ti、OMAP4-i2c";
    reg =<0x4807a000 0x100>;
    中断=<0x0 0x39 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmonds ="i2status";"icus"
    
    phandle =<0x1ae>;
    };
    
    i2c@4807c000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x4807c000 0x100>;
    interrupts =<0x0 0x37 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、modds ="hw2c5"
    ;status ="disabled"
    phandle =<0x1af>;
    }
    
    ;MMC@4809c000{
    compatible ="ti、dra7-hsmmc"、"ti、omAP4-hsmmc";
    reg =<0x4809c000 0x400>;
    interrupts =<0x0 0x4e 0x4>;
    ti、hwmods ="mmc1";
    reg =<0x3d、
    dma-rs = 0x3d、d"特殊
    
    
    状态;"dma-rbt = 0x3d = 0xd";"dma-rbt = 0x3bt、d";"dma-supply"= 0xdma-reset = 0x3d = 0xd";"v";"dma-reset = 0x3
    
    最大频率=<bbbbb71b000>;
    pinctrl-names ="default"、"hs";
    pinctrl-0 =<b5>;
    总线宽度=<0x4>;
    CD-GPIOs =<b6 0x1b 0x1>;
    pinctrl-1 =<bbb7>;
    VMMC-supply =<bb0>;
    u-boot、dm-spl;
    phandle =<0x1b0>;
    };
    
    MMC@480b4000{
    compatible ="ti、dra7-hsmmc"、"ti、OMAP4-hsmmc";
    reg =<0x480b4000 0x400>;
    interrupts =<0x0 0x51 0x4>;
    ti、hwmds ="mmc2";
    ti、needs -special -reset;
    DMA =<0x000"
    
    ;dmaf = 0x71baf
    = 0x000>;"rx-f"最大值= 0x2f;"r"
    SD-UHS-sdr25;
    SD-UHS-sdr12;
    MMC-HS200-1_8v;
    MMC-DDR-1_8v;
    u-boot、dm-spl;
    phandle =<0x1b1>;
    };
    
    MMC@480ad000{
    compatible ="ti、dra7-hsmmc"、"ti、OMAP4-hsmmc";
    reg =<0x480ad000 0x400>;
    interrupts =<0x0 0x59 0x4>;
    ti、hwmods ="mmc3";
    ti、needs -rand-traf =
    0x4d"
    ;"0x4dma"= 0x4d";"dma-reset-reset-rupt";"0x4dma-d"
    
    = 0x4df = 0x4d";"dma-rx df = 0x4d";"dma-rx d"
    SD-UHS-sdr12;
    SD-UHS-sdr25;
    SD-UHS-sdr50;
    phandle =<0x1b2>;
    };
    
    MMC@480d1000{
    compatible ="ti、dra7-hsmmc"、"ti、OMAP4-hsmmc";
    reg =<0x480d1000 0x400>;
    interrupts =<0x0 0x5b 0x4>;
    ti、bmmds ="mc4";
    ti、needs -special -reset;
    DMA =<0x000"
    
    ;dmax = 0x3a-dma
    = 0x000>;"rx dma"最大值= 0x71dma";"dmax-dma";"dma = 0x3a-dma = 0x000"
    SD-UHS-sdr12;
    SD-UHS-sdr25;
    phandle =<0x1b3>;
    };
    
    MMU@
    
    
    
    
    
    
    
    
    
    
    @40d01000{compatible ="ti、dra7-DSP-iommu";reg =<0x40d01000 0x100>;interrupts =<0x0 0x17 0x4>;ti、hwmods =<0x40mu";<0x40mu";<0x40mu0mu";<0dmu"= 0x40mu";<0x40mu0mu";<0mu0mu"
    
    
    中断=<0x0 0x91 0x4>;
    ti、hwmods ="mu1_dsp1";
    #iommu-cells =<0x0>;
    ti、SYSCON-mmutconfig =<b9 0x1>;
    状态="禁用";
    phandle =<0x1b5>;
    };
    
    MMU@58882000{
    <ti-mu"
    
    
    
    
    
    ;<bus"中断= 0x100";iommu-r";<mu"禁用"it"<mu";iommu"= 0x100";iemu-r"<mu"<mu";ium-ib"<b<b<b<b<mu"= 0x100"
    phandle =<0x1b6>;
    };
    
    MMU@55082000{
    compatible ="ti、dra7-iommu";
    reg =<0x55082000 0x100>;
    interrupts =<0x0 0x18c 0x4>;
    ti、hwmos ="MMU_ipu2";
    #iommu-cells =<0x0>;"ti-hwmu"
    
    ;"i-us"总线状态=禁用;iommu-err;"i-bi-us"
    phandle =<0x1b7>;
    };
    
    电脑控制器- ABB - MPU{
    compatible ="ti、ABB - v3";
    电脑控制器名称="ABB_MPU";
    #address-cells =<0x0>;
    #size-cells =<0x0>;
    Clocks =<0x10>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07ddc 0x4 0x4ae07de0 0x4 0x4ae06014 0x4 0x4a003b20 0xc 0x4ae0c158 0x4>;
    reg-names ="setup-address"、"control-address"、"efint-address"、"use"、"efint "LDO-address";
    ti、traxdo-status-mask =<0x80>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x102ca0 0x0 0x0 0x0 0x2000000 0x1f00000 0x11bv3-0x000<0x000>
    
    
    
    
    
    
    
    ;0x0000-0x0x1000-000-0x0x0x0x0x0x0x0x0x0x0x0x1000-1 bv3-0x000<0x000>;0x000-0x0x0x1000-1个兼容单元格;0x0000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x
    时钟=<0x10>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07e34 0x4 0x4ae07e24 0x4 0x4ae06010 0x4 0x4a0025cc 0xc 0x4a002470 0x4>;
    reg-names ="setup-address"、"control-address"、"efine-address"、"use-address"、"efint-address" "LDO-address";
    ti、traxdo-status-mask =<0x40000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x1ce-mcr
    
    
    
    
    
    
    = 0x00000
    ;0x0000-0x0x1d0 = 0x0000-0x0x0x0x0x0x0x0x0x1d0;d1 d1 d0 = 0xd1 d0;d1 d1 d1 dabv3-000<1 0xd1 0x000>
    时钟=<0x10>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07e30 0x4 0x4ae07e20 0x4 0x4ae06010 0x4 0x4a0025e0 0xc 0x4a00246c 0x4>;
    reg-names ="setup-address"、"control-address"、"efine"、"int-address" "LDO-address";
    ti、traxdo-status-mask =<0x20000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x1cr
    
    
    
    
    
    
    = 0x1000;<0x0000-0x0x0x0x0x0x1bb = 0x0000-0x0x0x0x0>
    ;<GPUb-0x0x0x0x0x0x0x0x0x0x0x0>
    时钟=<0x10>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07de4 0x4 0x4ae07de8 0x4 0x4ae06010 0x4 0x4a003b08 0xc 0x4ae0c154 0x4>;
    reg-names ="setup-address"、"control-address"、"efint-address"、"efint 使用" "LDO-address";
    ti、tranxdo-status-mask =<0x10000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10a1d0 0x0 0x2000000 0x0001f00000
    
    
    
    @
    
    
    ;0x4000-0x0001m1000 = 0x0001m1000;0x0001m1000 = 0x0001mc4 0x0001m1000;0x0001m1000 = 0x0001mc4 0x0004 0x0004 0x0004 0x0001mc4 0x0004 0x0001mc4 0x0004 0x0001mc4 0x0004 0x0001mc4 0x0001mc4 0x0001m4 0x0001mc4 0x0001m4 0x0001mc4 0x
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="mcspi1";
    ti、spi-num-cs =<0x4>;
    DMA =<0xaf 0x23 0xaf 0x24 0xaf 0x25 0xaf 0x26 0xaf 0x27 0xaf 0x28 0xaf 0x29 0xaf 0x2a>;
    dma-names ="tx0"、"rx0"、"tx1"、"rx1"、"rx1"、 "tx2"、"rx2"、"TX3"、"rx3";
    status ="disabled";
    phandle =<0x1bc>;
    };
    
    SPI@4809a000{
    compatible ="ti、OMAP4-mcspi";
    reg =<0x4809a000 0x200>;
    interrupts =<0x0 0x3D 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="mcn-2";
    <spi-ccs
    DMA =<0xaf 0x2b 0xaf 0x2C 0xaf 0x2D 0xaf 0x2e>;
    dma-names ="tx0"、"rx0"、"tx1"、"rx1";
    status ="禁用";
    phandle =<0x1bd>;
    };
    
    SPI@480b8000{
    compatible ="ti、OMAP4-mcspi";
    reg =<0x480b8000 0x200>;
    interrupts =<0x0 0x56 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwccs
    =<0x3msp"
    DMA =<0xaf 0xF 0xaf 0x10>;
    dma-names ="tx0"、"rx0";
    status ="禁用";
    phandle =<0x1be>;
    };
    
    SPI@480ba000{
    compatible ="ti、omag4-mcspi";
    reg =<0x480ba000 0x200>;
    interrupts =<0x0 0x2b 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmonds ="mcspi4";
    ti、SPI-cnum<0x1>;
    DMA =<0xaf 0x46 0xaf 0x47>;
    dma-names ="tx0"、"rx0";
    status ="禁用";
    phandle =<0x1bf>;
    };
    
    QSPI@4b300000{
    compatible ="ti、dra7xxx-QSPI";
    reg =<0x4b300000 0x100 0x5c000000 0x4000000>;
    reg 名称="QSPI_base"、"QSPI_mmap";
    SYSCON-chipsSELECs=<0x8 0xba>;
    #address ti-cells =<0x1
    
    ;<qspi= 0x558>cyclocks =<0x000<x0>;#mcyclocks =<qs<xmmap;#mose-cocks = 0x558<q
    
    时钟名称="fck";
    num-cs = 0x4>;
    中断= 0x0 0x157 0x4>;
    状态="禁用";
    u-boot、dm-spl;
    phandle =<0x1c0>;
    
    m25p80@
    
    
    
    
    
    @0{compatible ="SPI-flash";u-boot、dm-spl;}<0x1ccs>
    
    
    ;m-cus = 0x0000>;#ocp1cots = 0x1cots;<049p1cots-cotrs = 0x1cotrs;}
    
    reg =<0x4a090000 0x20>;
    ti、hwmds ="ocp2scp3";
    
    phy@4A096000{
    compatible ="ti、phy-pipe3-SATA";
    reg =<0x4a096000 0x80 0x4a096400 0x64 0x4a096800 0x40>;
    reg-names ="ti-p-0x374_clocks
    
    
    
    
    
    
    = 0xcyclus";<0x3phy = 0xcyclbn = 0xcycl-clocks = 0xcycl-clocks;<x3py";<xphy = 0xcycl-clby-clocks = 0x3rs = 0xcyclbl = 0xcr = 0xcycl-clocks = 0x3py";<xphy = 0xcyclby-clbl = 0xcycl-clocks
    
    pciephy@4a094000{
    compatible ="ti、phy-pipe3-pce";
    reg =<0x4a094000 0x80 0x4a094400 0x64>;
    reg-names ="phy_Rx"、"phy_TX";
    SYSCON-phy-power =<0xbb c 0x1c>;SYSCON-94400 0x64>=
    0xbl
    
    、0xbl = 0xbl、"0xbk_clbs"、"0xbd"、0x5k_clbd"、"r" "div-clk"、"phy-div"、"SYSCLK";
    #phy-cells =<0x0>;
    phandle =<0xa8>;
    };
    
    pciephy@4a095000{
    compatible ="ti、phy-pipe3-pce";
    reg =<0x4a095000 0x80 0x4a095400 0x64>;
    reg 名称="phy_Rx"、"phy_TX";
    SYSCON-phy-power =<0x4a095400 0x64>;reg 名称="bphy_rx"、"0xbps"、"0xbps" 0xbnbx5k_cl1
    ;
    "cclr" 0xc1、0xc1、0xc1、0xcclk_clr" 0xc1、0xb1、0xc1、0xc1、0xc1、0xc1、0xc2
    "div-clk"、"phy-div"、"SYSCLK";
    #phy-cells =<0x0>;
    状态="禁用";
    phandle =<0xab>;
    };
    
    
    };SATA@4a141100{
    兼容="SNP、DWC-AHCI";
    reg =<0x4a140000 0x1100 0x4a141100 0x7>;
    中断=<0x0 0x31 0x4>;
    PHY =<0xc3>;
    phy-names ="SATA-phy";
    
    hwti ="SATA";hwds"= 0xbb"
    端口实现=<0x1>;
    状态="禁用";
    相位=<0x1c1>;
    };
    
    RTC@48838000{
    兼容="ti、am3352-RTC";
    reg =<0x48838000 0x100>;
    中断=<0x0 0xd9 0x4 0x0 0xd9 0x4>;
    ti、ammodes =
    0x50>;rtcs
    
    = 0x000>
    
    ocp2scp@4a080000{
    compatible ="ti、OMAP-ocp2scp"、"simple-bus";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges;
    reg =<0x4a080000 0x20>;
    ti、hwmds ="ocp2scp1";
    u-boot、dm-spl;
    
    phy@4a084000{
    compatible ="ti、dra7x-usb2"、"ti、OMAP-USb2";
    reg =<0x4a084000 0x400>;SYSCON-0xcphy
    
    
    = 0xcy<0x300>
    ;<cphy = 0xcyclus-0xcyclb2;<cyclus= 0xcyclb2 = 0xcyclus<xcyclus<xcyclus";<cyclus= 0xcyclus<cyclus<0xcyclus<xcyclus<
    
    u-boot、dm-spl;
    phandle =<0xca>;
    };
    
    phy@4a085000{
    compatible ="ti、dra7x-USB2-phy2"、"ti、OMAP-USB2";
    reg =<0x4a085000 0x400>;
    SYSCON-phy-power =<0x8 0xe74>;"ti、OMAP-USb2";
    
    
    
    reg = 0xcclby-cocks = 0xcyclby-clby-clby-cy<0xcy>;= 0xcyclby-cyclby-cyclby-cy<0xcy<0xcy<0xcy<0xcy<x0>;
    phandle =<0xcc>;
    };
    
    phy@4a084400{
    compatible ="ti、OMAP-USB3";
    reg =<0x4a084400 0x80 0x4a084800 0x64 0x4a084c00 0x40>;
    reg-names ="Rx_phy"、"phy_TX"、"pll_ctrl";SYSCON=
    0x10nocks
    
    
    = 0xcocks = 0xcyclk>、"0xcphy"、"rk#xrphy"、"rphy"= 0xcy"、"rk#xcy";<cclus"= 0xcclus"= 0xcock-clus"、"rk#xrk#xrupt";
    u-boot、dm-spl;
    phandle =<0xcb>;
    }
    ;
    
    OMAP-dwc3_1@48880000{
    兼容="ti、dwc3";
    ti、hwmds ="USB_OTG_SS1";
    reg =<0x48880000 0x10000>;
    中断=<0x0 0x48 0x4>;
    
    
    <out1 = 0xmi-cells = 0x1;<out1 = 0xmi-cells = 0xmi-cells;<out1;<out1 = 0xmi-cells = 0xmi-cells = 0x1;<out<out<out1;<out
    
    u-boot、dm-spl;
    phandle =<0x1c3>;
    
    USB@48890000{
    兼容="SNP、dwc3";
    reg =<0x48890000 0x17000>;
    中断=<0x0 0x47 0x4 0x47 0x4 0x0 0x48 0x4>;
    中断名称="外设
    
    
    
    "、"USB2"、"host-phy"= 0xb2;"maximum phy"="phy-phy";"us-phy"="us"
    SNP、ds_u3_suspuhy_quirk;
    SNP、ds_u2_suspuhy_quirk;
    u-boot、dm-spl;
    phandle =<0x1c4>;
    };
    };
    
    omap_dwc3_2@488c0000{
    兼容="ti、dwc3";
    ti、hwmds ="USB_OTG_SS2";
    reg =<0x488c0000 0x10000>;
    中断=<0x0 0x57 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    <0xutmi-mode
    ranges = 0x2;<0xutmi-modes;<0xdime-cries>
    PHANDLE =<0x1c5>;
    
    USB@488d0000{
    兼容="SNPs、dwc3";
    reg =<0x488d0000 0x17000>;
    中断=<0x0 0x49 0x4 0x49 0x4 0x0 0x57 0x4>;
    中断名称="外设"、"主机"、"OTG";
    PHYs = 0xcc;
    PHY-names ="USB2-phy";
    最大速度="高速";
    dr_mode ="主机";
    SNP、ds_u3_suspuhy_quirik;
    SNP、ds_u2_suspuhy_quirik;
    phandle =<0x1c6>;
    };
    };
    
    OMAP-dwc3_3@48900000{
    兼容="ti、dwc3";
    ti、hwmods ="USB_OTG_SS3";
    reg =<0x48900000 0x10000>;
    中断=<0x0 0x158 0x4>;
    #address-cells =<0x1>;
    
    大小= 0x2;#utmi-cells = 0x1;#-modes =<0x1;#-modes =<0x1;<utmi-cells
    =<0x1;#-modes =<0x
    状态="禁用";
    相位=<0x1c7>;
    
    USB@48910000{
    兼容="SNP、dwc3";
    reg =<0x48910000 0x17000>;
    中断=<0x0 0x58 0x4 0x0 0x58 0x4 0x0 0x158 0x4>;
    中断名称="外设"、"主机"、"OTG"
    ;最大高速
    DR_MODE ="OTG";
    SNP、dis_U3_suspuhy_quirk;
    SNP、ds_u2_suspuhy_quirk;
    phandle =<0x1c8>;
    };
    };
    
    elm@48078000{
    compatible ="ti、am3352-elm";
    reg =<0x48078000 0xfc0>;
    interrupts =<0x0 0x1 0x4>;
    ti、hwmds ="elm";
    status ="disabled";
    phandle =<0x1c9>;
    };
    
    GPMC@50000000{
    compatible ="ti、am3352-GPMC";
    ti、hwmds ="GPMC";
    reg =<0x50000000 0x37c>;
    interrupts =<0x0 0xF 0x4>;
    DMA =<0xcd 0x4 0x0>;
    dma-names ="rxwait";
    GPMC、tx-cs = 0x2
    
    ;<GPMC=0xnum = 0x2;<0xMC-cells = 0xnum = 0x2;<0x4>
    #size-cells =<0x1>;
    中断控制器;
    #interrupt-cells =<0x2>;
    GPIO-controller;
    #GPIO-cells =<0x2>;
    status ="禁用";
    phandle =<0x1ca>;
    };
    
    ATL@4843c000{
    compatible ="ti、dra7-atl";
    reg =<0x4843c000 0x3ff>;
    ti、hwmods ="atl";
    ti、provided 时钟=<0x43 0x42 0x41 0x40>;
    clocks =<0xF>;
    clocks
    
    = 0x1fly"="phandle"
    };
    
    McASP@48460000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="McASP1";
    reg =<0x48460000 0x2000 0x45800000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x68 0x4 0x67 0x4>;
    interrupt-names = 0x80"
    
    ;0xdcd = 0x1"
    ;"rx rx rx 1、"rx"
    时钟名称="Fck、"ahclkx"、"ahclkr";
    状态="禁用";
    PHANDLE =<0x1cc>;
    };
    
    McASP@48464000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmonds ="mcasp2";
    reg =<0x48464000 0x2000 0x45c00000 0x1000>;
    reg -names ="MPU"、"dat";
    interrupts = 0x48464> 0x982"
    ;0x982RX = 0x495"0x4"0x4"0x4"0x4"0xDMA";0x4"0xDMA";0x4"0x4"0xDMA"
    
    
    时钟=<0xD1 0xd2 0xd3>;
    时钟名称="fk"、"ahclkx"、"ahclkr";
    状态="禁用";
    phandle =<0x1cd>;
    };
    
    McASP@48468000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp3";
    reg = 0x48468000 0x2000 0x46000000 0x1000>;
    reg -names ="MPU"、"dat";
    interrupts =<0x0 = 0x85"
    ;0x84";0xDMA-Rx
    
    1 = 0x85";0xDMD
    = 0x85";0x4 RX";0x4 RX";0x4rx 1 = 0x4rx rx rx r"
    时钟名称="Fck)、"ahclkx";
    状态="禁用";
    相位=<0x1ce>;
    };
    
    McASP@4846c000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmds ="mcasp4";
    reg =<0x4846c000 0x2000 0x48436000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x99 0x4 0x98 0x98"
    
    
    
    ;"0xddr"= 0x87";"0xddr"= 0xddr";"0xddr"= 0xdcc";"0xddr"= 0xddr"= 0xt";0xdrx 1;"rx rx rx rx rx rx r"= 0xt";"rx rx rx rx 1;
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    phandle =<0x1cf>;
    };
    
    McASP@48470000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp5";
    reg =<0x48470000 0x2000 0x4843a000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9b 0x4 0x0 0x8 0x9a;
    "dcd"= 0x89"
    
    
    ;"rx 1 = 0xdma";"rx 1 = 0xdq";"rx 1 = 0xdq";"rx 1、"rx rx 1、"rx 1、"rx 1、"rx r";"rx rx 1、"r"= 0x9a
    时钟名称="Fck)、"ahclkx";
    状态="禁用";
    phandle =<0x1d0>;
    };
    
    McASP@48474000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp6";
    reg =<0x48474000 0x2000 0x4844c000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9d 0x4 0x9C 0x9c = 0x8db
    
    
    
    ;"0xdma"= 0xdma 1;"0xdq"= 0xdq";"0xdma"= 0xdq";"0xdq"= 0xdq";"0xdq"= 0xdq";"0xdq-rx 1;"0xdq"= 0xdq"= 0xdq
    时钟名称="Fck)、"ahclkx";
    状态="禁用";
    phandle =<0x1d1>;
    };
    
    McASP@48478000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp7";
    reg =<0x48478000 0x2000 0x48450000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9f 0x4 0x9e 0x4 0x4e 0x4e 0x4>
    
    
    
    ;0x8dr = 0xdr = 0xdr;"0xdc-r";"0xds" 0xdr = 0xdr = 0xdr = 0xdr;"0xdr = 0xdr = 0xdr = 0xd";"0xdr = 0xdr;"0xdr = 0xdr =
    时钟名称="Fck)、"ahclkx";
    状态="禁用";
    phandle =<0x1d2>;
    };
    
    McASP@4847c000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp8";
    reg =<0x4847c000 0x2000 0x48454000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x4 0xa1 0xa1 0xa1 0xdma"
    
    
    ;"0xdma-rx 1
    = 0xdq";"0xdq"= 0xdq1;"0xdq"= 0xdq1;"0xdq-rx 1;"0xdq"= 0xdq";"0xdq-rx 1 = 0xdq";"0xdq-rx 1;
    时钟名称="Fck)、"ahclkx";
    状态="禁用";
    phandle =<0x1d3>;
    };
    
    crossbar@4a002a48{
    compatible ="ti、irq-crossbar";
    reg =<0x4a002a48 0x130>;
    中断控制器;
    interrupt-parent =<0x7>;
    #interrupt-cells =<0x3>;
    ti、max-IRQ =<0xa0>;
    TI、max-crossbar-sources =<0x190>;
    ti、reg-size =<0x2>;
    ti、IRQs-reserved =<0x0 0x1 0x2 0x3 0x5 0x6 0x83 0x84>;
    ti、IRQs-skip =<0xA 0x85 0x8b 0x8c>;
    ti、IRQs-safe-map =<0x48b>
    
    
    
    @
    
    
    
    
    ;"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";ctransc";"cts = 0x48b";"cts = 0x48b";"cts = 0x48ctransc";"cts = 0x48b";"cts = 0x48ctransc";ctransc";"
    ALE_ENINTERINS=<0x400>;
    bd_ram_size =<0x2000>;
    mac_control =<0x20>;
    从设备=<0x2>;
    ACTIVE_SLAVE =<0x0>;
    CPT_clock_mult =<0x784cfe14>;
    CPTs_clock_shift =<0x1d>;
    reg =<0x48484000 0x1000 0x48485200 0x2e00>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ti、no-idle;
    中断=<0x0 0x14e 0x4 0x0 0x14f 0x4 0x150 0x4 0x4 0x4 0x4 0x1 0x4 0x4 0x1
    = 0x4 0x1;
    SYSC1
    = 0x4 0x1 = 0x4 0x1 = 0x4 0x1;禁用范围;SYDRON = 0x1 = 0x1 = 0x1 = 0x4 0x4 0x4 0x1
    
    
    MDIO@48485000{
    兼容="ti、cpsw-mdio"、"ti、Davinci_mdio";
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="Davinci_mdio";
    bus_freq =<0xf4240>;
    reg =<0x48485000 0x100>;
    phandle =<0x1d5>;
    };
    
    从器件@48480200{
    mac-address =[00 00 00 00 00 00 00];
    phandle =<0x1d6>;
    };
    
    从器件@
    
    
    
    
    @48480300{mac-address =[00 00 00 00 00 00 00 00 00 00 00 00、sel
    = 0x4bPhy};<cps4}
    
    reg-names ="gmii-SEL";
    phandle =<0x1d8>;
    };
    };
    
    CAN@481cc000{
    compatible ="ti、dra7-d_CAN";
    ti、hwmods ="dcan1";
    reg =<0x4a3c000 0x2000>;
    SYSCON-raminit =<0x8 0x558 0x0>;
    中断=<0x0 0xDE 0x4>;
    时钟=<0xe2>;
    状态="禁用"0x9e";
    
    
    
    CAN@481d0000{
    compatible ="ti、dra7-d_CAN";
    ti、hwmods ="dcan2";
    reg =<0x480000 0x2000>;
    SYSCON-raminit =<0x8 0x558 0x1>;
    中断=<0x0 0x0x4>;
    时钟=<0x10>;
    状态="禁用";<0x1da1>
    ;
    
    
    DSS@58000000{
    compatible ="ti、dra7-dss";
    status ="disabled";
    ti、hwmonds ="dss_core";
    SYSCON-PLL-Ctrl =<0x8 0x538>;
    #address-cells =<0x1>;
    #size-cells =<0x001>;
    ranges=
    <0x5800800x584000004 0x584004 clktrl
    = 0x584004 0x0004、0x0004 clktrl、0x584004 0x0004 "pll2";
    时钟=<0xe3 0xe4 0xe5>;
    时钟名称="Fck)、"video_clk"、"video2_clk";
    phandle =<0x1db>;
    
    dispc@
    
    
    
    
    
    
    
    
    
    @58001000{compatible ="ti、dra7-dispc";reg =<0x58001000 0x1000>;interrupts =<0x0 0x14 0x4>;ti、hwmods ="dss_dispc";Clocks =<0x58001000 0x1000>;clock-names ="fck";SYSCON-ti =<0x8 0x5340x80000";
    
    "0x580"= 0x805600";"0x8000"= 0x805600";"0x8000"编码器0x804000"
    = 0x804000";0x805600"= 0x804000";0x804000"= 0x805600"= 0x8040200";0x8040200"
    中断=<0x0 0x60 0x4>;
    状态="禁用";
    ti、hwmods ="DSS_HDMI";
    时钟=<0xe6 0xe7>;
    时钟名称="Fck "、"sys_clk";
    phandle =<0x1dc>;
    };
    };
    
    epwmss@4843e000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x4843e000 0x30>;
    ti、hwmds ="epwms0";
    #address-cells =<0x1>;
    #size-cells =<0x1>
    ;status ="disabled";
    范围;
    phandle =<0x1dd>;
    
    PWM@4843e200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x4843e200 0x80>;
    Clocks =<0xe8 0xA>;
    clock-names ="0xtble"、"1tble"
    
    ;clk"
    };
    
    ECAP@4843e100{
    兼容="ti、dra746-ECAP"、"ti、am3352-ECAP";
    #PWM-cells =<0x3>;
    reg =<0x4843e100 0x80>;
    时钟=<0xA>;
    时钟名称="fck";
    状态="禁用";
    phandle =<0x1df>;
    };
    };
    
    epwmss@48440000{
    兼容="ti、dra746-pwms"、"ti、am33xx-pwms";
    reg =<0x48440000 0x30>;
    ti、hwmds ="epwms1";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    status =禁用;"状态="
    范围;
    phandle =<0x1e0>;
    
    PWM@48440200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x48440200 0x80>;
    Clocks =<0xe9 0xA>;
    clock-names ="0x1tble"、"clle1";
    
    
    };
    
    ECAP@48440100{
    兼容="ti、dra746-ECAP"、"ti、am3352-ECAP";
    #PWM-cells =<0x3>;
    reg =<0x48440100 0x80>;
    时钟=<0xA>;
    时钟名称="Fck";
    状态="禁用";
    phandle =<0x1e2>;
    };
    };
    
    epwmss@48442000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x48442000 0x30>;
    ti、hwmds ="epwms2";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    status = disabled;"
    范围;
    phandle =<0x1e3>;
    
    PWM@48442200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x48442200 0x80>;
    Clocks =<0xEA 0xA>;
    clock-names ="0x1tble";clk"
    
    
    };
    
    ECAP@48442100{
    兼容="ti、dra746-ECAP"、"ti、am3352-ECAP";
    #PWM-cells =<0x3>;
    reg =<0x48442100 0x80>;
    时钟=<0xA>;
    时钟名称="Fck";
    状态="禁用";
    phandle =<0x1e5>;
    };
    }
    
    ;AES@4b500000{
    兼容="ti、OMAP4-AES";
    ti、hwmods ="aes1";
    reg =<0x4b500000 0xa0>;
    中断=<0x0 0x50 0x4>;
    DMA =<0xcd 0x6f 0x0 0xcd 0x6e 0x0>;
    dma-names =
    "0xfclocks";"rx fclocks"="rx、"rx clocks"
    
    PHANDLE =<0x1e6>;
    }
    
    ;AES@4b700000{
    兼容="ti、OMAP4-AES";
    ti、hwmods ="aes2";
    reg =<0x4b700000 0xa0>;
    中断=<0x0 0x3b 0x4>;
    DMA =<0xcd 0x72 0x0 0x0x00 0x0x71 0xck
    ;"rk-names";"rx
    
    = 0x71";"rx clocks= 0xr";"fclocks= 0xr"
    phandle =<0x1e7>;
    };
    
    DES@480a5000{
    compatible ="ti、OMAP4-DES";
    ti、hwmonds ="DES";
    reg =<0x480a5000 0xa0>;
    interrupts =<0x0 0x4d 0x4>;
    DMA =<0xaf 0x75 0x74 >;
    dma-names =
    "0xfclocks";"tx-names"="rx clocks";"fclocks"
    
    phandle =<0x1e8>;
    };
    
    sham@53100000{
    compatible ="ti、omap5-sham";
    ti、hwmonds ="sham";
    reg =<0x4b101000 0x300>;
    interrupts =<0x0 0x2e 0x4>;
    DMA =<0xcd 0x77 0x0>;
    dma-clocks
    
    
    = 0x9;erock = 0xfrk = 0x9;erx
    };
    
    rng@48090000{
    compatible ="ti、omag4-rng";
    ti、hwmods ="rng";
    reg =<0x48090000 0x2000>;
    interrupts =<0x0 0x2F 0x4>;
    Clocks =<0x9>;
    clock-names ="fck";
    phandle =<0x1e>;
    };
    
    DSP_SYSTEM@41500000{
    compatible ="SYSCON";
    reg =<0x41500000 0x100>;
    phandle =<0xeb>;
    };
    
    OMAP-dwc3_4@48940000{
    compatible ="ti、dwc3";
    ti、hwmonds ="USB_OTG_ss4";
    reg =<0x48940000>
    
    ;<0x1000-1;<cells = 0x4mi-cells = 0x4mi-cells
    ;<0x4mi-cells = 0x0000>;<0x4mi-cells = 0x4m<0x4mi-cells = 0x4<0x4mi-cells;<0x
    
    
    状态="禁用";
    相位=<0x1eb>;
    
    USB@48950000{
    兼容="SNP、dwc3";
    reg =<0x48950000 0x17000>;
    中断=<0x0 0x159 0x4 0x159 0x4 0x0 0x15A 0x4>;
    中断名称="外设"、"主机"、"OTG"
    ;最大高速
    DR_MODE ="OTG";
    phandle =<0x1ec>;
    };
    
    
    MMU@
    
    
    
    
    
    
    
    
    
    
    @41501000{兼容="ti、dra7-DSP-iommu";reg =<0x41501000 0x100>;中断=<0x0 0x92 0x4>;ti、hwmods ="mu0_dsp2";reg = 0x4150mub = 0x2000>;iome<0x4mub = 0x150muF;<0x4muL = 0x150muF = 0x150muF;<0x4muL = 0x2000>
    
    
    中断=<0x0 0x93 0x4>;
    ti、hwmods ="mu1_dsp2";
    #iommu-cells =<0x0>;
    ti、SYSCON-mutconfig =<0xeb 0x1>;
    状态="禁用";
    phandle =<0x1e>;
    };
    };
    
    热区{
    phandle =<0x1ef>;
    
    cpu_thermal{
    polling-delay-passive =<0xfa>;
    polling-delay =<0x1F4>;
    热传感器=<0xec 0x0>;
    系数=<0x0 0x7d0>;
    phandle =<0x1f0>;
    
    trips{
    phandle =<0x1f1F1>
    
    
    ;therealert
    
    = 0x138>;<0xdle= 0xdle= 0x7880>;there= 0xd= 0xdle= 0xdle= 0xdle>;phandle = 0xdle= 0xdle= 0x
    
    
    
    cpu_crit{
    temperature =<0x15f90>;
    h滞=<0x7d0>;
    type ="critical";
    phandle =<0x1f2>;
    };
    
    cpu_alert1{
    温度=<0xc350>;
    迟滞=<0x7d0>;
    类型="有效";
    相位=<0x1f3>;
    };
    };
    
    冷却映射{
    phandle =<0x1F4>;
    
    map0{
    trip =<0xED>;
    冷却设备=<0xee 0xffffffff 0xFFFFFFF>;
    };
    
    };
    
    GPU_thermal{
    polling-delay-passive =<0xfa>;
    polling-delay =<0x1F4>;
    thermensors =<0xec 0x0x1crif0>
    
    
    
    ;<p2<0x7dcutes= 0xd0>;
    
    <p2dle= 0xd0xd0xd0>;<pudt<0xdle>
    
    
    type ="严重";
    phandle =<0x1f6>;
    };
    };
    };
    
    core_thermal{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xec 0x2>;
    系数=<0x0 0x7d0>;
    phandle =<0x1f7>;
    
    TRIPS{
    
    CORE_Crit{
    temperature =<0x15f90>;
    hysis =<0x7dle= 0x7d0>
    ;type
    
    = 0x7d0;}<0x7d1关键型;<0x8}
    };
    };
    
    dspive_thermal{
    polling-delay-passive =<0xfa>;
    polling-delay =<0x1F4>;
    热传感器=<0xec 0x3>;
    系数=<0x0 0x7d0>;
    phandle =<0x1f9>;
    
    trips{
    
    dspive_crit{
    temperature =<0x15f90>;}
    <0x7dle= 0x7dle=
    0x1dle= 0x1f9>;thrysical};迟滞类型= 0x7dle= 0x1fa = 0x1fa;
    
    
    };
    };
    
    IVA_热力{
    POLLINGT-DELAY_PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xec 0x4>;
    系数=<0x0 0x7d0>;
    相位=<0x1fb>;
    
    TRIPS{
    
    IVA_crit{
    temperature =<0x15f90>;
    hysis =<0x7dle= 0x7fC>
    ;type
    
    = 0x7fc};<0x7dON =<0x1fC>;type =<0x1fC;type = 0x1fC
    };
    };
    }
    
    ;PMU{
    Compatible ="arm、cortex-a15-PMU";
    interrupt-parent =<0x7>;
    interrupts =<0x0 0x83 0x4 0x84 0x4>;
    };
    
    memory@0{
    device_type ="memory";
    reg =<0x0 0x80000000 0x0 0x80000000>;
    r稳
    
    
    
    
    压器<V3v3-v3v3-r稳 压器= 0x325v3-v3-v3-v3-vin
    ;regulator = 0x325v3-v3-v3-v3-v3-vin = 0x3rulator;rulator = 0x3v3-rulator <v3-v3v3-v3-v3-rulator;<v3-rulator = 0x3v3-rulator <v
    
    phandle =<bbb3>;
    };
    
    fixedreguler-aic_DVDD{
    compatible ="reguler-fixed";
    reguler-name ="ACC_DVDD_fixed";
    VIN-supply =<bb3>;
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    phandle =<0x1fd>;
    };
    
    fixedreguler-VTT{
    compatible ="reguler-fixed";
    reguler-name ="VTT_fixed";
    VIN-supply =<0xf0>;
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    电脑控制器常开;
    电脑控制器启动;
    使能-高电平有效;
    相位=<0x1fE>;
    };
    
    _symbols__{
    GIC ="/interrupt-controller@48211000";
    wakeupgen ="/interrupt-controller@48281000";
    CPU0 ="/cpus/cpu@0";
    CPU0_opp_table ="/opp-table";
    L4_cfg ="/ocp/l4@4a000000";
    SCM ="/ocp/l4@4a000000/SCM@2000";
    SCM_conf ="/ocp/l4
    
    
    /ocp/l4@4a000000/SCM@2000/SCM_conf@0";pbias 稳压器="/ocp/l4@4a000000/SCM@2000/SCM_conf@0/pbias 稳压器@e00";pbias MMC_reg ="/ocp/l4@4a000000/scm_clocks;"pbias 0_clocksm/pest_0_scm_pbias@@@@@@0"
    dss_dscp_clk ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/SCM@2000/SCM_conf@0/clocks/dss_dss_dsc_clk@558";ehrpwm0_TBCLK ="/ocp/l4
    /ocp/l4@4a000000/SCM@2000/SCM_conf@0/ehrpwm0_TBCLK@558";"tbr_tbk_2000_tbk_tbrk_clk_clk_clk";"tbp_rk_brk_bk_brk_btbk_ems/tbr_btbk_ems"@@@@@@@@@@@2000_rk_rk_clk_btbk_clk_ems/tbtbrk_ems/tbtbtbk_ems/rk_ems/tbtbtbk_ems/rk_ems/rk_ems/rk_ems/rk_empbtbtbtb
    dra7_PMX_CORE ="/ocp/l4
    
    
    /ocp/l4@4a000000/SCM@2000/pinmux@1400";mmc1_pinmux ="/ocp/l4
    /ocp/l4@4a000000/SCM@2000/pinmux@140000/mmc1_pinmux_default";mmc1_pinmud12 ="/ocp/l4@4a000/scm@2000/pinmux ="mmc1400/pintrns/pintrintrns/mud1 μ s";"mmc1400/pintrns/mc12_pintrinmc1@1 μ muds/mc1@1 μ s";"mmc1400@mudr1 μ mux_pintrinmux_pintrintrins/muds/mux_pintrintrin1 μ mus/mux_pin1@@@@
    mmc1_PINs_sddr50 ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/SCM@2000/pinmux@1400/mmc1_PINs_sddr50";mmc1_PINs_ddr50 ="/ocp/l4
    /ocp/l4@4a000000/scm@2000/pinmux@1400/mmc1_pindr50";mmc1_pins_ddr50";"mmc1_pins/mudpin2@4000000@mux/pinmux_mux/gm Ω/mc100 mudpintrins/gm Ω/r2@"mmc1 mus/mc1 mc1 mus/mc1 mc1 mus/mc1 mc1 mus/mc1 pin2 pin2 pin/mc1 mc1 mc1 mc1 mus/mc1 mc1 pin2 pin2@@@@@@mus/mu
    mmc2_PINS_DDR_3_3V_rev11 ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/SCM@2000/pinmux@1400/mmc2_PIN_DDR_3_3V_rev11";mmc2_PINS_DDR_1_8v_1v_8v_SCM@1400/pinmux@/ocp/l4
    /ocp/l4@@@@@@@@@@/mmc20_mc20_mc20_pins/mc20_mc20pinx_mc20s/mc20_mc20pinx_mc20s/mc20_mc20pinx_mc20pins/mc20_mc20_mc20pinx_mv_mv_mv_mv_mv_mv_mv_mc2000_mv_pinx_pinx_mc2000_mv_pinx_mv_mv_pinx_mv_mv_mv_mv_mv_mv_mv_mv_mv_mv_mc
    MMC4_PINS_hs ="/ocp/l4
    
    
    /ocp/l4@4a000000/SCM@2000/pinmux@1400/MMC4_PINS_hs";mmc3_PINS_DEFAULT ="/ocp/l4
    /ocp/l4@4a000000/SCM@2000/pinmux@1400/mmc3_PINS_DEFAULT";mmc3_pinmu_hs ="/ocp/l4@4a000000/mc12_mctrins/mus/mc2000_pins/mc3x_pin3/pinmus/mux/mr3@12_mctrins/mus/mc2000_pins/mc3 pin3 pins/mr3 mus/mc2000@r3 pin3 pin3 pin3 mus/mrmc3 mrmc3 mrmc3 mc1@mrmc1@@@@@mus/mc3 pin3
    mmc3_PINs_sdr50 ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/SCM@2000/pinmux@1400/mmc3_PINs_sdr50";MMC4_PINS_sdr12 ="/ocp/l4@4a000000/SCM@2000/pinmux@1400/MMC4_PINS_scondr12";MMC4_PINS_SCM24_1000000 =
    /ocp/l4@2000_SCM24_SCM/CM@24_SCM24_1pintrab_mc2000@24_mc2@24_sc2@24_mc2@24_mc1 M pins/pin64_sc2@24_mc2@24_sc2@24_mc2
    sdma_Xbar ="/ocp/l4
    
    
    /ocp/l4@4a000000/sm@2000/dma-router@b78";EDMA_Xbar ="/ocp/l4
    /ocp/l4@4a000000/sm@2000/dma-router@C78";cm_core_aon ="/ocp/l4@4a000000/cm_core_aon@5000";cm_core_aon_clon_clocks ="cm_4a000000/link_locks ="cm_clk/atlink_000";"cm_claon_clk/link_clk/link_clk/locks ="000"@@@@4k_cla64k/atls";"cm_cl_000_cl_cl
    atl_clkin1_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/atl_clk1_ck";atl_clkin2_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clk_clk2_hdi";l5000_clk3_clkt ="/ocp/l4@@@@@@4a000000/cm_clkin_clkin/clkin/clk/clkin/clkin/clkin/clkin/clk/clkin/clkin/clkin/clk/clkin/clkin/clkin/clk/clk/clkin/clkin/clk/clkin/clkin/clkin/clkin/clkin/clk/clkin/clkin/clkin/clkin/
    mlbp_CLKIN_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/mlbp_CLKIN_CK";pciesref_acs_clk_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aclk@5000/clce_clkref";"cm_clk_clk_clk_clkref_clk/clkin/clkin/clkref"="/ocp/l4@@@@@@4k_clk_clk_clkin/clkin/clkin/clkin/clkin/clkin/clkin/clkref";"5000 μ s/clk_clk_clk_clk_clk_clk_clkref/clkin/clkref/clkref/clkin/clkin/clkin/clkin/clkin/clkin/cl
    Ref_clkin3_ck ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clks/ref_clk3_ck);RMII_clk_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@@@@@@@5000/cmi_clk_clk_sys";"venc_clkin_clkin_clk_clk_clk_clk_clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/rs/rs/rs/clts/rs/rs/rs/rs/rk/clt_clt_clk/clk/clts/
    sys_clk32_pseude_ck ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/sys_clk32_pseude_ck ";virt_12000000_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/800t_12000000";virt_13000000 ="virt_000_t_000_t_000_t_000";"virt_000_t_000_000_t_000_t_t_ab_000_t_6400ps";t_000_virt_000_000_000_t_000_virt_t_t_000_t_t_000000@@@@@@"virt_000_000_t_t_t_000_t_000_t_rk/virt_64k/vrk/vrk_000"
    virt_20000000_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/clocks/virt_20000000_clk";virt_26000000_sys ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clt_26000000;virt_27000000 ="/ocp/l4@@@@@@4a000/cm_ine_clocks/ins/t_400000_clt_cline_clocks";virt_400000_ine_clt_ins/ine_clins/ine_clks/400000_clins/ine_clks/ins/40000ns/vin_t_000000 ="in_ine_cl_40000ns/ine_clk_cl_clks/ins/ins/vin_t_400000_cl_clks/ins/ins/in_cl_clins/ins/
    USB_OTG_CLKIN_CK ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/USB_OTG_CLKIN_CK";video1_CLKIN_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/video1_clkIN_m2_clocks;video1_video_kIN_2cm_CLKIN_clocks ="video_5000@4 μ s =/ocp/l4@CLKIN_clk_clk_cm_clk_clk_clk_clk/cm2@@@@1 μ s
    DPLL_AEM_CK ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_AEM_ck@1e0";DPLL_AEM_x2_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clclls/DPLL_Abe_x2_5000 ";DPLL_am_1cm_1cm_ab_ems/f1 μ s ="1cm_1cm_emclk_ab_1cm_1cm_ab_ems";"1cm_ab_1cm_ab_ems"@1 μ s@1 μ s AbEM_1cm_1k/f1 μ s@1 μ s@1 μ s AbEM_ab_ab_emp_emp_ems";"1cm_ab_emp_emns/f1 μ s@1 μ s@1 μ s@@@1 μ s
    DPLL_ABI_m3x2_ck ="/ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_Abe_m3x2_ck@1f4";
    DPLL_CORE_BYP_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core_clocks@5000/DPLL_bcl_clocks ="/ocp/l4@4acl_core_clocks@"cm_cl_clocks/e/e"204cm_cl_cl_cl_cl_clocks ="204cm_cl_cl_cl_cl_cl_cl_clocks;"DPLL_cl_cl_cl_cl_cl_cl_clocks ="204cm_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_clocks@@@@@@@"204cm_cl_cl_cl_cl_cl_cl_cl_clocks ="204cm_cl_cl_cl_cl_cl_cl_
    MPU_DPLL_hs_clk_div ="/ocp/l4@4a000000/cm_core_aon@5000/时钟/MPU_DPLL_hs_clk_div";
    DPLL_MPU_hs ="/ocp/l4
    /ocp/l4
    
    /ocp/l4@4a000000/cm_core_aon@5000/clocks/DPLL_mck@160";"/ocp/l4@@@@@@@4aclk_ms/m64_ms/mc_clk_ms/dl_ms/dl_ms/ms/ms/mc_s_clk_dl_64k_ms/dl_ms/ms/dl_ms/dl_64_ms/dl_ms/ms/ms/ms/dl_64_cl_ms/ms/ms/dl_ms/dl_ms/dl_ms/dl_ms/dl_64_64_ms/ms/dl_ms/ms/ms/ms/ms/dl_dl_ms/dl_64_cl_ms/ms/ms/ms/dl_ms/dl_m
    DPLL_DSP_BYP_mux ="/ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_BYP_mux@240";
    DPLL_DSP_ck ="/ocp/l4
    
    
    /ocp/l4@4aclk/cm_core_aon@5000/clLL_mu_s@234";DPLL_64_mcl_000_mcl_mce_cl_cl_cl_clk/mcocks ="/ocp/l4@@@@@@@@4acl_64k_mce_64k_mu_mcys/ms/ms/mu_mu_mu_64_mu_mu_mu_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_clk/cm_64k/cm_64k_mcocks =/ocp/l4;"DPLL_mu_mu_64_mu_mu_64_ms/mu_mcus/
    DPLL_IVA_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_IVA_ck@1a0";DPLL_IVA_m2_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clclclls/mv4cm_cl_5000";"vp_mu_cl_cl_clk_clk/b64k_mcocks ="/ocp/l4@4k_mu_mu_mu_cl_cl_clk_clk/mcocks/e64k_mcycl_cl_cl_mcocks ="4 ps";"000_mu_mu_mu_mu_cl_cl_cl_cl_cl_mcycl_cl_mcycl_cl_cl_cl_cl_cl_cl_cl_cl_mcocks =@@@@@@@@4cm_mcock
    DPLL_GPU_m2_CK ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_GPU_m2_ck@2e8";DPLL_CORE_m2_CK ="/ocp/l4
    /ocp/l4@4a0000/cm_core_aclon@5000/clLL_mue_clk@130";core_dcll_mcr ="000_mce_mcr =/ocp/l4@4aclk_mce_mcr ="000_dlp_mu_mu_clk_clk_dlp_dlp_dlp_mck ="000_mcr ="000_mu_mu_mu_mu_mu_clk_clk/d64k_mck ="000_mu_mu_mu_mu_clk/d000";d000_mck =@@@@@@@4k_mu_mu_mu_mu_mu_d
    DPLL_DDR_m2_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_DDR_m2_ck@220";DPLL_GMAC_BYP_mux ="/ocp/l4
    /ocp/l4@4a0000/cm_core_aon@5000/clls/mcs/d4cm_mc_cl_cl_clk_64k_ms/b_mcs/b_mcs/e64_mcs/b_cl_mcs/b_cl_cl_cl4cm_mcus/video_64k_mcus/dlp_mcs/mcus/dlp_64_mcs/b_mcs/b_mcus/video_64_mcus/dlp_cl_cl_cl_cl_cl_mcs/mcus/video_64_cl_mcus/mcus/mcus/mcus/mcocks =/ocp/l4@@@@@@@@@4cm_64_mcus/video_64_cl_cl
    video_dclk_ddiv ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/video_1_dclk_ddiv ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clocks/hdmi _clk_div";per_dclk_hs ="cm_clk_clk_clk_clk_dive"="/ocp/l4@@@@@@64k_clk_clk_clk_clk_clk_clv_clk_clk_clk_clk_clv_clk_clk_clk_clk_clk_clk_clk_clk_clk_dls =;"64k_clk_clk_clk_clk_clk_clk_clk_clk_clv_clk_clk_clk_clk_clv_clk_clk_clk_clk_clk_clk_clk_cl
    DPLL_EV_BYP_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_EV_BYP_mux@290";DPLL_EV_CK ="/ocp/l4
    /ocp/l4@4aclk/cm_core_aon@5000/clLL_ev_ue_clocks@@@@@@@@@284";DPLL_e_l_e_l_un_clk_clk_64k/cm_un_clk_clk/dlpin_64k/dlpin_ls/e64k_un_un_64k/dlpin_64k/dlpin_64k_un_clk_64k/dlpin_64k/dlpin_64k/dlpin_64k/dlpin_64k_64k_64k_64k/in_64k/dlpin_64k_64k/in_un_clk_clk_64k/in_
    DPLL_CORE_h14x2_ck ="/ocp/l4@4a000000/cm_CORE_aon@5000/时钟/DPLL_CORE_h14x2_ck@144";
    DPLL_CORE_h22x2_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_CORE_24000s/DPLL_24x2_dcl_cl_clocks ="/ocp/l4@4acl_mce_ns/e64x2_dcl_cl_cl_cl_cl_cl_cl_clocks ="/ocp/l4@154k_ms/ms/mce_cl_cl_cl_cl_cl_cl_cl_cl_cl_clocks ="154cm_cl_cl_cl_cl_cl_cl_cl_clocks;"DPLL_40154cm_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_cl_clocks@@@@@@@@"DPLL_cl_cl_cl_cl_cl_clocks ="+"
    DPLL_DDR_h11x2_ck ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/DPLL_DDR_h11x2_ck@228";DPLL_DSP_x2_248 ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/cls/clocks/DPLL_x2_mclk@@@@@@@@4cm_mcl_000_mclk ="cm_mcl_000_mcl_mcl_000_mcl_mcl_mcus/mclk_mclk_4cm_mclk_000_mcl_mcl_mcus/mclk_mclk_mclk_mclk_0002 =/ocp/l4
    DPLL_GMAC_h12x2_ck ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000/cm_core_aon@5000/时钟/DPLL_GMAC_h12x2_ck@2c4";DPLL_GMAC_h13x2_ck ="/ocp/l4
    /ocp/l4@4a000/cm_core_clks/e64x2/mcclk_clk_clk_clk/cm_clk/clk_clk/cm2@4;"cm_clk_clk_clk_clk_clk/cm_clk_clk_clk_clk_clk_clk_clk/cm_clk/cm_clk/clk/clk/cm_clk/cm_clk/clk/clk/cm2@@@@@@@@
    HDMI_div_clk ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/clocks/HDMI_div_clk";L3_iclk_div ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clks/cll3_div@100";L3_root_clk_clk_div ="/ocp/l4@@@@@@4a000000/video_ue_clk/video_k/1cm_clk/video/clk/clk/clk/clk/clks/dlks/div ="64k/video_1 cm 1 video_clk/video_1 video_clk/clk/clk/clk/clk/clk/clk/video_clk/clk/clk/clk/clk/dlink_clk/dlink_clk/dlink_clk
    VIDEO2_clk2_div ="/ocp/l4@4a000000/cm_core_aon@5000/时钟/video/clk2_div
    ="/ocp/l4@4a000000/cm_core_aon@5000/clocks/video_2_div_clk";ipu1_gfk_clk =
    /ocp/l4
    
    "/ocp/l4@4a0000001/cm_core_mua5000/clk_clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clkp1@"http:///ocp/l4@@@@@@@500001cm_mu_mu_mu_clk/clk/cn_clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/
    
    
    
    
    /ocp/l4 sp1_aux_gfclk_mux ="/ocp/l4 /ocp/l4@4a000000/cm_core_aon@5000/时钟/McA1_aux_gfclk_mux@550";timer5_gfclk_mux ="/ocp/l4@4a000000/cm_core_muerk/timerk_mu4x"@5ns/timerk_mue_rk_muk_mu4x";"4k_mu_mu_rk_rk_mu_rk_mu_64k_mu_mu_mu_mu_mu_rk_rk_rk_muk_muk/tr =/ocp/l4@@@@@@@@@@64k_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_mu64k_muk_mu_
    uart6_gfclk_mux ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core_aon@5000/时钟/uart6_gfclk_mux@580";dummy_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core_aon@5000/clocks/dock_clock";cm_core_domains ="4a000000@4cm_000cm_clockns";"4cm_000cm_clockns"/ocp/l4@@@@@4cm_clockns"
    DPLL_PCIe_ref_ck ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/DPLL_PCIe_ref_ck@200";DPLL_PCIe_ref_m2ldo_ck ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/DPLL_ref_m2ldo_cl_cl1cm_cla1000@@@@@@@@@@0001cm_cla100p_cl_cl_0001cm_cl_cla100k/cm_cla64k_cl_cl_cla100ks/p_0001cm_cl_cl_cla100k_cl_cl_0001cm_0001cm_cl_cl_cl_cla100ks/p_cl_cl_cl_cla100ks/p_0001cm_cl_cl_cl_cla100ks/p_0001cm_cl_cl_cl_cl_cl_cl_cla100ks/p_0001cm_cl_cl_cl_cl_cl_cl_cla1cm_cla100p_cl_cl_cl
    optfclk_pciephy2_32kHz ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/optfclk_pciephy2_32kHz@4a0093b8";optfclk_pciepy_div ="/ocp/l4
    /ocp/l4@4aclk/pclepdk_cl10000_clk_clk/iptcycl1cm_cl000_clk_cle0001cm_cl_clb_cltclbclk/iptref8000@@@@@@@@@@pclk_clk_cle0001cm_clk_clipclbclbclk/iptclbclk_cle0001cm_clbclbclk_clk/iptclbclbclbclbclk_clbclbclbcl000s ="4pref_cltref_clk_clbclbclk_clbclbclk_clbclbclk_clbclbclocks ="="4pref_cl40000_clb_clk_clbclk_@
    optfclk_pciephy2_div_clk ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/optfclk_pciephy2_div_clk@4a0093b8";apll_pcie_clkvcold="/ocp/l4
    /ocp/l4@@@@@@@@@4aclkl_clbs/mu_cl_clk/clbclbclbs/clb40pci_clk/clbs/mcus/clbclbclbclbclbcl_clbs/mcus/clb40pci_cl_cl_clbs/mcus/cl_clbclbcl_clbs/mcus/cl_clbclbcl_clbclbclk/clbclbs/mcus/clbclbclbclbcl_clbclbs/mcs/mcus/cl_cl_clbclbcl_cl_clbclbclbs/mcs/mcus/cl_clbclbcl_cl_cl_clbclbclbclbclbcl
    DPLL_PER_CK ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_CORE@8000/时钟/DPLL_PER_CK@140";DPLL_PER_m2_CK ="/ocp/l4
    /ocp/l4@4a000000/cm_CORE@8000/时钟/DPLL_PER_MCMK@150";func_96m_ab_dclk_clk_8000 μ s ="USB_clk_8000 μ s =/ocp/l4@64k_ms/bn_cl_clk/DPLL_8000 μ s = USB_8000 μ s ="USB_mc_cl_cl_clk/d_clk_000";"USB_8000 μ s =@64k_mc_mc_mc_cl_cl_cl_cl_cl_cl_cl_clk/d_clk/d_clk_clk/d_clk_clk_8000 μ s ="8000 μ s@@@@@@64k_
    DPLL_USB_m2_ck ="/ocp/l4@4a000000/cm_core@8000/时钟/DPLL_USB_m2_ck@190";
    DPLL_PCIe_ref_m2_ck ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/DPLL_ref_m2_cm_clocks@210";DPLL_per_cm_cl_8000@4acl_cm_clocks ="/ocp/l4@@@@@@@4k_b_8000 μ s /dcl_cl_8000 μ s /dcl_cl_8000 μ s /dcl_cl_8000 μ s/b_cl_cl_8000 μ s =
    DPLL_PER_h13x2_CK ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000 / cm_core@8000/clocks/DPLL_per_h13x2_ck@160";DPLL_per_h14x2_ck ="/ocp/l4
    /ocp/l4@4a000000 / cm_core@8000/ clclclcll_per_h14x2_cm2@164";DPLL_cl_m_cl4cm_8000 ="cm_clk4cm/cm_clk4cm_clk4cm_clk4cm_clk4cm/cm_clk4cm_clk4cm_clls/dlps/dlps/dlps/dlp_clk_clk_clk_clk_clk_clk_clk_clk_8000@@@@@@@8000;"DPLL_clk_clk_clk_clk_clk_clk_clk_clk_clk_clk_8000
    func_12m_fclk ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core@8000/clocks/func_12m_fclk";func_24m_clk ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/func_24m_clk";fc_48m_clk="fclk/fclk/fclk_clk"="/ocp/l4@@@@@@@4a000000_clk/fclk/fclk/fclk/fclk/func/clk/clk/clk/fclk/fclk/fclk/clk/fclk/func/clk/clk/clk/clk/fclk/fclk/fclk/fclk/l60000ps/func/clk/f40k/func/clk/fclk/fclk/f40k/fcl
    clkout2_clk ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/clkout2_clk@6b0";l3init_960m_gfclk ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/l3init_960m_gfclk@@@@@@@@@@6b0";dss_960m_clk/clk/clk/clk/clk/clk/clk/dss_clk/cldss_clk/clk/clk/clk/clk/clk/clk/clk/cldss_clk/clk/cldss_clk/clk/cldss_clk/clk/clk/clk/cldss_clk/clk/cldss_cldss_clk/cldss_clk/clk/clk/clk/cl
    dss_HDMI_clk ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core@8000/时钟/dss_HDMI_clk@1120";dss_video_1_clk ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/dss_video_1_clk@1120";dss_video_2_clk ="/ocp/l4@4a000000/cm_clbclk/clk";"gpvideo/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk"@@@@@@@@4bdss_cldss_cldss_cldss_cldss_clds/clb_clbs/clbs/cldss_clbs/clds/
    GPIO4_dbclk ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core@8000/clocks/GPIO4_dbclk@1770";GPIO5_dbclk ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clks/GPIO5_dbclk@1778";GPIO6_dbclk ="/ocp/l4@4a000000/cm_core/db80000s/gps/gps/dbi2000s/gps/b_clks/gps/8000 b_8000 b_clks/gpv_8000 b_8000 b_8000 b_8000 b_8000 b_clk/gpclks/gpv_8000 b_8000 b_8000 b_8000@8@@@@@@@8 cm/gpv_8000 b_8000 b_clks/gpv_8000 b_8000 b_8000 b_8000 b_8000 b_8000 b_8000
    mmc1_clk32k ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/mmc1_clk32k@1328";mmc2_clk32k ="/ocp/l4@4a000000/cm_core@8000/时钟/mmc2_clk32k@1330";mmc3_clk32k =
    "/ocp/l4@4a000000/cm_clk/cla28";"mmc204cm_clk/cl4cm_clk/clk/cl4cm_clk/cl4cms/cl4cm_cl4cms/cl000";"8000@@@@@@@@40cm_clk/clk/clk/cl4cm_clk/cl4cm_clk/clk/clk/cl4cms/cl4cms/cl4cm_cl4cm_cl4cm_cl4cms/clk/cl4cms/clk/
    USB_OTG_SS1_refclk960m ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/USB_OTG_SS1_refclk960m@13f0";USB_OTG_SS2_refclk960m ="/ocp/l4
    /ocp/l4@4a000000/cm_core@@@@@@@@@@@8000/USB_OTG_SS2_phyclk_clk/clk/clink_clk/clink_clk/clk/clk/clk/clk/clk/clk/clk/clkps/ms/ms/ms/pref_cl400009_cl_40p_cl_cl_cl_cl_cl_clk/cm_clk/cm_clk/cm_clk_clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk_clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clk/clps/ps/ms/
    atl_DPLL_clk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/atl_DPLL_clk_mux@c00";atl_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clk_clk_mux@@@@@@@@@@c00";atl_gf_mu_mu_cl0_mu_mu_clk_mu_clk_mux_mu_mu_clk_clk_clk_mux_mu20k_mu_mu_mu20k_mu_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_muk_cl
    cpu_hyd_gclk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/cpu_hyd_gclk_mux@1220";l3instr_ts_gclk_div ="/ocp/l4
    /ocp/l4@4a000000 /cm_core@@@@@@@@@@@8000s/cl3instr_ts_gaspk_mux_mux_mux_clk_cla6400s/mu2060 ="cm_mu_mcyclk_mu_clk_clk_cla6400s/mu_mcyclk_clk_clk_clk_clk_cla6400s/mu_mu_clk_clk_clk_clk_cla64k_mu_clk_mu_clk/cm_cla1860 μ s ="cm_mcyclk/cm_cla64k_mu_mu_clk/cm_cla64k/cm_clk/cm_cla64k_mcyclk_
    mcasp3_ahclkx_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/mcasp3_ahclkx_mux@1868";mcasp3_aux_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@@@@@@@@@@@8000/mcasp3_aux_zh_clk4 mcclk/mcclk4 mcclk/clk4 mcins/mcclk4 mc000_clk/mcclk4 mcclk/mcclk4 mcins/mc000_clk4 cm_clk/mcclk4 mu_clk/mcclk4 mu_clk/mcclk4 mcins/mcclk4 mu_clk4 mcin4 mc000_clk/mu_clk4 mc0004 mcclk/mu_clk/mcins/mcins/mcclk4 mu_clk4 mu_clk4 mu_clk4 mc
    mcasp5_aux_gfclk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000 /cm_core@8000/clocks/mcasp5_aux_gfclk_mux@1878";mcasp6_ahclkx_mux ="/ocp/l4
    /ocp/l4@4a000000 /cm_mcyclx_mu0008;"mcclx_mcycl_zh_cl7 mcycl_mux_mu0004 μ s ="_mcycl_zh_mcycl_000_mc000_zh_zh_mu_mcr 4 0004 μ s ="000_zh_mcclk_mcclk_mu_mc0004 0004 000_mu_zh_mu_mc0004 μ s@4 0004 μ s@0004 μ s@000_zh_mu_zh_mu_zh_mu_mc0004 μ s;mc0004 μ s@@@@@@@@000_mc0004 0004 μ s _mu_mu_mu_
    mcasp8_ahclkx_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/mcasp8_ahclkx_mux@1890";mcasp8_aux_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000cm/mcasp8_aux_aux_clk/mcclks/mcclk/clks/mcclk/clk/cl1@@@@@@@@@@"1 mcclk_clk/mcclk/clk/clks/mcclk/clks/mcclk/clks/mcclk/clk/clk/clks/mcclk/clk/clk/clks/mcclks/mccl1 mccl1 mccl1 mcclk/clk/clk/clk/clk/clk/clk/clks/mcclk/clk/clks/mcclk/clk/clk/cl
    mmc2_fclk_div ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/mmc2_fclk_div@1330";mmc3_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/时钟/mmc3_gfclk_mux@@@@@@@@@@182020";mmc3_gfclk_mc4cm_mc64k/mcs/mc64k_mclk_mcs/mc64k_mcs/mc64k_mcs/mc64k_mclk_mcs/mc64k_mcs/mcs/mc64k_mclk_mcs/mck_mcs/mcs/mc64k_mcs/mcs/mc64k_mcs/mcs/mcs/mck_mcs/mck_mc64k_mcs/mcs/mcs/mcs/mc64k_mc
    QSPI_gfclk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/QSPI_gfclk_mux@1838";QSPI_gfclk_div ="/ocp/l4@4a000000/cm_core@8000/clocks/QSPI_gfclk_div@1838";
    /ocp/l4@@@@@@@@@4aclk_mux_mux_mux/gtimclk/rk_mux/rk/gtimrk/rk_rk/rks/rk_mux_rs/rk_mux/rs/rk_mux/rk/rk/rs/rk/rk_mux/rk_rs/rs/rk/rk_mux/rs/rk/rk/rs/rk/rk_mux/rs/rk/rk_mux/rs/rk/rk_mux/rs/rk/rs/rk/rs/rk_
    timer14_gfclk_mux ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core@8000/clocks/timer14_gfclk_mux@17d0";timer15_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/ clocks/timer15_gfclk_mux_mux ="/ocp/l4@@@@@@@@@@4k_mux_mux_mu_mu20k_mu_mu_mu_muk_muk_muk/tid_40cm/timerk_40cm_40cm_muerk_mu4x";"tid_40cm_40cm_40cm_muerk_muerk/tid_40cm_muerk_40cm_muerk_mu4x_mu4x_mu_muerk_40cm/tid_40k/tid_40k_muerk_muerk/tid_40k_40k_
    timer4_gfclk_mux ="/ocp/l4
    
    
    /ocp/l4@4a000000/cm_core@8000/clocks/timer4_gfclk_mux@1748";timer9_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/ clocks/timer9_gfclk_mux@18504cm_muartk_mux/gartk_mux ="4k_mu/gartns/rk_8000 μ k_mu/gfclk_mux =/ocp/l4@@@@@@@@@4 μ k/uatns/rk_muatns/rk_400018504k_mu_mu_mu_mu_mu_mu_mu_mu_mu40k/gf_mu_muk/u_muk/u_40k/u_mu_muk/u40k/uk/u_muk/gu_mu40k/g
    uart4_gfclk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/uart4_gfclk_mux@1858";uart5_gfclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000/uartns/cl5_gfclk_mux ="uartn_80000s/uf_muartns/uartns/uartns/uartn_8000 μ k_8@@@@@@@@@@"uartns/uf_muartns/uartn_8000 μ k_8 μ k_muartns/uartns/uartn_8000 μ k_8 μ k_8 μ k_muartns/uartns/uartns/uartns/uartn_8000 μ k_8 μ s ="4 μ k_8 μ k_8 μ k_8 μ k_muartns/uartns/uartns/uartns/uartns/uartn_8 μ k_8000 μ k_8 μ k_
    vip1_gclk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4a000000/cm_core@8000/clocks/vip1_gclk_mux@1020";vip2_gclk_mux ="/ocp/l4
    /ocp/l4@4a000000/cm_core@8000cm/vip2_gclkclk_mux@@@@@@@@1028";vip2_gclkclk00m_clmue/clocknum ="4cm_cl10000s/corns/clk_clockns/clk_clocknes_clockns/cl10000pns/via_clmues/vics/clockns/cl3 cm_clockns/cornes_clockns/clockns/cl10000pns/clk_cl3 cm/clk_clocknes_clocknes_clocknes_clockns/via_clock
    L4_wkup ="/ocp/l4@4ae00000";
    counter32k ="/ocp/l4@4ae00000/ counter@4000";
    PRM ="/ocp/l4@4ae00000/PRM@6000";
    PRM _时钟="/ocp/l4@4ae00000/PRM@6000/时钟";
    sys_clkin1 ="/ocp/l4@4cl00000/110@@6000/时钟";prm Ω
    Abe_DPLL_sys_clk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4ae00000/PRM@6000/时钟/Abe_DPLL_clk_mux@118";Abe_DPLL_BYPASS_clk_mux ="/ocp/l4
    /ocp/l4@4ae00000/PRM@6000/cl000_clk_mux ="abe_clk_clk_mux";"Abe_clk_clk_cl000_clk_clk_clk_mux_prk/prmux"@@@@@@@@@@"ab_clk_clk_prk_prk_prk_prk/prmux";"ab_prk_prmu000_prmu000_ab_prk_ab_clk_clk_clk_clk_prk_ab_prk_prk_prk_prk_prmuk_prk/prmuk_prmuk/prmu000"
    Abe_giclk_div ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4ae00000/PRM@6000/时钟/Abe_giclk_div@174";PRM_LP_clk_div ="/ocp/l4
    /ocp/l4@4ae00000/PRM@6000/时钟/Abe_LP_clk_div@1d000/ cl000_clk_de000";ABE_CL000_clk_clk_de000/Δ t ="1k_cl000_clk/cl000_clk/clk/clk_degk/cl000";pru000_clk_de000_clk_de000_clk_de000_clk_degk_de000/Δ t@@@@@@@@@
    sys_clk2_dclk_ddiv ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4ae00000/PRM@6000/时钟/sys_clk2_dclk_ddiv@1cc";per_abe_x1_dclk_ddiv ="/ocp/l4
    /ocp/l4@4ae00000/prm@6000/clk_clk_prm@1bc ="e300k/degk/e000_degk/prm = e000_clk/e64k/e64k_de000_degk/prm@e64k/e64k/e64k/e64k_clk_de000_de64k/prm ="e64k_clk_clk/e64k_clk_clk/e64k_clk/e64k_de000_de000";"e64k_clk_clk_clk_clk_mspm@@@@@@@@e64k/e64k_de000
    gmac_250m_dlclk_ddiv ="/ocp/l4
    
    
    /ocp/l4@4ae00000/prm@6000/clocks/gmac_250m_dlk_dclk_dk ="/ocp/l4
    /ocp/l4@4init 00000/prm@6000/clocks/gaeMAC_main_clk";l3init_480m_dlk_dclk ="/ocp/l4@@@@@@@@@@4clk/prm_d000_dprk_dprocks/e000_de000_dprms/dprm_de000_de000_dprm_dprms/dprm_de000_debk_dprm_debk_de000_debk_dr =
    PCIe2_dclk_ddiv ="/ocp/l4
    
    
    /ocp/l4@4ae00000/PRM@6000/时钟/PCIe2_dclk_ddiv@1b8";PCIe_dclk_ddiv ="/ocp/l4
    /ocp/l4@4ae00000/PRM@6000/时钟/pce_dclk_dclk_ddiv@1b4";emu_dclk_dclk_de000_drk_drk_drk_drk_drk/div ="/ocp/l4@@@@@@@@@4000_delk/prk/d000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de000_de64_de64_de64_de/smu_de64_d
    clkoutmux1_clk_mux ="/ocp/l4
    
    /ocp/l4
    /ocp/l4@4ae00000/prm@6000/时钟/clkoutmux_clk_mux@15c";clkoutmux2_clk_mux ="/ocp/l4
    /ocp/l4@4ae00000/prm@6000/ clk_prm@clk_mux@@@@@@@@160";"clk_clk_clk_clk_clk_clk_mux_clk_clk_clk_clk/prelfuse ="64x_clk_clk_clk_clk_clk_clk_clk_clk_pru/pru000_pru/pru_clk_clk_clk_clk_clk_clk_prue_clk/pru000/ clk_prue_clk_clk_pru000/ clk_prue_clk_pru000/
    MLB_clk ="/ocp/l4@4ae00000/PRM@6000/时钟/MLB_clk@134";
    mlbp_clk ="/ocp/l4
    
    
    /ocp/l4@4ae00000/PRM@6000/时钟/mlbp_clk@130";per_aege_x1_gfclk2_div ="/ocp/l4@4ae00000/prm@64x_clk_clk/clk/clk/unchr =/ocp/l4 video_000_clk_clk_clk/clk/clk/clk/chr ="64x_clk_clk_clk_clk_clk_clk_clk_clk_clk_clk/r =@@@@@@@64x_clk_clk_clk_clk_clk_clk_clk/prm64x_clk_clk_clk_clk
    VIDEO2_DPLL_clk_mux ="/ocp/l4
    
    
    /ocp/l4@4ae00000/PRM@6000/时钟/video2_DPLL_clk_mux@16c";wkupaon_iclk_mux ="/ocp/l4
    /ocp/l4@4ae00000/prm@6000/clk/clk/mux ="/ocp/l4@64k_mu000_clk_mu000_prk_pru000_pru000_pru000_pru000_pru000_pru000_pru000_clk_clk_pru000_pru000_pru000_clk_clk_clk_cl1k@@@@@@@@@1 μ s;"64k_cl000_cl000_clk_cl000_clk_pru000_clk_pru000_pru000_pru000_pru000_pru000_pru000_pru000_pru000_pru000_pru000_pru000_
    uart10_gfclk_mux ="/ocp/l4
    
    
    /ocp/axi@4ae00000/PRM@6000/Clocks/uart10_gfclk_mux@1880";prm_clockdomains="/ocp/l4
    /ocp/axi@4ae00000/prm@6000/clockdomains";SCM_wkup ="/ocp/l4@4ae00000/CSC_cc000";"PCIe"= 100t1@100t1@100t1@100cci000";"PCIe";"PCIe_tran100t1 t1@100t1 t1@100cci000"
    pcie1_EP ="/ocp/axi@0/PCIe_EP@51000000";
    PCIe2_INTC ="/ocp/axi@1/PCIe@51800000/中断控制器";
    ocmcram1 ="/ocp/ocmcram@40300000";
    ocmcram2 ="/ocp/ocmcram@40400000";
    ocmcram3 ="/ocp/ocmcram@40500000";
    bandgap ="/ocp/bandgap@4a0021e0";
    dsp1_system ="/ocp/dsp_system
    
    
    /ocp/padconf@40d00000";dra7_iodelay_core ="/ocp/padconf@4844a000";mmc1_iodelay_DDR_rev11_DDR ="/ocp/padconf@@4844a000/mmc1_iodelay_DDR_rev11_repru000";"mmc20_re_div_d_d_dram_d44000";"mmocon_re延 时="mmc20_re_re_dr_re_ree_d_d_deginu000"
    mmc1_iodelay_sdr104_rev11_conf ="/ocp/padconf
    
    
    /ocp/padconf@4844a000/mmc1_iodelay_sdr104_rev11_conf";mmc1_iodelay_sdr104_rev20_conf ="/ocp/padconf
    /ocp/padconf@@@@4844a000/mmc1_iodelay_sdr104_rev20_conf";"mmc20_rev20_ram_red_del_ram_200_rev20_ram_ram_rev20_ram_ram_rev200_ram_rev20_rev200_ram_rev20_rev200_ram_ram_rev20_ram_rev20_cl";"/ocp/padconf =
    mmc2_iodelay_DDR_1_8v_rev11_conf ="/ocp/padconf
    
    
    /ocp/padconf@4844a000/mmc2_iodelay_DDR_1_8v_rev11_conf";mmc3_iodelay_manual1_manual1_rev11_ds ="/ocp/padconf
    /ocp/padconf@4844a000/mmc3_redelay_manual1_mc44000_redelay ="/ocp/padconf@@@mc4_re延 时_mc20_mc4_re延 时;"MMc4_re延 时_mc20_mc20_re延 时_mc20_mc4_mc_di_re000_rev_mc4_re延 时="_re000_mc4_manual_mc_ds =
    mc4_iodelay_sdr12_hs_sdr25_rev11_conf ="/ocp/padconf
    
    
    /ocp/edma@4844a000/mc4_iodelay_sdr12_hs_sdr25_rev11_conf";mc4_iodelay_sdr12_hs_sdr25_rev20_conf ="/ocp/padconf
    /ocp/tptc@4844ama_rev11_conf";"mc_dr4_dr000"=/ocp/dma-controller@@@e4_dr000_sdt430_r000";"e4_dr4_dr000_sdtdr000";"e4_dr4_dr000_es_dr000_es_dr000_es_dr000"
    EDMA_tptc1 ="/ocp/tptc@43500000";
    GPIO1 ="/ocp/gpio@4ae10000";
    GPIO2 ="/ocp/gpio@48055000";
    GPIO3 ="/ocp/gpio@48057000";
    GPIO4 ="/ocp/gpio@48059000";
    GPIO5 ="/ocp/gpio@4805b000";
    GPIO6 ="/ocp/gpio@4805d000";
    GPIO7 ="/ocp/gpio@48051000";
    GPIO8 ="/ocp/gpio@48053000";
    uart1 ="/ocp/serial@4806a000";
    uart2 ="/ocp/serial@4806c000";
    uart3 ="/ocp/serial@48020000";
    uart4 ="/ocp/serial@4806e000";
    uart5 ="/ocp/serial@48066000";
    uart6 ="/ocp/serial@48068000";
    uart7 ="/ocp/serial@4842000";
    uart8 ="/ocp/serial@48422000";
    uart9 ="/ocp/serial@48424000";
    uart10 ="/ocp/serial@4ae2b000";
    mailbox1 ="/ocp/mailbox@4a0f4000";
    mailbox2 ="/ocp/mailbox@4883a000";
    mailbox3 ="/ocp/mailbox@4883c000";
    mailbox4 ="/ocp/mailbox@4883e000";
    mailbox5 ="/ocp/mailbox@48840000";
    mbox_ipc3x ="/ocp/mailbox@48840000/mbox_ipc3x";
    mbox_dsp1_ipc3x ="/ocp/mailbox@48840000/mbox_dsp1_ipc3x";
    mailbox6 ="/ocp/mailbox
    
    
    /ocp/mailbox@48842000";mbox_ippu2_ipc3x ="/ocp/mailbox@48842000/mbox_ipc3x";mbox_dsp2_ipc3x";mbox_48432_ipc3x ="/ocp/mailbox@@4842000";mbox_ipc042_ipc"
    mailbox8 ="/ocp/mailbox@48846000";
    mailbox9 ="/ocp/mailbox@4885e000";
    mailbox10 ="/ocp/mailbox@48860000";
    mailbox11 ="/ocp/mailbox@48862000";
    mailbox12 ="/ocp/mailbox@4886000";
    mailbox13 ="/ocp/mailbox@48802000";
    Timer1 ="/ocp/timer@4ae18000";
    timer2 ="/ocp/timer@48032000";
    timer3 ="/ocp/timer@48034000";
    timer4 ="/ocp/timer@48036000";
    timer5 ="/ocp/timer@4882000";
    timer6 ="/ocp/timer@48822000";
    timer7 ="/ocp/timer@48824000";
    timer8 ="/ocp/timer@48826000";
    timer9 ="/ocp/timer@4803e000";
    timer10 ="/ocp/timer@48086000";
    timer11 ="/ocp/timer@48088000";
    timer12 ="/ocp/timer@4ae20000";
    timer13 ="/ocp/timer@48828000";
    timer14 ="/ocp/timer@4882a000";
    timer15 ="/ocp/timer@4882c000";
    timer16 ="/ocp/timer@4882e000";
    WDT2 ="/ocp/wdt@4ae14000";
    hwspinlock ="/ocp/spinlock@4a0f6000";
    i2c1 ="/ocp/i2c@48070000";
    tps659038 ="/ocp/i2c
    
    
    /ocp/i2c@48070000/tps659038@58";smps12_reg ="/ocp/i2c
    /ocp/i2c@48070000/tps659038@58/tps659038_PMIC/regulators/480ps12";smps3_reg ="/ocp/i2c@48070000/tps659038@tpsmic/tps6538";tpsmcps6538_mcs/tps38_mctr8038"tps/tpsm/ps659038";tpsmcs/tps38"tps806_tpsmcs/tps3@@@@tpsm/tps806_tps806_mctr_tps806_mcs/tpsm/tps38"tps806_tps806_tps806_tps45"
    smps8_reg ="/ocp/i2c
    
    /ocp/i2c
    /ocp/i2c@48070000/tps659038@58/tps659038_PMIC/regulators/smps8";ldo1_reg ="/ocp/i2c
    /ocp/i2c@48070000/tps659038@58/tps659038_PMIC/regulators/ldo1;ldo38"tps7004/tdo38"tps65008/tdo38";tps480p7004/tps8038"tps6500_tps4@tps809m/rtmcs/tps4@tps804k Ω 稳压器= tps8059038";tmcs/tdoSM/tps4@tdoSM/tdoSM/tdoSM/tdo38"tps4@@@tdoSM/tdoSM/tdoSM/tdoSM/tdoSM/tdoSM/tdoSM/tdo38"tdo804k
    ldo9_reg ="/ocp/i2c
    
    /ocp/i2c
    /ocp/i2c@48070000/tps659038@58/tps659038_PMIC/regulators/ldo9";ldoldoln_reg ="/ocp/i2c@48070000/tps659038@58/tps659038_PMIC/regulators/ldo38"tps659038 =
    /ocp/i2c@@@@@@tps659038/ tps480p8038"tps/ tps659038"tps/ tps/ tps809_rtmc";tps/ tps806038"tps/ tps/ tps/ tps806038"tps/ tps/ tps/ tps/ tps/ tps806038" tps/ tps/ tps/ tps/ tps/ tps/ tps/ tps659038" tps/ tps/ tps/ tps/ tps/ tps/ tps/ tps/ tps806038"
    tps659038_pwer_button ="/ocp/i2c
    
    
    /ocp/i2c@48070000/tps659038@58/tps659038_pw_button";tps659038_gpio ="/ocp/i2c
    /ocp/i2c@48070000/tps659038@58/tps659038_gpio";i2c2 ="4806003@/ocp/i2c;"4806000_rtc";"4806F@@@4807600"
    i2c4 ="/ocp/i2c@4807a000";
    i2c5 ="/ocp/i2c@4807c000";
    mmc1 ="/ocp/mmc@4809c000";
    mmc2 ="/ocp/mmc@480b4000";
    mmc3 ="/ocp/mmc@480ad000";
    MMC4 ="/ocp/mmc@480d1000";
    mu0_dsp1 ="/ocp/mmu@40d01000";
    mu1_dsp1 ="/ocp/mmu@40d02000";
    MMU_ipu1 ="/ocp/mmu@58882000";
    MMU_ipu2 ="/ocp/mmu@55082000";
    ABB_MPU ="/ocp/regulator-abb-mpu ";
    ABB_ivahd ="/ocp/regulator-abb-ivahd ";
    ABB_dspeve ="/ocp/regulator-abb-dspeve ";
    ABB_GPU ="/ocp/regulator-abb-gpu ";
    mcspi1 ="/ocp/spi@48098000";
    mcspi2 ="/ocp/spi@4809a000";
    mcspi3 ="/ocp/spi@480b8000";
    mcspi4 ="/ocp/spi@480ba000";
    QSPI ="/ocp/qspi@4b300000";
    SATA_phy ="/ocp/ocp2scp@4a090000/phy@4A096000";
    pcie1_phy ="/ocp/ocp2scp@4a090000/pciephy@4a094000";
    PCIe2_phy ="/ocp/ocp2scp@4a090000/pciephy@4a095000";
    SATA ="/ocp/sata@4a141100";
    RTC ="/ocp/rtc@48838000";
    USB2_phy1 ="/ocp/ocp2scp@4a08000";phy/phy@4a084000";
    USB2_phy2 ="/ocp/ocp2scp@4a080000/phy@4a085000";
    USB3_phy1 ="/ocp/ocp2scp@4a080000/phy@4a084400";
    OMAP-dwc3_1 ="/ocp/omap_dwc3_1@48880000";
    USB1 ="/ocp/omap_dwc3_1@48880000/USB@48890000";
    OMAP-dwc3_2 ="8480000";"/ocp/omap_dwc3_2@80000"
    USB2 ="/ocp/omap_dwc3_2@488c0000/USB@488d0000";
    OMAP-dwc3_3 ="/ocp/omap_dwc3_3@48900000";
    USB3 ="/ocp/omap_dwc3_3@48900000/USB@48910000";
    elm ="/ocp/elm@48078000";
    GPMC ="/ocp/gpmc@50000000";
    ATL ="/ocp/atl@4843c000";
    McASP1 ="/ocp/mcasp@48460000";
    mcasp2 ="/ocp/mcasp@48464000";
    mcasp3 ="/ocp/mcasp@48468000";
    mcasp4 ="/ocp/mcasp@4846c000";
    mcasp5 ="/ocp/mcasp@48470000";
    mcasp6 ="/ocp/mcasp@48474000";
    mcasp7 ="/ocp/mcasp@48478000";
    mcasp8 ="/ocp/mcasp@4847c000";
    crossbar_MPU ="/ocp/crossbar@4a002a48";
    MAC ="/ocp/ethernet@48484000";
    DaVinci_MDIO ="/ocp/ethernet@48484000/MDIO@48485000";
    cpsw_emac0 ="/ocp/ethernet@48484000/从器件@48480200";
    cpsw_emac1 ="/ocp/ethernet@48484000/从器件@48480300";
    phy_SEL ="/ocp/ethernet@@48484000/by-2504by";cphy-2504by-by-by-by-by-by-by-b994sel
    Dcan1 ="/ocp/can@481cc000";
    Dcan2 ="/ocp/can@481d0000";
    DSS ="/ocp/dss@58000000";
    HDMI ="/ocp/dss@58000000 /编码器@58060000";
    epwms0 ="/ocp/epwmss@4843e000";
    ehrpwm0 ="/ocp/epwmss@4843e000/PWM@4843e200";
    ecap0 ="/ocp/epwmss@4843e000/ECAP@4843e100";
    epwms1 ="/ocp/epwmss@48440000";
    ehrpwm1 ="/ocp/epwmss@48440000/PWM@48440200";
    eCAP1 ="/ocp/epwmss@48440000";eCAP1 ="EC440100"@4844100";ehrpwm1 ="
    epwmss2 ="/ocp/epwmss@48442000";
    ehrpwm2 ="/ocp/epwmss@48442000/PWM@48442200";
    ecap2 ="/ocp/epwmss@48442000/ECAP@48442100";
    aes1 ="/ocp/aes@4b500000";
    aes2 ="/ocp/aes@4b700000";
    DES ="/ocp/des@480a5000";
    sham ="/ocp/sham@53100000";
    rng ="/ocp/rng@48090000";
    dsp2_system ="/ocp/dsp_system@41500000";
    OMAP-dwc3_4 ="/ocp/omap_dwc3_4@48940000";
    USB4 ="/ocp/omap_dwc3_4@48940000/USB@48950000";
    mu0_dsp2 ="/ocp/mmu@41501000";
    mu1_dsp2 ="/ocp/mmu@41502000";
    thermic_zones ="/thermic-zones";
    CPU_thermal ="/thermal-zones/cpu_thermal;
    CPU_TRIPS ="/thermal-zones/cpu_thermal/trips;
    CPU_ALERT0 ="/thermal-zones/cpu_thermal/trips/cpu_alert;
    CPU_Crit ="/thermal-zones/cpu_thermal/trips/cpu_crit;
    CPU_ALERT1 ="/thermal-zones/cpu_thermal/trips/cpu_alert1;
    CPU_Cooling_MAP ="/thermal-zones/cpu_thermal/cooling-maps;
    GPU 热性能="/thermal-zones/gpu_thermal;
    GPU_crit ="/thermal-zones/gpu_thermal/trips/gpu_crit;
    CORE_热力="/thermal-zones/core_thermal;
    CORE_Crit ="/thermal-zones/core_thermal/trips/core_crit;
    dspeve_thermal ="/thermal-zones/dspeve_thermal;
    dspeve_crit ="/thermal-zones/dspeve_thermal/trips/dspeve_crit;
    IVA_thermal ="/thermal-zones/iva_thermal;
    IVA_crit ="/thermal-zones/iva_thermal/trips/iva_crit;
    VDD_3V3 ="/fixedreguler-VDD_3V3";
    AIC_DVDD ="/fixedreguler-AIC_DVDD";
    VTT_FIXED ="/fixedreguler-VTT";
    };
    }; 

    这是修改后的 mux_data.h

    /* SPDX-License-Identifier:GPL-2.0+*//
    *
    版权所有(C) 2014 Texas Instruments Incorporated - http://www.ti.com
    *
    作者:Felipe Balbi 
    *
    *基于 board/ti/dra7xx/evm.c
    */
    #ifndef _MUX_DATA_Beagle X15_H_
    #define _MUX_DATA_Beagle X15_H_
    
    #include 
    
    const
    
    
    
    
    
    (struct pad_conf_entry core_padconf_array_ess_sec4[]={GPMC_AD0、(M0 | PIN_input)}、// GPMC_ad0.gpMC_AD0 */{GPMC_AD1、(M0 | PIN_input)}、// GPMC_AD4 *、GPMC_ADMC_INPUT */{GPMC_ADMC_AD4}*、GPMC_ADMC_ADMC_INPUT *、GPMC_ADMC_INPUT */{GPMC_ADMC_ADMC_AD4}*、GPMC_ADMC_ADMC_INPUT *
    、GPMC_ADMC_ADMC_ADMC_4 *、GPMC_ADMC_INPUT */ GPMC_ADMC_ADMC_ADMC_ADMC_INPUT 4 *、GPMC_ADMC_ADMC_ADMC_INPUT (M0 | PIN_INPUT)}、/* GPMC_AD6.GPMC_AD6 */
    {GPMC_AD7、(M0 | PIN_INPUT)}、/* GPMC_AD7.GPMC_AD7 */
    {GPMC_AD8、GPMC_AD8
    
    }、* GPMC_ADMC_INPUT 11 *
    
    、GPMC_ADMC_INPUT
    11 */ GPMC_ADMC_ADM8 *、GPMC_ADMC_INPUT 11 * GPMC_ADMC_INPUT *、GPMC_ADM12* GPMC_ADMC_ADMC_ADMC_ADM11 *、GPMC_ADM0_INPUT (M0 | PIN_INPUT)}、// GPMC_AD13 *
    /{GPMC_AD14、(M0 | PIN_INPUT)}、// GPMC_AD14 */
    {GPMC_AD15、(M0 | PIN_INPUT)}、// GPMC_A2.pulldown *
    
    、GPMC_A2.pull_A2.pulldown */
    
    (GPMC_A2.pull_A2.pull_0* GPMC_A2.pulldown *、GPMC_A2.pull_A2.pull_A2.pull_A2.pulldown */ GPMC_A2.pull_A2.pull_pull_0*、GPMC_A2.pull_pull_A2.pull_pull_p_pulldown */ GPMC_pull_pull_p_pull_a2.pull_a3/GPMC_a2.pull/GPMC_pull_a2.pin_pull_a2.pull/GPMC_a1.pull/GPMC_a1.pin_a1.pull
    (M0 | PIN_OUTPUT 下拉)}、// GPMC_A4.GPMC_A4 */
    {GPMC_A5、(M0 | PIN_OUTPUT 下拉)}、// GPMC_A5.GPMC_A5 */
    {GPMC_A8.A7_OUTPLOUT *、GPMC_A7.A7_GPMC_A7.(A7_OUTPLOW0*
    
    
    
    、GPMC_A7_A7_A7_GPMC_A7_GPMC_A7_OUTPLOW0*、GPMC_A7_A7_A7_GPMC_A7_GPMC_A7_GPMC_A7_GPMC_GPMC_GPMC_OUTPLOW0*、GPMC_A7_A7.A7.A7_GPMC_GPMC_GPMC_GPMC_GPMC_A7_A7.A7.A7.A7.A7.A7.A7.A7.A7_GPMC_GPMC_GPMC_GPMC_GPMC_GPMC_GPMC_GPMC_GPMC_OUTPLOW0*、
    (M0
    
    
    
    
    | PIN_OUTPUT 下拉)}、// GPMC_A11.GPMC_A11 */{GPMC_A12、(M0 | PIN_OUTPUT 下拉)}、// GPMC_A12.GPMC_A12 */{GPMC_A13、(GPMC_IN_OUTPUT)*
    
    、GPMC_A17 *、GPMC_A14 */ GPMC_GPMC_A15、GPMC_GPMC_A17 *、GPMC_GPMC_OUTPUT (GPMC_A17)、GPMC_14 */GPMC_AM18* GPMC_A15)、GPMC_GPMC_GPMC_A14、GPMC_GPMC_GPMC_14、GPMC_GPMC_GPMC_GPMC_14 * GPMC_GPMC_A17 */ GPMC_GPMC_GPMC_GPMC_GPMC_14、GPMC_GPMC_GPMC_GPMC_GPMC_14 * GPMC_GPMC_GPMC_GPMC_14 *、GPMC_GPMC_GPMC_GPMC_ (M0
    
    
    
    
    | PIN_OUTPUT 下拉)}、/* GPMC_A18.GPMC_A18 */{GPMC_A19、(M0 | PIN_OUTPUT 下拉)}、/* GPMC_A19.GPMC_A19 */{GPMC_A20、(GPMC_PIN_OUTPUT)*
    、GPMC_A22 *、GPMC_A24*、GPMC_AN_AN2*、GPMC_AN_AN2_GPMC_OUTPUT *、GPMC_A21 */ GPMC_AN2_AN_AN2*/ GPMC_GPMC_GPMC_AN24_GPMC_GPMC_AN0_GPMC_AN24_GPMC_AN2*、GPMC_GPMC_GPMC_GPMC_AN24_GPMC_AN2*、GPMC_GPMC_GPMC_GPMC_AN24_GPMC_GPMC_GPMC_AN2*、GPMC_GPMC_GPMC_AN24_GPMC_GPMC_AN0_GPMC_AN24_GPMC_AN2*
    (M0
    
    
    
    
    | PIN_OUTPUT 下拉)}、// GPMC_A25.GPMC_A25 */{GPMC_A26、(M0 | PIN_OUTPUT 下拉)}、// GPMC_A26.GPMC_A26 */{GPMC_A27}
    、GPMC_OUTPUT * GPMC_0*、GPMC_GPMC_OUTPUT *、GPMC_2*/ GPMC_GPMC_GPMC_OUTPUT *、GPMC_0* GPMC_GPMC_USCSRC0 *、GPMC_OUTPUT (GPMC_0* GPMC_0_GPMC_GPMC_GPMC_100)、GPMC_GPMC_GPMC_2)、GPMC_GPMC_GPMC_GPMC_GPMC_GPMC_OUTPUT */ GPMC_2、GPMC_2 * GPMC_GPMC_GPMC_GPMC_GPMC_GPMC_OUTPLOW*、GPMC_2 * GPMC_2、GPMC_GPMC_GPMC_GPMC_GPMC_US3 *
    (
    
    
    
    
    | PIN_INPUT_PULLUP)}、/* GPMC_clk.GPMC_wait1 */{GPMC_ADVN_ALE、(M0 | PIN_OUTPUT_WAIT 下拉)}、/* GPMC_advn_ale.GPMC_advn_REN、(M0 | GPMC_PUBL_0)
    、GPMC_0 * GPMC_PUBL_0、GPMC_0 * GPMC_PIN_0、GPMC_PUBLON_0 */ GPMC_0 * GPMC_PUBLON_0 * GPMC_PUBLON_0 */ GPMC_0 * GPMC_0 * GPMC_PIN_PUBLON_0 * GPMC_COMM_PUBLON_0 *、GPMC_0 * GPMC_COMM_PUBLIP_0 * GPMC_0 *、GPMC_PIN_COMM_PUBLIP_0 *、GPMC_0 * GPMC_PIN_COMM_COMM_PUBLIP_COMM_PUBLIP_0 *(GPMC_0)
    
    (m14 | PIN_OUTPUT_PULLUP)}、// relais_test_in_sigvin1a_d0.gpio3_4 *
    /{VIN1A_D1、(m14 | PIN_INPUT_PULLUP)}、//*~inrq_uart01_expvin1a_d1_5 */
    {vin1n_3_di_pin4 *
    
    
    、gpin1n_3_b3*、gpin4_gpin1n_b1n_b3*、gpin4 *、gpin1b3_b1n_in4 *、gpin1b3_gpin4 *、gpin1b3_b1n_b3_di4 *、gpin4 *、gpin1 v_in1 v_in4 pin1 n_in4 *、gpin1 n_in1 n_b3_b3_in1 *、gpin4 *、gpin1 n_in1 n_b3_b3_b3_
    (m14 | PIN_INPUT_PULLUP)}、//~IRQ_uart23_expvin1a_d6.gpio3_10 *
    /{VIN1A_D7、(M14 | PIN_INPUT_IND)}、//
    
    
    
    
    {v_b2_d7.gpvin01_D8 *、{VIN1A_IN3_IN_IND8 *、}* 14_IN3_INVINT_IN1n_IN3_IND8、*输出 (m14 | PIN_INPUT_PULLUD)}、// pwr_ref1vin1a_d12.gpio3_16 */
    {VIN1A_D13、(m14 | PIN_INPUT_INPUT1)}、//* relais_test_out_vinsig sig_d13.gpio3_17*
    /{VIN1A_IN1A_IN14_PIN_IN6_IN6*
    
    
    
    、_IN6_IN18_IN24_IN6_IN24_IN_IN24_IN_IN6_IN24_IN_IN6*、_IN24_IN24_IN24_IN_IN_IN24_IN_IN_IN_IN24_IN_IN24_IN_IN_IN24_IN_IN_IN24_IN_IN24_IN_IN_IN_IN24_IN_IN_IN6*、_IN24_IN24_IN24_IN_IN_IN24_IN_IN_IN_IN24_IN_IN_IN_IN24_IN_IN_IN_IN24_IN_IN
    (m15 | PIN_INPUT_PULLUD)}、// NC vin1a_D19.Driver_OFF *
    /{VIN1A_D20、(M15 | PIN_INPUT_PULLUD)}、// NC vin1a_d20.Driver_OFF *
    {VIN1A_IN2A}、{VIN0_IN2A_IN0*
    
    
    、INVIN2A_IN2A_IN0*、INVIN2A_IN2A_IN0*、INVIN2A_IN2A_IN0_INVIN0*、INVINVIN2A_IN2A_OFF *、INVIN2A_IN2A_IN2A_IN0_INV0_INV/ INVINVIN2A_IN2A_IN0*、INVINVIN2A_IN2A_IN0_INVINVIN0_INVIN2A_IN0*、INVINVIN2A_IN2A_IN0_INVIN0_INVINVINVIN0_IN0*、IN2A_INVINVINV
    (m15 | PIN_INPUT_PULLUD)}、//* NC vin2A_hsynct0.Driver_off *
    /{VIN2A_VSYNC0、(M15 | PIN_INPUT_PULLOWDOWN)}、//* NC vin2A_bulldown *
    
    
    
    {VIN2A_IND2_0*
    、INV2A_INV/24*、INV2A_INV/24_IND4/INV/24*、INV/24_INV/24_INV/24_IND4/INV/24*、INV/24_INV/24_INV/24_INDUPUT_IND4/IND4/INV/24*、INV/24_INV/24_INV/24_IND4/INV/24*、INV/24_IND4/INV/24_IND4/INV/24_IND4/INV/24_INV/24_INV/24_INV/24*、INV/24_INV/24_PIN_IND4//*
    
    
    
    
    
    | NC vin2A_D4.Driver_off */{VIN2A_D5、(M15 | PIN_INPUT_PULLUP)}、/* NC vin2A_D5.Driver_off */{VOUT1_FLD、(M15 | PIN_INPUT_PULLUP)}、/* NC vout1_CL6 *、#GPIO0_IN_IN_INPUBL_OFF *、(GP_IN_IN_R5_IN_R5_IN_IN_RULLUP)*、(M15)*、#_IN_IN_IN_IN_IN_IN_CL6 *、IN_IN_CL6 *、IN_IN_INPUBL_OFF *、IN_6 *、IN_IN_IN_INPUT *、IN_CL6 *、IN_IN_OFF *、IN_IN_IN_IN_CL6、IN_IN_IN_INPUT *、IN_OFF *、IN_IN_IN_CL6 */* NC xref_clk1.Driver_off */
    {XREF_CLK2、(M15 | PIN_INPUT_PULLUD)}、/* NC xref_clk2.Driver_off */
    {XREF_CLK3、(M15 | PIN_INPUT_PULLUP)}、/* NC xref_clk3.1/ McAFR_OFF *
    
    、
    
    *(McAFR_IN_IN_CLK1.SP1)*、McAFR_IN_INPUT、*(McAFR_IN_OFF)*、McAFR_IN_IN_IN_ER_ER_IN_OFF *、*、McAFR_IN_IN_IN_IN_IN_ER_ER_CLK1.SP1 |(McAFR_OFF)/* NC McASP1_AXR3.Driver_off */
    {McASP1_AXR4、(M15 | PIN_INPUT_PULLUD)}、/* NC McASP1_AXR4.Driver_off */
    {McASP1_AXR5、(M15 | PIN_INPUT_PULLUP)*、/AXNC1_RAXSP1_OFF *
    、MC0_PIN_R20_R20_PIN_PIN_R0_R20_PIN_R0_R20_PIN_PIN_R0_R20_PIN_PIN_R0*
    
    
    、{MC0_PIN_PIN_R20_PIN_R20_PIN_PIN_R0_PIN_R0_R0_PIN_PIN_R20_PIN_R20_PIN_R20_PIN_PIN_PIN_R0_PIN_PIN_R0_PIN_PIN_R0_PIN_PIN_PIN_PIN_PIN_PIN_R0_PIN_PIN_PIN_PIN_PIN_PIN_R0_PIN_PIN_/* NC
    
    
    
    
    
    | MCASP3_AXR1.Driver_off */{MMC3_CLK、(M15 | PIN_INPULLUP)}、/* NC mmc3_clk.Driver_off */{MMC3_CMD、(M15 | PIN_INPULLUP)}、/* NC mmc3_CONTROUL.3*、MMCM3_INUP.3*(MMC3_PIN_INPUOp)*、MMCMMC3_IN_PIN_INPUOp */{MMC0_PIN_PIN_PIN_CONTROUP.3_INL *、MMCM3_OFF *、MMCM3_INUP.3_INUP.3_PIN_PIN_PIN_PIN_CONTROUP.3*、MMCM0_CONTROUP.3_PIN_PIN_PIN_PIN_CONTROUP.3*(M15)*、MMCM3_PIN_PIN_PIN_PIN_PIN_PIN_CONTROUP.3_PIN_PIN_PIN_CONTROUP.3_CONTROU/* NC mmc3_dat3.Driver_off */
    {MMC3_DAT4、(M15 | PIN_INPULLUP)}、/* NC mmc3_dat4.Driver_off */
    {MMC3_DAT5、(M15 | PIN_INPULLUP)}、// NC mmc3_DATA5_OFF *
    
    
    
    、{MMC3_IN_3_INPUT *、LM5_IN_OFF *、{MMC6_PIN_PIN_OFF *、{M15_PIN_PIN_CONTROUP.6_PIN_OFF *、{M15_PIN_PIN_PIN_OFF *、{MMC6_PIN_CONTROUL.}/* NC MCASP5_FSX.Driver_off */
    {MCASP5_AXR0、(M15 | PIN_INPULLUD)}、/* NC MCASP5_AXR0.Driver_off */
    {MCASP5_AXR1、(M15 | PIN_INPUT_PULLUP)}、/* NC MCASP5_AXR1.pulldown *
    
    
    *、
    {AMC_IN1_INUCL1 *、CANTX_INR1.pulldown *、CAN_IND1*、PIN_PIN_INPUT_INUCL1、CAN_INPUT_OFF *、CANTX_IN_INPULTRA_OFF *、CAN1 *(UCL1)/*
    
    
    
    
    
    | vout1_clk.driver_off */{VOUT1_DE、(M15 | PIN_INPUT 下拉)}、/* vout1_DE.driver_off */{VOUT1_HSYNC、(M15 | PIN_INPUT_PULLUD1_OFF)*、
    {VOUT1_INPUT *、VOUT1_OFF **、VOUT1_INPUROUT1_OFF ***(VOUT1_UD1_IN_INPUT)*、VOUT1_OUT1_OFF *、VOUT1_INPUBROUT1_OFF **(VOUT1_IN_OUT1_OFF)*、VOUT1_INPUT *、VOUT1_IN_OUT1_OFF *、VOUT1_OUT1_INPUT (*、VOUT1_IN_OUT1、VOUT1_OUT1_IN_OUT1_OUT1_OUT1_OFF)/* vout1_D3.driver_off */
    {VOUT1_D4、(M15 | PIN_INPUT 下拉)}、/* vout1_D4.driver_off */
    {VOUT1_D5、(M15 | PIN_INPUT_PULLUP)}、/* vout1_D8.pulldown *
    (* VOUT1_D1_IN_PUT
    
    
    
    )、*(* VOUT1_D1_D7.pulldown **、VOUT1_D3_IN_PUT)*(*输入/VOUT1_D7.D7.D7.D11_PIN_IN_OUT1_OFF)*、VOUTDOUT_PUT (*(*输入/VOUT1_D15_IN_PUT)| VOUTDOUTDOUTDOUT10_PUT (*输入/VOUT1_D7.D11_OUT1_OFF)/* vout1_d10.driver_off */
    {VOUT1_D11、(M15 | PIN_INPUT_PULLUP)}、/* vout1_D11.driver_off */
    {VOUT1_D12、(M15 | PIN_INPUT_PULLUP 下
    
    
    
    
    拉)}、/* vout1_Upulldown *(VOUT1_D15)*、{VOUT1_INPUT1_D15 |输入/*(VOUT1_INPUT1_OFF)*、{VOUT1_INPUT1.pulldown *、{VOUT1_IN_D15 |输入引脚1 *、VOUT1_D15_PIN_PIN_PIN_D15)*、输入/*(VOUT1_D15_PIN_PIN_PIN_D15_INPUT 1.PIN_D15)*、输入/*输入引脚 D15_D15_D15_PIN_D15_INPUT *(*(Vout1_OFF)/* vout1_d17.driver_off */
    {VOUT1_D18、(M15 | PIN_INPUT_PULLUP)}、/* vout1_d18.driver_off */
    {VOUT1_D19、(M15 | PIN_INPUT_PUTDOWN)}、/* vout1_Upulldown *
    
    
    
    
    (* Vout1_Upullout1_D15)*、{VOUT1_INPUT1_D23)|输入引脚#Vout1_OFF *(Vout1_INPUT1_INPUT1.pulldown *、{*(Vout1_IN_PIN_PIN_D15)|输入引脚#Vout1_D23)*(Vout1_INPUT1_INPUT1_INPUT1.pulldown)*、*(Vout1_D15_PIN_PIN_PIN_PIN_PIN_D23)|输入引脚#Vout1_OFF)*、(Vout1_INPUT1.PIN_PIN_D15_PIN_PIN_PIN_PIN_PIN_D21)*(Vout1_D15_PIN_D/* NC Wakeup0.Driver Off */
    {WAKEUP1,(M15| PIN_INPUT_PULLD)},/* NC Wakeup1.Driver Off */
    {WAKEUP2,(M15| PIN_INPUT_PULLD)},/* NC Wakeup2.Driver Off */{WAKEUP_PIN_UART15_IN_INPUT
    */}/{RTUART15_PIN_OUT1*}/}/}/{WARTROPUT_PIN_OUT1* INPUT OUT1*
    
    
    (M15
    
    
    
    
    
    
    
    
    | PIN_INPUT_PULLUD)}、// NC uart1_CTSn 禁用*/{UART1_RTSN、(M15 | PIN_INPUT_PULLUP)}、// NC uart1_rtsn.disabled */{UART2_RXD、(M15 | PIN_INPUT_IN_PUBLD)}、/{MDL_MODIO 0 *(MDOLMOLD_IN_COMMON_COMMON_PUBL_CONTROK)*(0)| UARTMODIO 0)*(0 | UMDIO 0)/* EPHY_0_1 MDIO_d.MDIO_d *
    /{RMII_MHz_50_CLK、(M0 | PIN_INPUT_PULLUD)}、/* EPHY_0_1 RMII_MHz_50_CLK *
    
    、{RGMII0_RGM0_R0_RGM0_R0_R0_RGM0_R0_R0_RGM0_R0_RGM0_R0_R0_RGM0_R0_RGM0_R0_RGM0_RGM0_R0_RGM0_R0_RGM0_R0_RGM0_R0_RGM0_RGM0_RGM0_RGM0_RRM0_RRM0_RRM0_RGM0_RGM0_RGM0_RRM0_RGM0_RRM0_RGM0_RGM0_RRM0_RGM0_RGM0_RGM0_RRM0_RGM0_RRM0_RRM0_RGM0_R
    
    
    
    (M1
    
    
    
    | PIN_OUTPUT 下拉)}、/* EPHY0 rgmii0_rxd2.rmii0_txen */{RGMII0_RXD1、(M1 | PIN_OUTPUT 下拉)}、/* EPHY0 rgmii0_rxd1.rmi0_rgmi0_rm2_dpulldown *、(M1 * premi0_rgpulldown)
    、
    {rm2_rgpremi0_rgpremi0_rm2_rm2_rgm2_rgpulldown *、}*(rgpremi0_rm2_rm2_rm2_rgpulldown)*(rgpremi0_rgpremi0_rm2_rm2_rm2_rgpulldown *、rgpremi0_rgpremi0_rm2_rm2_rgpremi0_rm2_rgpremi0_rgpulldown */* EPHY1 rgmii0_txc.rmii1_rxd1 */
    {RGMII0_TXCTL、(M2 | PIN_INPUT_PULLUD)}、/* EPHY1 rgmii0_rmi1_rmi2*/
    {RxRX0_RxRX0_RGM0_Rpulldown *
    
    
    
    *、rgp2_rm2*、rgpulli0_rm0_rm2**、rgpremi0_rgpullout1 *(rgpremi0_rgpremi0_rm2_rm2*/rgpremi0_rgpulldown *)*}*(rgpremi0_rgpremi0_rgpremi0_rm2_di0_rm2*/rm2*/rgpremi0_rgpremi0_rgpremi0_rm2*/rgpremi0_rgpremi0_rg usb1_drvvbus.usb1_drvvbus
    (M0 | PIN_OUTPUT 下拉| SLEWCONTROL)}、// usb2_drvvbus.usb2_drvvbus */
    
    
    
    {VIN2A_D6、(M11 | PIN_INPUT_PULLUD)}、// EPHY2 2A_d6.pr1_MII_MT1_CLK *
    /{VIN2A_IN2A_OUTPUT
    *、
    
    
    {VIN2_D2_IN2_IN2T_IN2A_OUTPLOUT *}*、{VIN2_IN2_IN2_DIVIN2_IN2_DIVIN2_IN2_DIVIN11*、IN2_IN2_IN2A_OUTPUT_IN2_IN2_IN2_IN2_IN2_IN2_IN2_IN2_IN2*、IN2_IN2_IN2_IN2_IN2_IN2_IN2_INV2*、IN2_INVIN2_IN2_IN2_IN2_INVIN2_IN2_IN2_IN2_IN2_IN2_IN2_INVINVINVIN2_IN2 (M8
    
    
    
    | PIN_INPUT_PULLUD)}、// EPHY2 HY2A_D8.mii1_rxd3 */{VIN2A_D14、(M11 | PIN_INPUT_PULLOD)}、// EPHY2A_D14.pr1_MII_MR1_CLK *{VIN2A_IN2A_INPULLUP *
    、{VIN2A_IN2A_IN2A_IN2A_IN2A_IN2A_IN1/2_IN1/2_INVINVIND1*、}*(pulldown *}*引脚1、IN2_IN2_IN2_IN2_IN2A_IN2A_IN2A_IN2_IN2_IN2_IN2A_IN2_IN2_IN2_IN2_IN2_IN2n_IN2_INV/2_INV/2_INV/2_IN2_INVINVIN2_INV/2_IN2_INVINV/2_INDIPUT)
    (m11 | PIN_INPUT_PULLUD)}、// EPHY2 vin2a_d17.pr1_mii1_HYd2 */
    {VIN2A_D16、(M11 | PIN_INPUT_PULLOD)}、// EPHY2A_D2A_IN2A_INVIN2A_IN211*
    
    
    
    、
    {vin2A_IN2A_IN2A_IN2A_IN2A_OUTPLOUT *、(VIN2_IN2_IN2_IN2_IN2T_VIN2A_IN2_IN2T_IN2T_VIN2A_IN2T_VIN211*、}*引脚2A_IN2A_IN2A_IN2A_IN2A_IN2A_IN2A_IN2T_IN2T_IN2T_IN2V_IN2V_IN2V_IN2T_INVINVIN2*、INVIN2T_IN2T_IN2T_IN2V_IN2V_INVINVINVIN2T_IN211*引脚下拉 (M11 | PIN_INPUT_PULLUD)}、// EPHY2 vin2A_D21.pr1_mii1_McAlink *
    
    
    
    /{McASP1 _AXR1、(M11 | PIN_INPUT_PULLUP)}、// EPHY3 vinsp1_McAAXR1.PR2_MII_clk *
    、{M11_PULLUP *
    
    
    、(P0_R11_EP_IN_IN_R11_PUTDOWN_0_PUT_R0_PUTDOWN**、}*(EPMR11_P0_PUT_R11_PUT_PUT_R11_Pn_Pn_R11_Pn_Pn_PUT_R11_EP_PUTDOWN_R11_PUTDOWN_R0_PUT_R11_PUT_PUT_PUT_PUT_R0_PUT_PUTDOWN_R0_PUT_PUTDOWN_PUT_PUT_PUT_R11***、}*(pulldown
    (M11 | PIN_OUTPUT 下拉)}、// EPHY3 McASP1_AXR9.PR2_mii0_txd3 *
    /{McASP1_AXR13、(M11 | PIN_INPUT_PULLUD)}、// EPHYAX3 McASP1 McASP1 x 13_MII、{PRM0_IN_INPUT_R2*
    、RX0_IN_INPUT_PUT_R102_R2*
    
    、{AXR2_PUT_PUT_PUT_RSP2*、RX0_PUT_PUT_PUT_PULLD_R102_R102_RSP2**、{AXP_PUT_PIN_PUT_PUT_R102_R102_R102_R102_RSP2_PIN_PIN_PIN_PIN_R0_PIN_R0_PIN_PIN_PIN_PIN_R0_R0_PIN_R0_PIN_PIN_R0_PIN_R0_R0_PIN_PIN_PIN_R0_R0_PIN_
    
    (M11 | PIN_INPUT_PULLUP)}、// EPHY3 MCASP2_aclkx.PR2_mii0_McAR2 *
    /{EPSP1_AXR15、(M11 | PIN_INPUT_PULLUP)}、// EPHYSP1_McASP1
    
    
    
    PULLUP *、{EP_IN_INPUT_IN_CMPULLUP ***、LM_IN_IN_IN_INPULLUP **、LMX_IN_IN_IN_IN_INPUT *、LMX_IN_IN_IN_IN_INPULLUP **、SP1_SP1_IN_IN_IN_IN_IN_IN_INPUT
    (M11 | PIN_INPUT_PULLUP)}、// EPHY3 McASP1_FSX.PR2_MDIO_DATA *
    /{MCASP2_AXR3、(M11 | PIN_INPUT_PULLUP)}、// EPHY3 mcasp2_axr3.PR2_mii0_rxlink */
    
    
    {MCM1_MMCM1*
    
    
    、MMCM1_PIN_1*、mmMC1_1_1* mmMCM0_PLUP *(MMCM1_M0_MMCM1*、MMCM1_PIN_1)
    (M0 | PIN_INPUT_PULLUP)}、// mc1 mmc1_data2.mmc1_DAT2 */
    {mcMC1_DAT3、(M0 | PIN_INPUT_PULLUP)}、// mcMC1 mmc1_dw3 *
    
    
    
    
    
    
    
    (mcTS_pullup)*{mc2_dpullup}*、mc2_dw_mc2_dpullup *(mc2_dw_mc2_dw_mc2_dpullup)*、mc2_dw_mc2_dw_mc2_dw_mcpullup * (M3
    
    
    
    
    
    | PIN_INPUT_PULLUP)}、// UART8 MCASP4_aclkx.uart8_RxD */{MCASP4_FSX、(M3 | PIN_OUTPUT)}、// UART8 MCASP4_FSX.uart8_TXD */{MCASP4_UST_PULLUP
    **、MCA24_IN_UART8_UART8_IN_UART8**、UART8_IN_UART8_UART8_IN_UART8_UART8_IN_UART8_UART8*、UART8_IN_UART8_IN_UART8_UART1**(**引脚 UART1*、UART8_UART8_UART8_UART8_UART1*、UART8_UART8_IN_UART8_UART8_UART8_UART8_UART1*
    (M0 | PIN_INPUT_PULLUP)}、// I2C2 i2c2_sda.i2c2_sda *
    /{I2C2_SCL、(M0 | PIN_INPUT_PULLUP)}、// I2C2_SPI1_INPUT *
    
    
    
    
    
    (SPI1_IN_INPUT)、
    * I2C2_SPI1_IN_I1*、I1_INPUT_I2M0_INPUT *(SPI1_IN_IN_I2M0_INPUT_IN_I1*、SPI1*、SPI2M0_PUT_IN_IN_I2M0_INPUT *、PUT_IN_I2M1*、PUT_I2M1*、PUT_IN_IN_I2M1*、PUT_PUT_IN_IN_IN_1 *、PUT_I2M0_IN_I2M0_IN_IN_INPUBL_1 *、PUT_IN_IN_I2M1*(SP/* SPI1 SPI1_d0.SPI1_d0 */
    {SPI1_CS0、(M0 | PIN_INPUT_PULLUP)}、/* SPI1 SPI1_cs0.SPI1 */
    {SPI1_CS1、SPI2
    
    
    
    
    、SPI2和 SPI1 * SPI1 PULLUP}*(SPI1)、SPI1、SPI2 * SPI1、SPI1和 SPI1 * SPI1 * SPI1、SPI1、SPI1 * SPI1引脚 SPI1、SPI1引脚 SPI1引脚1引脚/SPI1引脚/SPI2 * SPI1、SPI1引脚/SPI1引脚/SPI1引脚/SPI1引脚/SPI1引脚/SPI1引脚/SPI1引脚1引脚1引脚1引脚1引脚*(SPI1)*(SPI1)* SPI2 * SPI1引脚1引脚1引脚/SPI1引脚1引脚1引脚/* SPI2_D1.SPI2_D1 */
    {SPI2_D0、(M0 | PIN_INPULLUP)}、/* SPI2 SPI2_d0.SPI2_d0 */
    {SPI2_CS0、(M0 | PIN_INPULLUP)}、/* SPI2 SPI2_D0.SPI2_D0 *
    
    
    
    
    
    、{SPI2_IN_RTO_ON **、{SPI2_IN_RTO/*}*(RTC_IN_OFF)*、{SPI2_ON
    、{SPI2_PIN_INPUT}*(*}*}*(RTC_ON)*、{SPI2_PIN_ON、{SPI2_ON、{SPI2_TO_ON、{SPI2_TO_ON *}*}*(RTC_ON、{SPI2_ON、{SPI2_INPUT *}*}*(RTC_ON、{SPI2_INPUT)*}*}*(RTC_ON (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}、/* TDI.TDI */
    {TDO、(M0 | PIN_OUTPUT)}、/* TDO.TDO */
    {TCLK、(M0 | PIN_INPUT_PULLUP)}、/* tCLK *
    /{TR0*
    、
    {TREMn_INPUT *、(0*
    )、{TREM0*/}* TREMn.INPUT *、{TRM 0*、(rn)、(0* TREM0*、(rn)、(0*)、(rmrmrn)/* emu1.emu1 */
    {nMIN_DSP、(M0 | PIN_INPUT_PULLUP)}、/* nMIN_DSP.nMIN_DSP */
    {RSTOUTN、(M0 | PIN_OUTPUT)}、/* rstoutn.rstoutn *
    };
    
    construct t_nMUSTRON_COMMON_INTRUn *={
    * 14_COMMON_COMMON_COMMON_INTRUn}*、(mON_COMMEND_INTRUS_COMMENDON_COMMON_INTRUn)}*= d_COMMENDON_CONTINTRUn *= 14、/*= d_INTRU_INTRU_INTRU
    
    
    
    
    const struct pad_conf_entry earle_padconf[]={
    {UART2_CTSN、(M2 | PIN_INPUT_PULLUP)}、/* uart2_CTSN.uart3_RxD */
    {UART2_RTSN、(M1 | PIN_OUTPUT)}、//* uart2_RTSn.u20_C1_I
    
    、*#C1_C1_IN_C12_IN_C1_UART20_IN_C1_INPUT (*#C1_I2_C1_IN_C1_I2_C1_IN_C1_IN_C1_C1_INPUT)
    
    
    

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    请参阅"no dt node"消息。 由于内核现在已引导、因此您可以开始回放您删除的节点。 另请参见 此主题。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    大家好、感谢您的支持、Kemal。

    >>查看"no dt node"消息。 由于内核现在已引导、因此您可以开始回放您删除的节点。 另请参见 此主题。

    我发出的第一条"no dt node"消息。通过在 DTS 主结构中添加以下行,"/{...} ":

    OCP{
    sdma:dma-controller@4a056000{
    ti、hwmods ="dma_system";
    };
    }; 

    但我遇到节点 GPU 的问题、因为 AM5726没有 GPU。 在其他电路板 DTS 文件上、它们具有 AM5728处理器、我看不到存在 GPU 节点。

    接下来、简要概述误差和"dt 节点"消息:

    [0.731631] omap_hwmod:l3_main_2使用来自 OCP
    的断开 dt 数据[0.756415 ] omap_hwmod:dma_system:no dt 节点
    [0.994216] omap_hwmod:gpu:no dt 节点
    [1.217944] omap_hwmod:hdq1w:no dt 节点
    [1.470919]
    
    无 dt 节点
    [2.168163] OMAP-hwmod:vip1:无 dt 节点
    [2.398932] OMAP-hwmod:vip2:无 dt 节点
    [2.622949] OMAP-hwmod:vip3:无 dt 节点
    [2.937297] R5:c09b4c88 R4:00000000
    [2.937303]代码:e300243]- e3000001e300000243[-
    e3000004e3000002453] -[3.302320]
    内核严重错误-未同步:尝试终止初始化! exitcode=0x0000000b 

    在这里、您可以看到当前的 MLO 和内核消息:

    U-Boot SPL 2019.01 (2019年10月21日- 13:31:27 +0200)
    DRA752-GP ES2.0
    尝试从 MMC1引导
    默认模式无 pinctrl 状态
    对于默认模式无 pinctrl 状态
    从 FAT 加载环境... ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... 卡未响应电压选择!
    ***警告-无块设备,使用默认环境
    
    
    
    U-Boot 2019.01 (2019年10月21日- 13:31:27+0200)
    
    CPU:DRA752-GP ES2.0
    模型:TI AM5726 sec4
    板:SEC4
    DRAM:1 GiB
    大小的 DRAM 为1024 MB
    
    的
    OMAP beagle_x MMC:0
    正在从 FAT...加载环境 ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... MMC Device 1 not found
    *** Warning - No MMC card found,using default environment
    
    ***-> This Board is unknown
    
    晚期初始
    
    化2a invalid
    
    MMC device
    晚期初始化2b
    
    end of 晚期初始化
    
    网络:找不到以太网。
    按任意键停止自动引导:0
    =>
    =>
    =>=>=>
    =>=> setenv bootargs console=ttyS2、115200 earlyprintk loglevel=3 mem=0x40000000 loglevel=7
    =>加载 MMC 0:1 0x88000000 sec4.DTB
    128132字节在8ms (4208mB/s)内读取
    =>加载 MMC 0:1 0x800000000 section1.358.3mB 字节(0x300mB/s)
    
    => bootz 0x82000000 - 0x88000000
    ##平展设备树 blob,88000000使用
    0x88000000的 FDT blob 启动
    正在将设备树加载到8ffdd000,结束8ff483... 确定
    
    启动内核...
    
    [0.000000]在物理 CPU 上引导 Linux 0x0
    [0.000000] Linux 版本4.19.38-rt19 (Rene@Ubuntu)(gcc 版本8.3.0 (A 配置文件架构的 GNU 工具链8.3-2019.03 (arm-rel-8.36))) 9
    [0.000000] CPU:ARMv7处理器[412fc0f2]修订版2 (ARM30cr v7
    (可用代码:
    )[0.38dV cr = 0.0000.c: PIPT / VIPT 非混叠数据高速缓存、PIPT 指令高速缓存
    [0.000000](共:FDT):机器型号:TI AM5726 sec4
    [0.000000]启动控制台[earlycon0]已启用
    [0.000000]内存策略:数据高速缓存 writealloc
    [0.000000]
    EFI:从 FDT 获取 EFI 参数:[0.000000] EFI:找不到。
    [0.000000] CMA:在0x00000000b400000
    [0.000000] OMAP4上保留24 MIB:将0x0000bfd00000映射到 DRAM 屏障的(ptrval)
    [0.000000] DRA752 ES2.0
    [0.000000] random:从 start_kernel+b0/0x480调用 get_randup=0
    [0.192] DRA752 ES2.0 [0.000000]随机:从 start_kernel+ b0x480调用 get_kernelb_b_bpu=字节、其中包含 crng_pu=0 [0.192]/zone64288u1、内嵌式 CPU
    组[0. 总页数:259648
    [0.000000]内核命令行:console=ttyS2,115200 adlyprintk loglevel=3 mem=0x40000000 loglevel=7
    [0.000000]条目高速缓存哈希表条目:131072 (顺序:8、1048576字节)
    [0.000000] inode 高速缓存哈希表条目:65000000 (顺序:6、26536字节)
    994888K/1045504K 可用(8192K 内核代码、329K rwdata、2644K rodata、2048K init、275K BSS、 26040K 保留、24576K CMA-r)
    [0.000000]虚拟内核内存布局:
    [0.000000] 向量:0xffffff0000 - 0xffffff1000 (4KB)
    [0.000000] Fixmap:0xc00000 - 0xc00000 (3072 KB)
    [0.000000] vmalloc:0xf0800000 - 0x0x800000 (240MB)
    [0.000000] 低内存:0xC0000000 - 0xf0000000 (768 MB)
    [0.000000] pkmap:bfe00000 - 0xC0000000 (2 MB)
    [0.000000] 模块:bbbf000000 - bbfe00000 (14 MB)
    [0.000000] .text:0x (ptrval)- 0x (ptrval)(10208 KB)
    [0.0000] init:0x (ptrval)-0x (ptrval)(2048KB)
    [0.000000] .data:0x (ptrval)- 0x (ptrval)(330KB)
    [0.000000] .bss:0x (ptrval)- 0x (ptrval)(276 KB)
    [0.000000] slub:HWalign=64、order=0-3、MinObjects=0、CPU=2、Nodes =1
    [0.000000] RCU:可抢占分层实现。
    [0.000000] RCU: RCU 优先级提升:优先级1延迟500毫秒。
    [0.000000]无加速宽限期(RCU_NORMAL、After _boot)。
    [0.000000]启用了 RCU 任务。
    [0.000000] NR_IRQ:16、nr_IRQ:16、预分配的 IRQ:16
    [0.000000] GIC:使用分离 EOI/Deactivate 模式
    [0.000000] ti_dt_clocks_register:缺少 clkctrl 节点、请更新您的 DTS。
    [0.000000] OMAP 时钟事件源:Timer1为32786Hz
    [0.000000] arch_timer:cp15计时器以6.14MHz (phys)运行。
    [ 0.000000]时钟源:ARCH_SYS_COUNTER:MASK:0xffffffffffffffFFFF max_cycles:0x16af5adb9、max_idle_ns:440795202250 ns
    [0.000004] sched_clock:56位、频率为6MHz、分辨率为162ns、每43980465FFFF23ns 换行
    一次[ 0.000011]、基于0x8312_FFFF
    源代码:0x00032ns、最大0x00032ns:0x9932ns:0x8312FFFF 源代码:0x00032ns
    32768Hz
    [0.000727]上的32K_COUNTER 控制台:彩色虚拟设备80x30
    [0.259619]校准延迟环路(跳过)、使用计时器频率计算得出的值。 12.29 BogoMips (lpj=61475)
    [ 0.259628] pid_max:默认值:32768最小值:301
    [ 0.259762]安装高速缓存哈希表条目:2048 (顺序:1、8192字节)
    [ 0.259771]安装点高速缓存哈希表条目:2048 (顺序:1、8192字节)
    [ 0.260511] CPU 一致性测试
    :CP0:CP0:CP0:Rdspet 使用 ICIALLU 权变措施
    [0.260781]/cpus/cpu@0 missing clock frequency property
    [0.305725]/cpus/cpu@1 missing clock frequency property
    [0.311175] CPU0:Thread -1、CPU 0、socket 0、mpidr 8000000000
    [0.370182]为0x80200000 - 0x80200060
    [0.159]设置静态标识映射 SRCU 分层实现:
    [0.450674] EFI 服务将不可用。
    [0.470296] SMP:启动辅助 CPU ...
    [0.590710] CPU1:线程-1、CPU 1、插槽0、mpidr 80000001
    [0.590714] CPU1:幽灵 v2:使用 ICIALU 变通办法
    [0.590844] SMP:提起1个节点、2个 CPU
    [0.606125] SMP:总共激活2个处理器(24.59个 BogoMips)。
    [0.612472] CPU:所有 CPU 均在 HYP 模式下启动。
    [0.617206] CPU:提供虚拟化扩展。
    [0.623043] devtmpfs:已初始
    化[0.658118] VFP 支持 v0.3:Implementor 41架构4第30部分变体 f rev 0
    [0.666309]时钟源:jiffies:mask:0xFFFFFFFF max_cycles:0xFFFFFFFF、max_idle_idle_00ns:19112604462750000 ns
    [ 0.676424]
    (tex FFFF max_cycles:3276833:512个字节)核心条目:0.6833] 初始化的 pinctrl 子系统
    [0.689410] DMI 不存在或无效。
    [0.693801] NET:注册协议系列16
    [0.701107] DMA:预分配256 KiB 池用于原子相干分配
    [0.709054] OMAP-hwmod:L3_MAIN_2使用 OCP
    [0.748598] OMAP-hwmod:GPU:no dt 节点
    [0.752535]--- [在此处剪切]-----
    [0.757285]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [0.767183] omap_hwmod:GPU:没有 MPU 寄存器目标基
    座[0.773522]链接的模块:[0.771766X
    
    硬件名称:[0.7719]未被污染
    的硬件名称[0.66x:r7410661066][0.771066]
    [0.776683][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [0.776689] r7:c0bb657c R6:60000013 r5:00000000 r4:c10505a4
    [0.776700][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [0.776707][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [0.776713] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 0.776719][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [0.776724] r9:c0e48824 r8:00000000 r7:c101427c r6:00000000 r5:c0bb6b64 r4:c1007488
    [0.776732][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [0.776736] r3:c0bb8c00 r2:c0bb6b64
    [0.776739] r5:00000000 r4:c1014244
    [0.776749][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [0.776754] r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [0.776757] r4:c1014244
    [0.776766][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 0.776769] R5:c1007488 R4:c10525c0
    [ 0.776776][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [0.776781] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [0.776790][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [0.776795] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [0.776797] r4:00000000
    [0.776805][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [0.776808]异常堆栈(0xef09dfb0至0xef09dff8)
    [0.776813] dfa0: 00000000 00000000 00000000 00000000
    [0.776818] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [0.776822] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [0.776826] R5:c09b4c88 R4:00000000
    [0.776828]--[结束跟踪00000000000000000001 ]--
    [0.971056] omap_hwmod:hdq1w:无节点-0.975dt
    [在此处剪切]-----
    [0.979905]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 0.989802] omap_hwmod:hdq1w:没有 MPU 寄存器目标基
    座[0.996315]每个
    CPU 中已链接的 PID:0.990:9961:[0.990:0:0: W 4.19.38-rt19 #1
    [0.999464]硬件名称:通用 DRA74X (平展设备树)
    [0.999466]背板:
    [0.999476][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [0.999481] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [0.999489][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [0.999495][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [0.999500] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 0.999505][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [0.999511] R9:c0e48824 R8:00000000 r7:c10141c0 R6:00000000 R5:c0bb6b64 R4:c1007488
    [0.999519][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [0.999522] r3:c0bb8be8 r2:c0bb6b64
    [0.999525] r5:00000000 r4:c1014188
    [0.999534][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [0.999539] r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [0.999541] r4:c1014188
    [0.999550][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 0.99953] R5:c1007488 R4:c10525c0
    [ 0.999559][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [0.999564] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [0.999572][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [0.999577] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [0.999579] r4:00000000
    [0.999586][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [0.99959]异常堆栈(0xef09dfb0至0xef09dff8)
    [0.999594] dfa0: 00000000 00000000 00000000 00000000
    [0.999598] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [0.999602] dfe0:00000000 00000000 00000000 00000013 00000000
    [0.999606] R5:c09b4c88 R4:00000000
    [0.999609]--[结束跟踪0000000000000002 ]--
    [1.223820] omap_hwmod:SmartReflex_core-----节点:1.28910-
    [在此处剪切]-----
    [1.23365]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.243557] omap_hwmod:SmartReflex_core:没有 MPU 寄存器目标基
    座[1.251048]
    每个 CPU 中已链接的 PID:1.25192:0:1个 PMCC/hwComm:0:0:1个已污染的 PMc:1个 PMc:1个 MPU 寄存器目标基座[1.251048 W 4.19.38-rt19 #1
    [1.254195]硬件名称:通用 DRA74X (平展设备树)
    [1.254197]背板:
    [1.254207][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.254213] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [ 1.254221][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 1.254228][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.254233] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.254238][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.254244] R9:c0e48824 R8:00000000 r7:c10122a4 R6:00000000 R5:c0bb6b64 R4:c1007488
    [1.254252][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.254255] r3:c0bb8734 r2:c0bb6b64
    [1.254258] r5:00000000 r4:c101226c
    [1.254267][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x430/0x134)
    [1.254273] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [1.254275] R4:c101226c
    [1.254283] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.254287] R5:c1007488 R4:c10525c0
    [ 1.254293][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [1.254298] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.254305][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.254310] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [ 1.254313] r4:00000000
    [ 1.254320][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.254323]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.254327] dfa0: 00000000 00000000 00000000 00000000
    [1.254332] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.254336] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [1.254339] R5:c09b4c88 R4:00000000
    [1.254342]--[结束跟踪0000000000000003]--
    [1.449960 ] omap_hwmod:SmartReflex_MPU--
    1.4971 --节点数---- [在此处剪切]-----
    [1.459710]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.46969610] omap_hwmod:SmartReflex_MPU:没有 MPU 寄存器目标基
    座[1.477036]
    在每个 CPU 中链接:1.4801个 PMCC0:1:1:1个 PMCCO0:1:1个 PID W 4.19.38-rt19 #1
    [1.480177]硬件名称:通用 DRA74X (平展设备树)
    [1.480179]背板:
    [1.480189][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.480194] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [1.480202][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [1.480208][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.480213] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.480218][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.480223] R9:c0e48824 R8:00000000 r7:c101221c R6:00000000 R5:c0bb6b64 R4:c1007488
    [1.480231][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.480234] r3:c0bb8724 r2:c0bb6b64
    [1.480237] r5:00000000 r4:c10121e4
    [1.480246][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [1.480252] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [1.480254] R4:c10121e4
    [1.480262][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [1.480265] R5:c1007488 R4:c10525c0
    [1.480271][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [1.480276] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.480283][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.480288] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [1.480291] r4:00000000
    [1.480297][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.480301]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.480305] DfA0: 00000000 00000000 00000000 00000000
    [1.480310] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.480314] dfe0:00000000 00000000 00000000 00000013 00000000
    [1.480318] R5:c09b4c88 R4:00000000
    [1.480320]--[结束跟踪0000000000000004 ]--
    [1.697146] omap_hw79 mod:VPE:无节点[1.70dt---
    [在此处剪切]-----
    [1.705846]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.715752] omap_hwmod:VPE:没有 MPU 寄存器目标基
    址[1.722109]链接到:[1.72249]:每个
    CPU:1:swap0:CPU:0:0 PID W 4.19.38-rt19 #1
    [1.725253]硬件名称:通用 DRA74X (平展设备树)
    [1.725255]背板:
    [1.725265][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.725270] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [1.725278][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [1.725284][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.725290] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.725295][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.725301] R9:c0e48824 R8:00000000 r7:c1015a6c R6:00000000 R5:c0bb6b64 R4:c1007488
    [1.725309][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.725312] r3:c0bb8e90 r2:c0bb6b64
    [1.725315] r5:00000000 r4:c1015a34
    [1.725324][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_all+0x48/0x134)
    [1.725330] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [1.725332] R4:c1015a34
    [1.725340] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.725343] R5:c1007488 R4:c10525c0
    [ 1.725349][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [1.725354] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [1.725362][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.725367] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [1.725369] r4:00000000
    [1.725376][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.725379]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.725384] dfa0: 00000000 00000000 00000000 00000000
    [1.725388] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.725392] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [1.725396] R5:c09b4c88 R4:00000000
    [1.725398]--结束跟踪0000000000000005 ]--
    [1.921003] omap_hwmod:vip1:no-- 1.925010-2--
    [在此处剪切]-----
    [1.929766]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 1.939665] omap_hwmod:vip1:没有 MPU 寄存器目标基
    座[1.946088]链接到
    CPU [ 1.9390:vap0:]中的模块:vap1:vap1:vap1:vap1:vap2 W 4.19.38-rt19 #1
    [ 1.949232]硬件名称:通用 DRA74X (平展设备树)
    [ 1.949233]背板:
    [ 1.949245][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.949250] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [1.949257][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 1.949264][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [1.949268] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 1.949274][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [1.949279] r9:c0e48824 R8:00000000 r7:c10159b0 r6:00000000 r5:c0bb6b64 r4:c1007488
    [1.949287][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [1.949290] r3:c0bb8e74 r2:c0bb6b64
    [1.949293] r5:00000000 r4:c1015978
    [1.949302][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x48/0x134)
    [1.949307] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [1.949309] R4:c1015978
    [1.949317] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 1.949321] R5:c1007488 R4:c10525c0
    [ 1.949327][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [1.949332] R8:c0e48844 r7:c0e004f0 R6:c10525c0 R5:c10525c0 R4:00000003
    [1.949340][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.949345] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c09b4c88
    [ 1.949347] r4:00000000
    [ 1.949354][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [1.949357]异常堆栈(0xef09dfb0至0xef09dff8)
    [1.949362] dfa0: 00000000 00000000 00000000 00000000
    [1.949366] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.949370] dfe0:00000000 00000000 00000000 00000013 00000000
    [1.949374] R5:c09b4c88 R4:00000000
    [1.949376]----结束跟踪0000000000000006 ]--
    [2.152027] omap_hwmod:vip2:no 2.60dt ----
    [在此处剪切]-----
    [2.160820]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 2.170720] omap_hwmod:vip2:没有 MPU 寄存器目标基
    座[2.177161]在
    每个 CPU 中链接的模块:2.180g0:vap1:vap2:2 W 4.19.38-rt19 #1
    [2.180307]硬件名称:通用 DRA74X (平展设备树)
    [2.180309]背板:
    [2.180319][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [2.180324] r7:c0bb657c r6:60000013 r5:00000000 r4:c10505a4
    [2.180331][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [2.180338][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [2.180343] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 2.180348][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [2.180354] R9:c0e48824 R8:00000000 r7:c101592c R6:00000000 R5:c0bb6b64 R4:c1007488
    [2.180362][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [2.18036] r3:c0bb8e6c r2:c0bb6b64
    [ 2.180368] r5:00000000 r4:c10158f4
    [ 2.180377][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x48/0x134)
    [2.180382] R10:c0e58320 R9:c0e48824 R8:00000000 r7:c0e0ce4 R6:ffe000 R5:c100c728
    [2.180385] R4:c10158f4
    [ 2.180393][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 2.180396] R5:c1007488 R4:c10525c0
    [ 2.180402][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [2.180407] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.180415][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.180420] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [2.180422] r4:00000000
    [2.180429][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.180432]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.180437] dfa0: 00000000 00000000 00000000 00000000
    [2.180442] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.180446] dfe0:00000000 00000000 00000000 00000000 00000013 00000000
    [2.180449] R5:c09b4c88 R4:00000000
    [2.180452]--[结束跟踪0000000000000007 ]--
    [2.375963] omap_hwmod:vip3:2.99dt 节点
    :-) [在此处剪切]-----
    [2.384724]警告:CPU:0 PID:1 at arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [ 2.394623] omap_hwmod:vip3:没有 MPU 寄存器目标基座
    [2.401046]链接到
    CPU [ 2.401b0:swap1:]模块:vap0:vap1:vap1:vap1:vap1:vap1:vap1:vap1:vap1:vap W 4.19.38-rt19 #1
    [2.404192]硬件名称:通用 DRA74X (平展设备树)
    [2.404194]背板:
    [2.404203][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [2.404209] r7:c0bb657c R6:60000013 r5:00000000 r4:c10505a4
    [2.404216][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [2.404222][ ](dump_stack)从[ ](_warn+0xdc/0xf8)
    [2.404227] r7:c0bb657c R6:00000009 R5:00000000 R4:ef09dddc
    [ 2.404233][ ](__warn)从[ ](warn_slespath_fmt+0x50/0x6c)
    [2.404238] r9:c0e48824 R8:00000000 r7:c10158a8 r6:00000000 r5:c0bb6b64 r4:c1007488
    [2.404246][ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [2.404249] r3:c0bb8e64 r2:c0bb6b64
    [2.404252] r5:00000000 r4:c1015870
    [ 2.404261][ ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x448/0x134)
    [2.404267] r10:c0e58320 r9:c0e48824 r8:00000000 r7:c0e0ce4 r6:ffe000 r5:c100c728
    [2.404269] r4:c1015870
    [ 2.404277] ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 2.404280] R5:c1007488 R4:c10525c0
    [ 2.404287][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [2.404292] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.404300][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.404305] R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [2.404307] R4:00000000
    [2.404314][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.404317]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.404321] dfa0: 00000000 00000000 00000000 00000000
    [2.404326] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.404331] dfe0:00000000 00000000 00000000 00000013 00000000
    [2.404335] R5:c09b4c88 R4:00000000
    [2.404338]--[结束跟踪000000000008 ]--
    [2.690326]未处理故障:异步外部中止(0x00001211 =
    
    2.8000000000D
    )[2.0000000D = 2.0000000332][2.0000000D = 8000000000D [2.0000000D 400D = 600000332] 1211 [#1]挤占 SMP ARM
    [2.690347]链接模块:
    [2.690354] CPU:0 PID:1 Comm:swapper/0污染:g W 4.19.38-rt19 #1
    [2.690356]硬件名称:通用 DRA74X (平展设备树)
    [2.690364] PC 位于_enable_sysc+0x5c/0x25c
    [2.690369] LR 位于_enable_sysc+0x48/0x25c
    [2.690373] PC:[ ] LR:[ ] PSR:40000013
    [2.690376] sp:ef09de38 IP:ef09de38 FP:ef09de64
    [2.690379] R10:c0e58320 R9:c0e48824 R8:00000000
    [2.690382] r7:c1012900 R6:00000000 R5:c1007488 r4:c1048r4
    :c101248r3:c1248r3:c12r3:c1248r3:c12r3:c1248r3:c12r3 00000078 r0:c10123e8
    [2.690390]标志:模式 SVC_32 ISA ARM 段上 FIQ 上的 nZcv IRQ 用户
    [2.690395]控制:30c5387d 表:80003000 DAC:fffffffd
    [2.690398]处理 swapper/0 (
    
    405:1、stack limit =0x (0x9020)[0x09000](peft)[2.90401]处理堆栈 swapper/0 (pid)[2.90401](0x0920])[2.90401] c0224e90 c09b9e08
    
    
    
    
    [ 2.690411] de40:ef09de64 b3a39597 c10123e8 c1052c10 00000000 c1012900 ef09de8c ef09de68 [ 2.690416] de60:c021dc60 c021d8004 b8 c10123e8 c1000922480 c0922480 c0922480 c0922480 c09236c e0922480 c2000:c2000 e09224e09224c 09224c 09224c 09224c c10525c0 c1007488 ef09df4c ef09ed8 c02023fc c0e0cef0 00000000 c0b460
    [2.690436] dee0:c0bbb440 c0b400 c0bc6a5c c1007488 c000000000 c0b418 00000002 00000002
    [2.690441] c0b400 c0bc1007482487 c010000000004 c10000000004 c010000040 c0100c1000002400024000c1000004 c100000241024000c100c1000002410240001 c100c100c1000002410240001 c100c100c1000002 c1000002
    
    ef09df94 ef09df50 c0e01048 c0202384 00000002 00000002 00000000 c0e004f0
    [2.690456] df60:c0c933f0 000000d1 c09b9e00000000 c09b4c88 00000000 00000000 00000000 [2.690460]
    df80:c0c09b00000000
    00000000 0000000400080000 c0000 00000004000000 b0990004 00000000 b00000000 b0990004 00000000 b080000 c0000 b00000000 00000000 00000000 0004000990004 00000000 b00000000 b00000000 b00000000 b0990004 00000000 b0990000
    00000000 00000000 00000000
    [2.690474] Dfe0:00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 00000000
    [2.690476]回溯:
    [ 2.690484][ ](_enable_sysc)从[ ](_ENABLE+0x158/0x284)
    [ 2.690490] r7:c1012900 R6:00000000 R5:c1052c10 R4:c10123e8
    [ 2.690497][ ](_enable)从[ ](_setup.part.16+0x1c0/0x4e0)
    [2.690501] r7:c1012420 r6:c1007488 r5:c101240c r4:c10123e8
    [ 2.690510][ ](_setup.part.16)、来自[ ](__omap_hwmod_setup_All+0x120/0x134)
    [2.690514] r7:c0e0ce4 r6:ffe000 r5:c100c728 r4:c10123e8
    [2.690522][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 2.690526] R5:c1007488 R4:c10525c0
    [ 2.690532][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [2.690537] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [2.690545][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [2.690551] R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [2.690553] R4:00000000
    [2.690560][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [2.690563]异常堆栈(0xef09dfb0至0xef09dff8)
    [2.690567] dfa0: 00000000 00000000 00000000 00000000
    [2.690572] dfc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [2.690576] dfe0:00000000 00000000 00000000 00000013 00000000
    [2.690580] R5:c09b4c88 R4:00000000
    [2.690586]代码:e3130080 1a000067 e5943004 e1a00004 (e5942044)
    [000055615]
    -尝试终止中断0000000548]代码:e3130080 1a0000.00004615[2.00005500000005]-尝试中止中断跟踪00000005995995]-中断 exitcode=0x0000000b
    [ 3.055615]
    [ 3.055625] CPU1:停止
    [ 3.055631] CPU:1 PID:0 Comm:swapper/1被污染:g D W 4.19.38-rt19 #1
    [ 3.055633]硬件名称:通用 DRA74X (平展设备树)
    [ 3.055635]背板:
    [ 3.055647][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [ 3.055653] r7:fa212000 r6:60000193 r5:00000000 r4:c10505a4
    [ 3.055661][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [3.055669][ ](dump_stack)从[ ](handle_ipi+0x1bc/0x22c)
    [ 3.055675] r7:fa212000 r6:00000001 r5:00000000 r4:c1052840
    [ 3.055685][ ](handle_ipi)从[ ](GIC_Handle_IRQ+0x94/0x98)
    [ 3.055689] R6:fa21200c R5:c102707c R4:c100796c
    [ 3.055696][ ](GIC_Handle_IRQ)、来自[ ](__IRQ_Svc+0x58/0xa0)
    [3.055699]异常堆栈(0xef0e3f28至0xef0e3f70)
    [3.055705] 3f20: 00000000 0000070c 00000000 c021a140 ffe000 c10074bc
    [ 3.055710] 3f40:c1007504 00000002 00000001 c10521d6 c0bbbc84 c00e3f84 c0e3f88 ef0e3f78
    [ 3.055714] 3f60:c10521d6
    c0ffff c84 c0ffff 0e3f84 e3f88 ffff 0e3f88 ffff 0e3f88 ffff 3f8:ffr0e3f8:0000ffr0ffr3:ffr0ffr206r13 r0ffr206r6 r0ffr6 f 0ffr6 f 0ffr6 f 0ffr3:ffr0ffr
    ](arch_cpu_idle)从[ ](DEFAULT_IDLE_CALL + 0x34/0x40)
    [3.055739][ ](DEFAULT_IDLE_CALL)从[ ](do_idle+0x110/0x180)
    [ 3.055746][ ](DO 空闲)从[ ](cpu_startup_entry+0x20/0x24)
    [3.055752] r10:00000000 r9:412fc0f2 r8:80007000 r7:c1052848 r6:00000001 r5:ef0e2000
    [3.055754] r4:00000086 r3:ef0e2000
    [3.055762][ ](CPU_STARTUP_INPUK)、来自[ ](secondary _start_kernel+0x178/0x180)
    [ 3.055768][ ](secondary _start_kernel)从[<8020210c>](0x8020210c)
    [3.055773] r7:c1052848 r6:30c0387d r5:00000000 r4:af05e880
    

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    GPU 节点处于中 /board-support/linux- /arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi 文件。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    >> GPU 节点已进入 /board-support/linux- /arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi 文件。

    哦,不。。。 我想我必须在 u-boot 中修改 DTS´文件为什么我也必须在 Linux 中使用 DTS 文件?

    是否可以将 DTS 从 u-boot 复制到内核?

     

    我现在使用内核中的 DTB:

     

    输出消息现在为:

    U-Boot SPL 2019.01 (2019年10月21日- 13:31:27 +0200)
    DRA752-GP ES2.0
    尝试从 MMC1引导
    、对于默认模式、没有 pinctrl 状态
    从 FAT 加载环境... ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... 卡未响应电压选择!
    ***警告-无块设备,使用默认环境
    
    
    
    U-Boot 2019.01 (2019年10月21日- 13:31:27+0200)
    
    CPU:DRA752-GP ES2.0
    模型:TI AM5726 sec4
    板:SEC4
    DRAM:1 GiB
    大小的 DRAM 为1024 MB
    
    的
    OMAP beagle_x MMC:0
    正在从 FAT...加载环境 ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... MMC Device 1 not found
    *** Warning - No MMC card found,using default environment
    
    ***-> This Board is unknown
    
    晚期初始
    
    化2a invalid
    
    MMC device
    晚期初始化2b
    
    end of 晚期初始化
    
    网络:找不到以太网。
    按任意键停止自动引导:0
    => setenv bootargs console=ttyS2、115200 leyprintk loglevel=3 mem=0x40000000 loglevel=7
    =>加载 MMC 0:1 0x88000000 sec4.DTB
    90426字节在6ms (14.4 MIB/s)内读取
    =>在映像中加载 MMC 0:1 0x82000000.0008
    字节(4208300mB/s)
    => bootz 0x82000000 - 0x88000000
    ##平展设备树 blob,88000000使用
    0x88000000的 FDT blob 启动
    正在将设备树加载到8ffe6000,结束8ff139... 确定
    
    启动内核...
    
    [0.000000]在物理 CPU 上引导 Linux 0x0
    [0.000000] Linux 版本4.19.38-rt19 (Rene@Ubuntu)(gcc 版本8.3.0 (A 配置文件架构的 GNU 工具链8.3-2019.03 (arm-rel-8.36))) 9
    [0.000000] CPU:ARMv7处理器[412fc0f2]修订版2 (ARM30cr v7
    (可用代码:
    )[0.38dV cr = 0.0000.c: PIPT / VIPT 非混叠数据高速缓存、PIPT 指令高速缓存
    [0.000000](共:FDT):机器型号:TI AM5728 BeagleBoard-X15
    [0.000000]启用了引导控制台[earlycon0]
    的[0.000000]内存策略:数据高速缓存 writealloc
    [0.000000] EFI:从 FDT 获取 EFI 参数:
    [0.000000]未找到 UEFI:
    [0.000000]保留存储器:创建了0x000095800000处的 CMA 存储器池、大小为56 MIB
    [0.000000]、共:保留存储器:初始化节点 ipu2-memory@95800000、兼容 ID shared-dma-pool
    [0.000000]保留存储器:创建了0x000099990000处的 CMA 存储器池、大小为64 mib
    [0.000000]、共:保留存储器: 已初始化节点 dsp1-memory@99000000、兼容 id sharedma-pool
    [0.000000]保留内存:已在0x000000009d000000创建 CMA 内存池、大小为32 mib
    [0.000000] of:reserved mem: initialized node ipu1-memory@9d000000、compatible id shareddma-dma-pool
    [0.000000]保留内存:已创建 mcma 内存池、大小为0x000000、
    大小为0x000000 mcma:已保留大小为0.000000: 初始化节点 dsp2-memory@9f000000、兼容的 id shareda-dma-pool
    [0.000000] CMA:在0x0000000be400000
    [0.000000] OMAP4:将0x0000bfd00000映射到(ptrval)用于 DRAM 屏障
    [0.0000]DRA752 ES2.0
    [0.000000] random:从 start_kernel_crng+0.480]调用 get_randbytes
    :0x0000_kernel=0x0000+0.480 嵌入式15页/CPU s32288 r8192 d20960 u61440
    [0.000000]构建了1个区域列表、移动分组。 总页数:210496
    [0.000000]内核命令行:console=ttyS2,115200 adlyprintk loglevel=3 mem=0x40000000 loglevel=7
    [0.000000]条目高速缓存哈希表条目:131072 (顺序:8、1048576字节)
    [0.000000] inode 高速缓存哈希表条目:65536 (顺序:6、26000000
    字节) 提供635908K/848896K (8192K 内核代码、329K rwdata、2644K rodata、2048K init、275K BSS、 24572K 保留、188416K CMA-r)
    [0.000000]虚拟内核内存布局:
    [0.000000] 向量:0xffffff0000 - 0xffffff1000 (4KB)
    [0.000000] Fixmap:0xc00000 - 0xc00000 (3072 KB)
    [0.000000] vmalloc:0xf0800000 - 0x0x800000 (240MB)
    [0.000000] 低内存:0xC0000000 - 0xf0000000 (768 MB)
    [0.000000] pkmap:bfe00000 - 0xC0000000 (2 MB)
    [0.000000] 模块:bbbf000000 - bbfe00000 (14 MB)
    [0.000000] .text:0x (ptrval)- 0x (ptrval)(10208 KB)
    [0.0000] init:0x (ptrval)-0x (ptrval)(2048KB)
    [0.000000] .data:0x (ptrval)- 0x (ptrval)(330KB)
    [0.000000] .bss:0x (ptrval)- 0x (ptrval)(276 KB)
    [0.000000] slub:HWalign=64、order=0-3、MinObjects=0、CPU=2、Nodes =1
    [0.000000] RCU:可抢占分层实现。
    [0.000000] RCU: RCU 优先级提升:优先级1延迟500毫秒。
    [0.000000]无加速宽限期(RCU_NORMAL、After _boot)。
    [0.000000]启用了 RCU 任务。
    [0.000000] NR_IRQ:16、nr_IRQ:16、预分配 IRQ:16
    [0.000000] GIC:使用分离式 EOI/Deactivate 模式
    [0.000000] OMAP 时钟事件源:32786Hz 时的 Timer1
    [0.000000] ARI_TIMER:以6.14MHz (PHY)运行的 CP15计时器。
    [ 0.000000]时钟源:ARCH_SYS_COUNTER:MASK:0xffffffffffffffffffffff max_cycles:0x16af5adb9、max_idle_ns:440795202250 ns
    [0.000005] sched_clock:56位6MHz、分辨率162ns、每43980465FFFF23ns 翻转
    一次[0.000011]切换到 IDLE_FFFF 源
    时钟:0x99000247ns:0x0002410247ns:0x0002410FFFF:0x00024102410[0.000ns:0x0002410FF_64ns
    :0x0002410FFFF 源时钟源:0x0002410[0.83ns:0x0002410FFFF:0x 32768Hz
    [0.000706]的32K_COUNTER 控制台:彩色虚拟设备80x30
    [0.321351]校准延迟环路(跳过)、使用计时器频率计算得出的值。 12.29 BogoMips (lpj=61475)
    [ 0.321359] pid_max:默认值:32768最小值:301
    [ 0.321495]安装高速缓存散列表条目:2048 (顺序:1、8192字节)
    [ 0.321503]安装点高速缓存散列表条目:2048 (顺序:1、8192字节)
    [ 0.322v2缓冲区:
    CPU 虚拟化代码:0:0.2224] CPU 测试 使用 ICIALU 权变措施
    [0.322499]/cpus/cpu@0 missing clock-frequency property
    [0.367450]/cpus/cpu@1 missing clock-frequency property
    [0.372904] CPU0:Thread -1、CPU 0、socket 0、mpidr 8000000000
    [0.430219]为0x80200000 - 0x80200060
    [ 0.450192 SRCU 分层实施设置静态标识映射。
    [0.510710] EFI 服务将不可用。
    [0.530327] SMP:启动辅助 CPU ...
    [0.650737] CPU1:线程-1、CPU 1、插槽0、mpidr 80000001
    [0.650741] CPU1:sp幽灵 v2:使用 ICIALLU 变通办法
    [0.650871] SMP:显示1个节点、2个 CPU
    [0.666153] SMP:总共激活2个处理器(24.59 BogoMips)。
    [0.672500] CPU:所有 CPU 均在 HYP 模式下启动。
    [0.677233] CPU:提供虚拟化扩展。
    [0.683060] devtmpfs:已初始
    化[0.715447] VFP 支持 v0.3:Implementor 41架构4第30部分变体 f rev 0
    [0.72364]时钟源:jiffies:mask:0xFFFFFFFF max_cycles:0xFFFFFFFF、max_idle_idle_00ns:19112604462750000 ns
    [ 0.733727]时钟源:0xFFFFFFFF max_cycles:32768 (512字节)、intrl 3bytes:512 p3bytes:512 (512)
    初始化的 pinctrl 子系统
    [0.749477] DMI 不存在或无效。
    [0.753926] NET:注册协议系列16
    [0.761234] DMA:预分配的256 KiB 池用于原子相干分配
    [0.769203] OMAP_hwmod:L3_MAIN_2使用来自 OCP
    的断开 dt 数据[0.902698] OMAP-hwmod:GPU:_wait_target_ready 失败:-16
    [ 0.908419]无法
    为 OMAP-hwmod 重置[0.983]进行故障处理[0.1441][0.98mod][0.98mod][+hmod:无法处理[0.98mod3:无法为 OMAP- 异步外部中止(0x1211)在0x00000000
    [0.981445] PgD =(ptrval)
    [0.981449][000000000000]*PgD=80000080004003,*PMD=00000000
    [0.981460]内部错误:1211 [#1] PREMP SMP ARM
    [0.981463]链接的模块:[0.981474]硬件
    
    名称:[0.981474]未被污染[0.981474] 通用 DRA74X (平展设备树)
    [ 0.981485] PC 位于_enable_sysc+0x5c/0x25c
    [ 0.981490] LR 位于_enable_sysc+0x48/0x25c
    [ 0.981494] PC:[ ] LR:[ ] PSR:40000013
    [0.981497] sp:ef0a1e38 IP:ef0a1e38 FP:ef0a1e64
    [0.981500] R10:c0e58320 R9:c0e48824 R8:00000000
    [0.981504] r7:c1012900 r6:00000000:c1004812r4
    :c104812r4:c12r3:c104812r4:c12r4:c12r3:c1048r4:c12r3:c10r4 00000078 r0:c10123e8
    [0.981512]标志:模式 SVC_32 ISA ARM 段上 FIQ 上的 nZcv IRQ 用户
    [0.981516]控制:30c5387d 表:80003000 DAC:fffffffd
    [0.981519]处理 swapper/0 (pid:1、stack limit =0x = 0x)
    [0x981523](0.981520)[0.981523]处理堆栈[0.981523](pid)[0.981523]
    c0224e90 c09b9e08
    [ 0.981533] 1e40:ef0a1e64 b3a39597 c10123e8 c1052c10 00000000 c1012900 ef0a1e8c c0ef0a1e68
    [ 0.981538] 1e60:c021d8c021d8e08240 c100e01280 c100c 1e01280
    e0e0e02480 c100e0e0c100c 1e1e0e0c0e0c02480 e0c0c0c100c0c0c100c0c100c0c0c100c0c0c100c0c0c100c0c100c0c100c0c0c100c0c100c0c0c0c0c100c0c0c100c100c0c0c0ffe0c100c0ffe0c0c0c100c1
    
    c10525c0 c1007488 ef0a1f4c ef0a1ed8 c02023fc c0e0cef0 00000000 c0b460
    [ 0.981559 ] 1e0:c0bbb440 c0b400 c0bc6a597 c1007488 00000000 c0b0b00000002 00000002 [0.98150418601c400c0b40f 1000004 c01000004 c1000002
    00000002 00000002 00000002 c100240001 00024000240001c100240001c1000001
    00040 c0240001c100240001c1000001c1000001c1000001c10000040 c0240001c1000001c1000001c1000001c1000001c1000001c1000001c1000001c10000040 c02460f 1000001c1000001c1000001c1000001
    ef0a1f94 ef0a1f50 c001048 c0202384 00000002 00000002 00000000 c0e004f0
    [0.981579] 1f60:c0c933f0 000000d1 c09b9e00000000 c09b4c88 00000000 0000000000000000 000000000008 [0.981584]
    1f80:00000000 00000000 0000000080000000000 0001f00000000 0001f00000000 c00000000
    0000000080000000000 0001f00000001f00000000 0001f00000000 000080000000001f00000000 0001f00000000 00080000000001f00000000 0008000001f00000000 000080000000001f00000000 00080000000001f00000000 000080000000001f00000000 00080000080000000008000000000800000000080000000008000001f00000001
    00000000 00000000 00000000
    [0.981598] 1fe0:00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 00000000
    [0.981599]回溯:
    [0.981610][ ](_enable_sysc)从[ ](_ENABLE+0x158/0x284)
    [ 0.981616] r7:c1012900 R6:00000000 R5:c1052c10 R4:c10123e8
    [ 0.981623][ ](_enable)从[ ](_setup.part.16+0x1c0/0x4e0)
    [0.981628] r7:c1012420 r6:c1007488 r5:c101240c r4:c10123e8
    [ 0.981639][ ](_setup.part.16)、来自[ ](__omap_hwmod_setup_All+0x120/0x134)
    [0.981644] r7:c0e0ce4 r6:ffe000 r5:c100c728 r4:c10123e8
    [0.981653][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [ 0.981657] R5:c1007488 R4:c10525c0
    [ 0.981664][ ](多个_initcall)、来自[ ](kernel_init_freeede+0x214/0x2a8)
    [0.981669] r8:c0e48844 r7:c0e004f0 r6:c10525c0 r5:c10525c0 r4:00000003
    [0.981679][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [0.981685] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b4c88
    [0.981687] r4:00000000
    [0.981695][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [0.981698]异常堆栈(0xef0a1fb0至0xef0a1ff8)
    [0.981702] 1fa0: 00000000 00000000 00000000 00000000
    [0.981707] 1fc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [0.981711] 1fe0:00000000 00000000 00000000 00000013 00000000
    [0.981714] R5:c09b4c88 R4:00000000
    [0.981720]代码:e3130080 1a000067 e5943004 e1a00004 (e5942044)
    [1.345251]
    -尝试终止中断00000001 -中断异常中断 exitcode=0x0000000b
    [ 1.345320]
    [ 1.345329] CPU1:停止
    [ 1.345336] CPU:1 PID:0 Comm:swapper/1被污染:g D 4.19.38-rt19 #1
    [1.345338]硬件名称:通用 DRA74X (平展设备树)
    [1.345340]背板:
    [1.345352][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.345359] r7:fa212000 r6:60000193 r5:00000000 r4:c10505a4
    [1.345370][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 1.345378][ ](dump_stack)从[ ](handle_ipi+0x1bc/0x22c)
    [1.345382] r7:fa212000 r6:00000001 r5:00000000 r4:c1052840
    [1.345392][ ](handle_ipi)从[ ](GIC_Handle_IRQ+0x94/0x98)
    [1.345396] R6:fa21200c R5:c102707c R4:c100796c
    [1.345403][ ](GIC_Handle_IRQ)、来自[ ](__IRQ_Svc+0x58/0xa0)
    [1.345406]异常堆栈(0xef0cff28至0xef0cff70)
    [1.345411] ff20: 00000000 0000018c 00000000 c021a140 ffe000 c10074bc
    [1.345417] ff40:c1007504 00000002 00000001 c10521d6 c0bbbc84 efc84 efff84 ef0cff88 c0ff0cff78
    [1.345420] ff60:c0208bf8 c6008 r4
    :cff8 cffr 0006 cffr 1:cff8 cff8 cffr 0006 cffr 1:cffr 0006 cffr 1:cffr 0006 cff4 cff8 cff4 cff8 cffr 0006 cffr 1:cff4 cff4 cff4 cff4 cff4 cff4 cffr 1
    ](arch_cpu_idle)从[ ](DEFAULT_IDLE_CALL + 0x34/0x40)
    [1.345444][ ](DEFAULT_IDLE_CALL)从[ ](do_idle+0x110/0x180)
    [ 1.345450][ ](DO 空闲)从[ ](cpu_startup_entry+0x20/0x24)
    [1.345454545456] r10:00000000 r9:412fc0f2 r8:80007000 r7:c1052848 r6:00000001 r5:ef0ce000
    [1.3454545454545459] r4:00000086 r3:ef0ce000
    [1.345467][ ](CPU_STARTUP_INPUK)、来自[ ](secondary _start_kernel+0x178/0x180)
    [1.345473][ ](secondary _start_kernel)从[<8020210c>](0x8020210c)
    [1.345477] r7:c1052848 r6:30c0387d R5:00000000 r4:af0771c0
    

    arch/arm/boot/dts/am57xx-beagle-x15.dts:

    //
    *版权所有(C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
    *
    此程序是免费软件;您可以根据
    
    免费软件基金会*发布的 GNU 通用公共许可证版本2的条款重新分发和/或修改*。
    //
    
    #include "am57xx-beagle-x15-common.dtsi"
    
    /{
    /*注意:这说明了"原始"预量产 A2版本*/
    型号="TI AM5728 BeagleBoard-X15";
    }
    
    ;&mmc1{
    pinctrl-names ="default"、"hs";
    pinctrl-0=<_mctr-1>;<mmctrl1> pins_default>;pinctrlcs_pensor&nings.1<_pintrlcs_pines&nings.1>
    
    
    
    NO-1-8-v;
    }
    
    ;&mmc2{
    status ="disabled";
    }
    
    ;&GPU{
    status ="disabled";
    };
    
    
    &tpd12s015{
    status ="disabled";
    };
    
    
    //勘误表 i880 "以太网 RGMII2限制为10/100Mbps"*
    /&dt1{
    status ="disabled";
    max-speed =<100mese-evm"
    ;
    
    #mem-57mus"} 

    这里是 DTB 转换的完整 DTS 文件。

    /DTS-v1/;
    
    /{
    #address-cells =<0x2>;
    #size-cells =<0x2>;
    compatible ="ti、am572x-beagle-x15"、"ti、am5728"、"ti、dra742"、 "TI、dra74"、"ti、dra7";
    interrupt-parent =<0x1>;
    模型="TI AM5728 BeagleBoard-X15";
    
    选择的{
    stdout-path ="/ocp/serial
    
    
    
    
    
    /ocp/i2c@48020000";};别名{i2c0 ="/ocp/i2c
    /ocp/i2c@48070000";i2c1 ="/ocp/i2c@48072000";"i4802c4
    ="i2c4000@48027000";"i2c4 =/ocp/i2c@4802c";"i2c4000 ="i4802c"="i2c4000@4802c"
    Serial0 ="/ocp/serial@4806a000";
    SERIAL1 ="/ocp/serial@4806c000";
    SERIAL2 ="/ocp/serial@48020000";
    serial3 ="/ocp/serial@4806e000";
    serial4 ="/ocp/serial@48066000";
    serial5 ="/ocp/serial@48068000";
    serial6 ="/ocp/serial@4842000";
    serial7 ="/ocp/serial@48422000";
    serial8 ="/ocp/serial@48424000";
    serial9 ="/ocp/serial@4ae2b000";
    Ethernet0 ="/ocp/ethernet@48484000/从器件@48480200";
    ethernet1 ="/ocp/ethernet@48484000/从器件@48480300";
    D_CAN0 ="/ocp/can@4ae3c000";
    D_CAN1 ="/ocp/can@480000";
    spi0 ="/ocp/qspi@4b300000";
    rpro0 ="/ocp/ipu@58820000";
    rpro1 ="/ocp/ipu@55020000";
    rpro2 ="/ocp/dsp@40800000";
    rpro3 ="/ocp/dsp@41000000";
    rtc0 ="/ocp/i2c@48060000/RTC@6F";
    RTC1 ="/ocp/i2c@48070000/tps659038@58/tps659038_RTC";
    rtc2 ="/ocp/rtc@48838000";
    display0 ="/connect";
    sound0 ="/sound0";
    sound1 ="/ocp/dss@58000000 /编码器@58060000";
    };
    
    定时器{
    兼容="arm、armv7-timer";
    中断=<0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xA 0x308>;
    中断父级=<0x2>;
    };
    
    中断控制器@48211000{
    兼容="arm、cortex-a15-GIC";
    中断控制
    器=<0x3>单元;中断控制器= 0x3>单元;
    REG =<0x0 0x48211000 0x0 0x1000 0x0 0x48212000 0x0 0x2000 0x0 0x48214000 0x2000 0x0 0x48216000 0x2000>;
    中断=<0x1 0x9 0x304>;
    中断父级=<0x2>;
    相位=<0x2>;
    
    
    中断控制器@48216000 0x1000
    
    
    = 0x480-0;
    
    中断母体= 0x1000;中断#omag4 = 0x1000;中断#wugu-0x1000 = 0x1000;中断-omapi-parent = 0x1000;中断-omap4 = 0x1000 = 0x1000;中断#wugu-0x1000;中断#omapi-cells = 0x1000
    phandle =<0x8>;
    };
    
    CPU{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    CPU@0{
    device_type ="CPU";
    compatible ="arm、cortex-a15";
    reg =<0x0>;
    operating points-v2 =<0x3>;
    Clocks =<0x4>;
    时钟名称="CPU";
    时钟延迟=<0x493e0>;
    #Cooling-Cells =<0x2>;
    VBB-SUPPLY =<0x5>;
    VDD-SUPPLY =<0x6>;
    电压容差=<0x1>;
    相位=<0xdb>;
    };
    
    CPU@1{
    device_type ="cpu";
    compatible ="arm、cortex-a15";
    reg =<0x1>;
    operating points-v2 =<0x3>;
    Clocks =<0x4>;
    时钟名称="CPU";
    时钟延迟=<0x493e0>;
    #Cooling-Cells =<0x2>;
    VBB-SUPPLY =<0x5>;
    };
    };
    
    opp-table{
    compatible ="操作点-v2-ti-cpu";
    SYSCON =<0x7>;
    opp-shared;
    phandle =<0x3>;
    
    opp_nom-1000000000{
    opp-Hz =<0x0 0x3b9aca00>;
    opp-microsuspend =<0x102100000000
    
    
    
    
    ;0x1180=0x8bcoff-0x8100810060 = 0x100;0x8bc100b1b= 0x8b1300>;0x8bc100b1b1bc100b = 0x340
    
    = 0x8b1b1b1b1350>;0x8bc100b1b1b1b1bcb = 0x8bcb = 0x8bcb = 0x100b = 0x100b = 0x100b = 0x100b = 0x340;0x100b = 0x100b = 0x100b = 0x100
    opp-supported-HW =<0xff 0x2>;
    };
    
    opp_high@1500000000{
    opp-Hz =<0x0 0x59682f00>;
    opp-microvolt =<0x127690 0xe7ef0 0x127690 0xe7ef0 0xe7ef0 0x1312d0>;opp-microfv =<0x127690
    
    
    
    
    
    
    
    
    
    
    = 0xti;}"mpu";"amp-us"
    
    
    
    
    = 0xd";"ame";"amoti-fus";"ame"= 0xti-fus";"am";"amus";"amus-mus";"amus"= 0xti-fus";"amus";"amus";"amus-mos";"amus-mos"= 0xti-fus";"amus";"ame"
    #size-cells =<0x1>;
    ranges =<0x0 0x0 0x0 0xC0000000>;
    ti、hwmods ="L3_main_1、"L3_main_2;
    reg =<0x0 0x44000000 0x0 0x1000000 0x0 0x45000000 0x1000>;
    interrupts-extended =<0x1 0x0 0x4 0x4000000
    
    @
    = 0x4000000;0x4000000
    = 0x4000000 0x4a cells 0x4 = 0x4000000;0x4000000 0x4a-cells 0x4 = 0x4c1;0x4000000 0x4000000 0x4c1;#c1 0x4c1 0x4c1 0x4c1 0x4c1;#scr1s 0x4r1s 0x4r1s 0x4r
    
    
    
    SCM@2000{
    Compatible ="ti、dra7-SCM-core"、"simple-bus";
    reg =<0x2000 0x2000>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    Ranges =<0x0 0x2000 0x2000>;
    
    SCM_conf@0{
    compatible ="SYSCON"、"simple-bus";
    reg
    
    =
    0x1400 cells = 0x0>;#0x140-cells
    = 0x0>;ranges = 0x140-0>;<0x140-cells = 0x0>;#cells = 0x140-cells = 0x0>;#.0x0>
    
    pbias _regulator@e00{
    compatible ="ti、pbias -dra7"、"ti、pbias -omap5";
    reg =<0xe00 0x4>;
    SYSCON =<0x9>;
    
    pbias _mmc_omap5{
    regulator 名称="pbias _mmc_omap5";
    regulator -min-microregulator =<0x1bagle>
    
    ;}<0x325-volt = 0x7740>;volt = 0x7740V
    
    };
    
    时钟{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    dss_shdcp_clk@558{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0xA>;
    ti、bit-shift =<0x0>
    ;reg =<0x558>;
    };
    
    ehrpwm0_TBCLK@558{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0xb>;
    ti、bit-shift =<0x14>;
    reg =<0x558>;
    phandle =<0xCf>;
    };
    
    ehrpwm1_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xb>;
    ti、bit-shift =<0x15>;
    reg =<0x558>;
    phandle =<0xd0>;
    };
    
    ehrpwm2_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xb>;
    ti、bit-shift =<0x16>;
    reg =<0x558>;
    phandle =<0xD1>;
    };
    
    sys_32k_ck{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0xc 0xd 0xd 0xd>;
    ti、bit-shift =<0x8>;
    reg =<0x6c4>;
    phandle =<0x50>;
    };
    };
    };
    
    pinmux@1400{
    compatible ="ti、dra7-padconf"、"pinctrl-single";
    reg =<0x1400 0x468>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    #pinctrl-cells =<0x1>;
    #interrupt-cells =<0x1>;
    中断控制器;
    pinctrl-single、寄存器宽度=<0x20>;
    pinctrl-single、函数掩码=<0x3fffffff>;
    phandle =<0x8e>;
    
    mmc1_PINS_DEFAULT{
    pinctrl-single、引脚= 0x364 0x60000 0x35600 0x60000 0x368e
    0x60000 0x60000
    ;0x3680x3680x60000 0x3680x600cle = 0x6000x3680x600c00 0x600c00 0x600c00;0x3680x368c00 0x368c00 0x600c00 0x368c00 0x600c00 0x368c00 0x600c00 0x368c00 0x368c1 0x600c1 0x368c1 0x600c1 0x368c1 0x600c1
    
    
    
    
    
    mmc1_PINS_hs{
    pinctrl-single、pins =<0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>;
    phandle = 0x3640x601b0;
    };
    
    mmc1_pins_s25 0x601b0 0x601b0
    0x601b0 0x358b0 0x601b0 0x601b0 0x601b0 0x601b0 0x601b0 0x364b0 0x60b0 0x60b0 0x60b0 0x601b0 0x364b0 0x601b0 0x60b0 0x
    
    
    mmc1_PINs_sdr50{
    pinctrl-single、pins = 0x354 0x601a0 0x358 0x601a0 0x35c 0x601a0 0x360 0x601a0 0x364 0x601a0 0x368 0x601a0 0x368 0x601a0>;
    };
    
    mmc1_PIN_Ddr50{
    pinctrl 0x60100 0x60100
    
    
    0x35860
    0x360 0x360 0x360 0x60100 0x360 0x3640x60100 0x60100 0x60100 0x3640x60100 0x60100 0x60360 0x60100 0x60360 0x3640x60100 0x60100 0x60350 0x60100 0x60100 0x60350 0x60100 0x60100 0x60350 0x60350 0x60100 0x60350 0x60100 0x60350 0x60100 0x60350 0x60100 0x60100 0x60350 0x60100 0x60
    };
    
    mmc2_PINS_DEFAULT{
    pinctrl-single、PINS =<0x9C 0x60001 0xb00x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
    phandle =<2>;
    }
    
    mmc2_PINs_hs{
    pinctrl-single、pins =<0x9C 0x60001 0xbb00x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
    };
    
    mmc2_pins 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60C 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x
    
    
    
    mmc2_PINS_DDR_1_8v_rev11{
    pinctrl-single、PINS =<0x9C 0x60101 0x60101 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x60101 0x90 0x60101 0x94 0x60101 0x60101>;
    0x60001
    
    0x6000001 0x6000001 0x0001_0x6000001 0x0001 0x6000001 0x0001 0x6000001 0x0001 0x0001_0x6000001 0x0001 0x0001 0x0001 0x0001_0x6000001 0x0001 0x0001 0x0001 0x0001 0x6000001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x600
    
    
    
    mmc2_PINS_HS200{
    pinctrl-single、PINS =<0x9C 0x60b1010 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0x8c 0x60101 0x60101 0x60101 0x94 0x60101 0x98 0x60101>;
    }MMC4_PINS 0x60103
    
    
    0x603c 0x60103c 0x601030x6008 0x60103c 0x60103 0x60103fc 0x601030x601030x601030x603ctrl 0x601030x601030x601030x1030x1030x601030x1030x6030x30x6030x30x603
    
    
    MMC4_PINS_hs{
    pinctrl-single、PINS =<0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x60103 0x60103 0x3fc 0x60103>;
    };
    
    mmc3_PINS_DEFAULT{
    pinctrl-single、PINS =<0x37c 0x60000 0x60000 0x38400 0x600C 0x60000 0x38400 0x38400 0x60000 0x38400 0x38400 0x60000 0x38400
    
    
    0x38400 0x38400 0x600C 0x60000 0x38400
    0x38400 0x38400 0x38400 0x60000 0x38400 0x38400 0x38400 0x38400 0x38400 0x38400 0x38400 0x600C 0x600C 0x60000 0x38600 0x38600 0x38400 0x38400 0x38600 0x38
    };
    
    mmc3_PINs_sdr12{
    pinctrl-single、pins =<0x37c 0x60000 0x380 0x60000 0x384 0x60000 0x388 0x60000 0x38c 0x60000 0x390 0x60000>;
    };
    
    mmc3_PINs_sdr25{
    pinctrl-single、pins =<0x37c 0x60000 0x60000 0x3880000x60000 0x3840 0x3840 0x60000 0x3838 0x60000 0x3840 0x3838 0x60000 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840
    
    
    mmc3_PINs_sdr50{
    pinctrl-single、pins =<0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
    };
    
    mc4_PINs_sdr12{
    pinctrl–single、pctrl =<0xinc8 0x60103 0x60103 0x3603 0x3604 0x603c 0x603c 0x60103 0x603c 0x603c 0x603c 0x603c 0x60103c 0x603c 0x603c 0x603c 0x603c 0x103c 0x60103c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x103c
    
    
    
    
    };
    };
    
    SCM_conf@1c04{
    compatible ="SYSCON";
    reg =<0x1c04 0x20>;
    #SYSCON-cells =<0x2>;
    phandle =<0x88>;
    };
    
    SCM_conf@
    
    
    
    
    
    @1c24{compatible ="SYSCON";reg =<0x1c24 0x24>;phandle = 0x78>;dma-dma = 0x78>;bdma-dma = 0x78>;bdma-dma-dma = 0x78>;bdma-dma = 0x78>
    
    
    
    
    
    dma-masters =<0xe>;
    phandle =<0x8d>;
    };
    
    dma-router@C78{
    兼容="ti、dra7-dma-crossbar";
    reg =<0xc78 0x7c>;
    #dma-cells =<0x2>;
    dma-requests =<0xcc>;
    ti、dma-safe-map =<0x0>;
    dma-ma-masters =<0xF>;
    phandle =<0xc3>;
    };
    };
    
    cm_core_aon@5000{
    compatible ="ti、dra7-cm-core-aon"、"simple-bus";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    reg =<0x5000 0x2000>;
    ranges =<ti 0x0000x000x0>
    
    
    
    
    
    
    
    ;<clock-clocks=<x0>;<locks<x0>
    
    
    };
    
    atl_clkin1_ck{
    #clock-cells =<0x0>;
    compatible ="ti,dra7-atl-clock";
    clock =<0x10 0x0 0x1a>;
    phandle =<0xc5>;
    };
    
    atl_clkin2_ck{
    #clock-cells =<0x0>;
    compatible ="ti,7-cells"
    
    
    ;<0x1cock-clock<0x1<clock<x0<x0>
    
    
    
    
    ;atlock<clock-clock<0x1<x<x0<x0>;atl=<clock-clock<cl<x<x<x0x0<atlock<atlock<x<x0>;atlock<atlock<x
    phandle =<0xc7>;
    };
    
    HDMI_CLKIN_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    phandle =<0x30>;
    };
    
    MLB_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x81>;
    };
    
    mlbp_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>;
    phandle =<0x82>;
    };
    
    pciesref_acs_clk_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x5f5e100>;
    phandle =<0x40>;
    };
    
    Ref_clkin0_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    };
    
    ref_clkin1_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>;
    }
    
    ref_clkinscell-cock-cells =<0x0>
    
    
    
    
    
    
    ;<clock-clock-cock-cells = 0x0>
    
    
    
    
    RMII_clk_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    };
    
    sdvenc_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>
    
    
    
    
    
    
    
    ;};secure_32k_clock-clk_clock-cells = 0x8000;<clock-clock-cells = 0x8000;<clock-clock-cells = 0x000>
    
    SYS_clk32_crystal_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x8000>;
    phandle =<0xc>;
    };
    
    SYS_clk32_pseude_ck{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x11>;
    clock-mult =<0x1>;
    clock-div =<0x262>;
    phandle =<0xd>;
    };
    
    virt_12000000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0xb71b00>;
    phandle =<0x59>;
    };
    
    virt_13000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0xc65d40>;
    };
    
    virt_16800000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x1005900>;
    phandle =<0x5b>
    ;
    
    virt_19200000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x124f800>;
    phandle =<0x5c>;
    };
    
    virt_20000000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1312d00>;
    phandle =<0x5a>;
    };
    
    virt_26000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x18cba80>;
    phandle =<0x5d>;
    };
    
    virt_27000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x19bfcc0>;
    phandle =<0x5e>;
    };
    
    virt_38400000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x249f000>;
    phandle =<0x5f>;
    };
    
    SYS_clkin2{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1588800>;
    相位=<0x60>;
    };
    
    USB_OTG_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x68>;
    };
    
    video_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x3a>;
    };
    
    video_m2_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock frequency =<0x0>;
    phandle =<0x2F>;
    };
    
    VIDEO2_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x3b>;
    };
    
    VIDEO2_M2_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x2e>;
    };
    
    DPLL_AAB_CK@1e0{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-m4xen-cock";
    时钟=<0x12 0x13>;
    reg =<0x1e0 0x1e4 0x1ec 0x1e8>;
    分配时钟=<0x14>;
    分配时钟速率= 0xf080>;
    
    
    
    DPLL_AE_x2_ck{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-x2-clock";
    时钟=<0x14>;
    phandle =<0x15>;
    };
    
    DPLL_ABE_M2x2_ck@1f0{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x15>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1f0>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    phandle =<0x16>;
    };
    
    Abe_clk@108{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x16>;
    ti、max-div =<0x4>;
    reg =<0x108>;
    TI、索引-二进制功率;
    相位=<0x62>;
    };
    
    DPLL_AAB_M2_CK@1f0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x14>;
    ti、max-div =<0x1f>;
    ti、自动空闲-移位=<0x8>;
    reg =<0x1f0>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    phandle =<0x64>;
    };
    
    DPLL_AABE_m3x2_ck@1f4{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x15>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1F4>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x17>;
    };
    
    DPLL_CORE_BYP_MUx@12c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x12c>;
    phandle =<0x18>;
    };
    
    DPLL_CORE_CK@120{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-CORE-clock";
    Clocks =<0x11 0x18>;
    reg =<0x120 0x124 0x12c 0x128>;
    phandle =<0x19>;
    };
    
    DPLL_CORE_x2_ck{
    #clock-cells = 0x19>
    
    ;clock-clock-cells
    
    = 0x19>;}
    
    DPLL_CORE_h12x2_ck@13c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x13c>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x1b>;
    };
    
    MPU_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clock=<0x1b>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x1c>;
    };
    
    DPLL_MPU_ck@
    
    
    
    
    
    
    
    @160{#clock-cells =<0x0>;compatible ="ti、omap5-MPU-DPLL-clock";Clocks =<0x11 0x1m2>;reg =<0x160 0x164 0x16c 0x168>;phandle =<ti 0x4>;}<ti 0x1mcock_cock<1mcy=<t<1mcock-r>
    
    ;<tid<1mcock-r=<1mcock<1mcy<1d<1d<1d<1mcy_dr>;
    
    
    
    reg =<0x170>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x1d>;
    };
    
    MPU_dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x1d>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    相位=<0x6f>;
    };
    
    DSP_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1b>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x1E>;
    };
    
    DPLL_DSP_BYP_mux@240{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x1E>;
    ti、bit-shift =<0x17>;
    reg =<0x240>;
    phandle =<0x1f>;
    };
    
    DPLL_DSP_CK@234{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x11 0x1f>;
    reg =<0x234 0x238 0x240 0x23c>;
    Assigned Clocks =<0x20>;
    Assigned Clock-RATES =<0x23c34600>;
    phandle = 0x20
    ;}
    
    DPLL_DSP_m2_ck@244{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x20>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x244>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    分配的时钟=<0x21>;
    分配的时钟速率=<0x23c34600>;
    PHANDLE =<0x21>;
    };
    
    IVA_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1b>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x22>;
    };
    
    DPLL_IVA_BYP_mux@1ac{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x22>;
    ti、bit-shift =<0x17>;
    reg =<0x1ac>;
    phandle =<0x23>;
    };
    
    DPLL_IVA_CK@1a0{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-clock";
    时钟=<0x11 0x23>;
    reg =<0x1a0 0x1a4 0x1ac 0x1a8>;
    分配的时钟=<0x24>;
    分配的时钟速率=<0x45724>;
    
    }
    
    DPLL_IVA_m2@1b0{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x24>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1b0>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    分配的时钟=<0x25>;
    分配的时钟速率=<0x17257f16>;
    phandle =<0x25>;
    };
    
    IVA_dclk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x25>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x71>;
    };
    
    DPLL_GPU_BYP_mux@2e4{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x2e4>;
    phandle =<0x26>
    ;}
    
    DPLL_GPU_CK@2d8{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-clock";
    时钟=<0x11 0x26>;
    reg =<0x2d8 0x2dc 0x2e4 0x2e0>;
    分配的时钟=<0x27>;
    分配的时钟速率=<0x4c1dle>
    
    ;}
    
    DPLL_GPU_m2_ck@2e8{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x27>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2e8>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    分配的时钟=<0x28>;
    分配的时钟速率=<0x195f286b>;
    phandle =<0x28>;
    };
    
    DPLL_CORE_m2_ck@130{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x130>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x29>;
    };
    
    core_DPLL_OUT_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x29>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x73>;
    };
    
    DPLL_DDR_BYP_mux@21c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x21c>;
    phandle =<0x2a>;
    };
    
    DPLL_DDR_CK@210{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x11 0x2a>;
    reg =<0x210 0x214 0x21c 0x218>;
    phandle =<0x2b>;
    };
    
    DPLL_DDR_m2_ti@220 <
    时钟=<clock-cells =<0x2b
    
    
    ;ti-cells
    =<0x2ble<0x2b;<clock =<0x2b<0x2b>;<id-cyclock-clock-cy<0x2<0x2d<0x2d>;<
    reg =<0x220>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x65>;
    };
    
    DPLL_GMAC_BYP_MUx@2B4{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x2b4>;
    phandle =<0x2C>;
    };
    
    DPLL_GMAC_CK@
    
    
    
    
    
    
    
    @2a8{#clock-cells =<0x0>;compatible ="ti、OMAP4-DPLL";Clocks =<0x11 0x2c>;reg =<0x2a8 0x2ac 0x2b4 0x2b0>;phandle =<0x2D>;};dpll_gMAC_clock<0x2m8>
    ;auto-shock<0x2mcle
    
    
    = 0x2m8>;<0x2d-div>;<0x2mcock-clock<0xd= 0x2m8>;<0xd= 0x2m8<xd<xd<xds-dle>;ti-cock<0xdle>
    
    reg =<0x2b8>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x66>;
    };
    
    VIDEO2_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x2e>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x75>;
    };
    
    video_1_dclk_ddiv{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x2F>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x76>;
    };
    
    HDMI_dclk_ddiv{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x30>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x77>;
    };
    
    PER_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x17>;
    时钟多路复用=<0x1>;
    Clock-div =<0x2>;
    PHANDLE =<0x43>;
    };
    
    USB_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x17>;
    时钟多路复用=<0x1>;
    Clock-div =<0x3>;
    PHANDLE =<0x47>;
    };
    
    EV_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1b>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x31>;
    };
    
    DPLL_EVE_BYP_mux@290{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x31>;
    ti、bit-shift =<0x17>;
    reg =<0x290>;
    phandle =<0x32>;
    };
    
    DPLL_EIV_CK@284{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x11 0x32>;
    reg =<0x284 0x288 0x290 0x28c>;
    phandle =<0x33>;
    };
    
    DPLL_EIV_m2_ti@
    
    auti{#clock-cells = 0x33>;dock-cells =
    
    <0x33>;<id-cock-cock-cyclock<0x33>;<idr = 0x33>;<idr = 0xdock = 0xdle<0xdle<0xdle>;
    
    reg =<0x294>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x34>;
    };
    
    EVE_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x34>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x80>;
    };
    
    DPLL_CORE_h13x2_ck@140{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autidle-shift =<0x8>;
    reg =<0x140>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    };
    
    DPLL_core_h14x2_ck@144{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x1a>;
    ti、max-div =<0x3f>;
    ti、auto-shift =<0x8>
    reg =<0x144>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x51>;
    };
    
    DPLL_CORE_h22x2_ck@154{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x154>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x3D>;
    };
    
    DPLL_CORE_h23x2_ck@158{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x158>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x56>;
    };
    
    DPLL_CORE_h24x2_ck@15c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x15c>;
    ti、index-starts-on-one;
    ti、反转自动空闲位;
    };
    
    DPLL_DDR_x2_ck{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x2b>;
    phandle =<0x35>;
    };
    
    DPLL_DDR_h11x2_ck@228{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x35>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x228>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    };
    
    DPLL_DSP_x2_ck{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-cock";
    Clocks =<0x20>;
    phandle =<0x36>;
    };
    
    DPLL_DSP_m3x2_ck@248{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x36>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x248>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    分配的时钟=<0x37>;
    分配的时钟速率=<0x17d78400>;
    相位=<0x37>;
    };
    
    DPLL_GMAC_x2_ck{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-x2-cock";
    时钟=<0x2D>;
    相位=<0x38>;
    };
    
    DPLL_GMAC_h11x2_ck@2c0{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x38>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c0>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x39>;
    };
    
    DPLL_GMAC_h12x2_ck@2c4{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x38>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c4>;
    ti、index-starts-on-one;
    ti、反转自动空闲位;
    };
    
    DPLL_GMAC_h13x2_ck@2c8{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    clocks =<0x38>;
    ti、max-div =<0x3f>;
    autobrand-shift =<0x8>;
    reg =<0x2c8>;
    ti、index-starts-at-one;
    ti、inver-autobide-bit;
    phandle =<bb5>;
    };
    
    DPLL_GMAC_m3x2_ck@2bc{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x38>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2bc>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    };
    
    gmii_m_clk_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x39>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    };
    
    HDMI_clk2_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x30>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    HDMI_div_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x30>;
    时钟多项=<0x1>;
    时钟 div =<0x1>;
    };
    
    L3_iclk_div@100{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    ti、max-div =<0x2>;
    ti、bit-shift =<0x4>;
    reg =<0x100>;
    时钟=<0x1b>;
    ti、索引-二进制功率;
    phandle =<0xA>;
    };
    
    L4_ROOT_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因数-时钟";
    时钟=<0xA>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    phandle =<0xb>;
    };
    
    video/clk2_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x3a>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    };
    
    video_div_clk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x3a>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    video2_clk2_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x3b>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    video_div_clk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x3b>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    dummy_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    };
    };
    
    时钟域{
    };
    
    MPU_cm@300{
    Compatible ="ti、OMAP4-cm";
    reg =<0x300 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x300 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkcti";reg = 0x400cm;<0x400cm = 0x400cm;time-cells = 0x400cm;time-cells = 0x400cm;}
    
    
    
    #size-cells =<0x1>;
    ranges =<0x0 0x400 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0x4>;
    #clock-cells =<0x2>;
    }
    ;
    
    ippu1_cm@
    
    
    
    
    
    
    @500{compatible ="ti、omc4–cm";reg =<0x500;#clkcell-cells = 0x100;#clcells
    = 0x100;#clcell-cells = 0x100;<0x100 = 0xcell-cells = 0x100;#cell-cells = 0x100;<0x100;<0xcell-cells = 0x100
    reg =<0x20 0x20>;
    #clock-cells =<0x2>;
    分配的时钟=<0x3c 0x0 0x18>;
    分配的时钟父节点=<0x3D>;
    相位=<0x3c>;
    };
    };
    
    IPU_cm@540{
    compatible ="ti、OMAP4-cm";
    reg =<0x540 0xc0>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x540 0xc0>;
    
    clk@0{
    compatible ="ti、clkctrl";
    reg =<0x0 0x44>
    ;#hock-cells
    
    };<0x90>}
    
    
    dsp2_cm@600{
    compatible ="ti、OMAP4-cm";
    reg =<0x600 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x600 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkctrl";reg =<0x20 0x4>
    
    
    
    ;#rtcells = 0x700};<cell-cells = 0x100>;<cells = 0x700 cells = 0x100>;<cock-cells = 0x100>;<cells = 0x100cm;<cells = 0x100cm;<cell-cells = 0x100>
    范围=<0x0 0x700 0x100>;
    
    clk@40{
    compatible ="ti、clkctrl";
    reg =<0x40 0x8>;
    #clock-cells =<0x2>;
    };
    };
    };};
    
    cm_core@
    
    
    
    
    
    
    
    
    
    
    @8000{compatible ="ti、dra7-cm-core"、"simple-bus";#address-cells =<0x1>;#size-cells =<0x1>;reg =<0x8000 0x3000>;ranges =<0x0 0x8000 0x3000>;Clocks{#address-cells =<0x202020cells =<0x202020204s;<cell_clock_clock<0x204<0x20>;<0x2020204bells
    
    = 0x204nv_clock<1>;<cock_clock_clock_clock<0x201>
    
    
    
    };
    
    DPLL_PCIe_ref_m2ldo_ck@210{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x3E>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x210>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x3f>;
    };
    
    apll_PCIe_in_clk_mux@
    
    
    
    
    
    
    
    
    @
    
    
    
    
    
    
    
    @4ae06118{compatible ="ti、mux-clock";Clocks =<0x3f 0x40>;#clock-cells =<0x0>;reg =<0x21c 0x4>;ti、bit-shift =<0x7>;phandle =<0x2141;}<clock-clock-clocks = 0x42>;<peti-clock-clock<0x42>= 0x42>;clock-clock-clock<xtid<xtid<xtcr = 0x4c
    = 0x42>;clip_clip_clipcr = 0x42>
    时钟=<0x42>;
    #clock-cells =<0x0>;
    reg =<0x21c>;
    ti、分频器=<0x2 0x1>;
    ti、bit-shift =<0x8>;
    ti、max-div =<0x2>;
    phandle =<bbbv8>;
    };
    
    apll_PCIe_clkvcoldo{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x42>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    apll_pcie_clkvcoldo_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clock=<0x42>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    apll_pcie_m2_ck{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x42>;
    时钟多普勒=<0x1>;
    时钟 div =<0x1>;
    phandle =<0x6a>;
    };
    
    DPLL_PER_BYP_mux@14c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x43>;
    ti、bit-shift =<0x17>;
    reg =<0x14c>;
    phandle =<0x44>;
    };
    
    DPLL_PER_CK@140{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL- clock";
    Clocks =<0x11 0x44>;
    reg =<0x140 0x144 0x14c>;
    phandle =<0x45>;
    };
    
    DPLL_PER_m2_ck@150{
    #clock-cells =<0x14;
    
    
    
    ti = 0x45>;shock-cock-cle =<0x45>;dock-div>;<0x45>;<idr =<tidr = 0x45>;ti、tid-cock =<0x45>
    reg =<0x150>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x46>;
    };
    
    func_96m_aon"
    
    
    ;clock-cells/div{#clock-cells =<0x0>;compatible ="固定因子-时钟";clock=<0x46>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    PHANDLE =<0x78>;
    };
    
    DPLL_USB_BYP_mux@18c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x47>;
    ti、bit-shift =<0x17>;
    reg =<0x18c>;
    phandle =<0x48>;
    };
    
    DPLL_USB_ck@180{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-j-type-clock";
    Clocks =<0x11 0x48>;
    reg =<0x180 0x184 0x18c 0x188>;
    phandle =<0x49>;
    };
    
    DPLL_USB_ti_ti_190@= 0x7m2;
    
    <clock-m8>
    
    ;auto-shock = 0x49>;dock-randle = 0x49>;<id-mcle = 0x49>
    
    reg =<0x190>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x4d>;
    };
    
    DPLL_PCIe_ref_m2_ck@210{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x3E>;
    ti、max-div =<0x7f>;
    ti、autobide-shift =<0x8>;
    reg =<0x210>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x69>;
    };
    
    DPLL_PER_x2_CK{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x45>;
    phandle =<0x4a>;
    };
    
    DPLL_PER_h11x2_ck@158{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x4a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x158>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x4b>;
    };
    
    DPLL_PER_h12x2_ck@15c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x4a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x15c>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    };
    
    DPLL_per_h13x2_ck@160{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x4a>;
    ti、max-div =<0x3f>;
    auto-shift =<0x8;auto-ide-shift =<0x8
    reg =<0x160>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    };
    
    DPLL_per_h14x2_ck@164{
    #clock-cells =<0x0>;
    compatible ="ti、divider 时钟";
    Clocks=<0x4a>;
    ti、max-div =<0x3f>;
    ti、auto-shift =<0x8>
    reg =<0x164>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x52>;
    };
    
    DPLL_PER_M2x2_CK@150{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x4a>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x150>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x4c>;
    };
    
    DPLL_USB_clkdcoldo{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x49>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x4f>;
    };
    
    func_128m_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x4b>;
    时钟多普勒=<0x1>;
    clock-div =<0x2>;
    };
    
    func_12m_fclk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x4c>;
    clock-mult =<0x1>;
    clock-div =<0x10>;
    };
    
    func_24m_clk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x46>;
    clock-mut =<0x1>;
    clock-div =<0x4>;
    };
    
    func_48m_fclk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x4c>;
    clock-mult =<0x1>;
    clock-div =<0x4>;
    };
    
    func_96m_fclk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x4c>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    };
    
    l3init_60m_fclk@104{
    #clock-cells =<0x0>;
    兼容="ti、divider-clock";
    时钟=<0x4d>;
    reg =<0x104>;
    ti、dividers =<0x1 0x8>;
    };
    
    clkout2_clk@6b0{
    #ti-cells =<0x104>
    
    ;clock-clocks=<0x8>;clock-clock-clocks =<0x4e =<b>;clock-clock-clock<shift =<0x4e<x0>;clock-clock-clock<
    
    
    phandle =<0xEA>;
    };
    
    l3init_960m_gfclk@6c0{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x4f>;
    ti、bit-shift =<0x8>;
    reg =<0x6c0>;
    };
    
    USB_phy1_always_ON_clk32k@640{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x640>;
    phandle =<0xba>;
    };
    
    USB_phy2_always_on" clk32k@688{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x688>;
    phandle =<bbbbc>;
    };
    
    USB_phy3_always_on" clk32k@698{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x698>;
    phandle =<0xbd>;
    };
    
    GPU_core_gclk_mux@1220{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x51 0x52 0x28>;
    ti、bit-shift =<0x18>;
    reg =<0x122>;
    分配的时钟=<0x53>;
    分配的时钟= 0x28>
    phandle =<0x53>;
    };
    
    GPU_hyd_gclk_mux@1220{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x51 0x52 0x28>;
    ti、bit-shift =<0x1a>;
    reg =<0x122>;
    分配的时钟= 0x54>
    ;分配的时钟= 0x28;分配的时钟=分配的父级
    phandle =<0x54>;
    };
    
    l3instr_ts_gclk_div@E50{
    #clock-cells =<0x0>;
    兼容="ti、divider 时钟";
    时钟=<0x55>;
    ti、bit-shift =<0x18>;
    reg =<0xe50>;
    
    
    
    
    
    
    
    
    
    
    
    @、分频器=<0x8 0x10 0x20>;};vip1_gclk_mux@
    
    
    
    
    
    
    
    @1020{#clock-cells =<0x0>;兼容="ti、mux-clock";时钟=<0xA 0x56>;ti、bit-shift =<0x18>;reg =<0x1020>;}vip2_mux-clock<0x30>;<gclock<0x308_clock<x30<x30>
    ;<xnock<xnock-clus<0x30<x_clus<x>;<xnock<xnock<0x30<x_clus<x>;<xnock<xnock<x_clus<x>;<xnock<xnock<xnock<0x18>;<0x30
    兼容="ti、mux-clock";
    时钟=<0xA 0x56>;
    ti、bit-shift =<0x18>;
    reg =<0x1030>;
    };
    };
    
    clockdomain{
    
    coreain_clkdm{
    compatible ="ti、clockdomain";
    clock =<0x49>;
    };
    };
    
    coreain_cm@
    
    
    
    
    
    
    @600{compatible ="ti、OM1c-cm";reg =<0x600 0x100>;#address-cells =<0x1>;#size-cells =<0x1>;ranges = 0x100>
    
    
    ;#clock-cells
    
    
    = 0x100>;#clock<0x100>= 0x100>;#clock-cells = 0x100>
    
    l3main1_cm@700{
    compatible ="ti、OMAP4-cm";
    reg =<0x700 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x700 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkctrl";
    reg =<0x20 0x100;#ipcell-cells = 0x1;<OM4-cm2;<cells = 0x1}cells = 0x1;<ipcell-cells = 0x1;<OM4-cells = 0x1;<cells = 0x100}<cells = 0x1;<cell-cells = 0x100 cells = 0x100
    
    
    
    范围=<0x0 0x900 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0x4>;
    #clock-cells =<0x2>;
    };
    };
    
    dma_cm@
    
    
    
    
    
    
    @a00{compatible ="ti、omap4-cm";reg =<0xa00 0x100>;#address-cells = 0x20;区域= 0xc00 = 0xc00;#cl1 = 0xc00 = 0xc00;#clc00 = 0xc00 = 0xc00;#cl1 = 0xc00 = 0xc00;< 0xc00 = 0xc00;#cl1 = 0xc00;< 0xc00 = 0xc00
    
    
    #clock-cells =<0x2>;
    }
    ;
    
    EMIF_cm@B00{
    compatible ="ti,OMATl-cm";
    reg =<b2000 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 b00 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti,cells = 0x100>;clock-ctr4 = 0xctr4};clock-ctr4 = 0xctr4 = 0xcock_ctr4 cm;clap4 = 0xcock-cab4 =
    0xcm;clap4 = 0xcab4 = 0xcab4}
    
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0xc00 0x100>;
    
    clk@0{
    compatible ="ti、clkctrl";
    reg =<0x0 0x4>;
    #clock-cells =<0x2>;
    phandle =<0x10>;
    };
    };};
    
    l4cfg_cm@d00{
    Compatible ="ti、OMAP4-cm";
    reg =<0xd00 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0xd00 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkctrl";reg =<0x100>
    
    
    ;<0x3cm1;<reomcell-cells = 0x100>;<0x3cm4 incells = 0x00;<reus-cells = 0x1cm";<0x1cm;#ecell-cells = 0x1cm;<0x1cm4 incells = 0xcells = 0x1cm;<0x1cm;<reus
    
    范围=<0x0 0xe00 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0xc>;
    #clock-cells =<0x2>;
    };
    };
    
    dss_cm@
    
    
    
    
    
    
    @1100{compatible ="ti、omag4-cm";
    
    reg =<0x1100 0x100>;#address-cells = 0x100;#clcells = 0x20 = 0x100;< 0x1 = 0xcells = 0x100;clcock-cells = 0x1 = 0x100;< 0x100 = 0xctrl = 0x1;< 0x100 = 0xctrl = 0xcr = 0x100;< 0x100;
    #clock-cells =<0x2>;
    phandle =<0xcb>;
    };
    };
    
    l3init_cm@1300{
    compatible ="ti、OMAP4-cm";
    reg =<0x1300 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x1300 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0xd4;
    #bidle>};<cock-cells
    
    = 0xble>
    
    
    l4per_cm@1700{
    compatible ="ti、OMAP4-cm";
    reg =<0x1700 0x300>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x1700 0x300>;
    
    clk@0{
    compatible ="ti、clkctrl";
    reg =<0x0 0x20cells = 0x57>
    ;
    <time-clocksigned cells = 0x57>
    
    
    ;<0x57>;<time-clocks= 0x168>
    
    };
    };
    
    L4@4ae00000{
    compatible ="ti、dra7-l4-wkup"、"simple-bus";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x4ae00000 0x3f000>;
    
    counter@
    
    
    
    
    
    @4000{compatible ="ti、ti-32k";reprm = 0x4000
    
    
    
    ;<0x4eprm = 0x4000-reprm = 0x000";reg = 0x4000-reprm = 0x4000-reg;0x4000-rem;0x4mr = 0x4000-reg = 0x4000-reg = 0x4000-reg;0x4000-rm;0x4mr = 0x000";0x4mr = 0x4000-reprm = 0x
    #size-cells =<0x1>;
    范围=<0x0 0x6000 0x3000>;
    
    时钟{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    sys_clkin1@110{
    #clock-cells =<0x0>;
    compatible ="ti、mux-cock";
    Clocks=<0x59 0x5b 0x5a = 0x5a
    
    ;0x5a = 0x5a;<0x5a = 0x5a = 0x5a;<0x5a = 0x5a = 0x5a;<0x5a = 0x5a;0x5a = 0x5a
    
    
    
    Abe_DPLL_sys_clk_mux@118{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x118>
    ;
    寄存器=<0x118>;相位=<0x61>;
    };
    
    ti_DPLL_bype_mux@
    
    
    
    
    
    
    
    @114{#clock-cells = 0x50>
    ;
    兼容时钟= 0x61>;兼容时钟= 0x60>;
    
    reg =<0x10c>;
    phandle =<0x12>;
    };
    
    Abe_24m_fclk@
    
    
    
    
    
    
    
    
    @11c{#clock-cells =<0x0>;compatible ="ti、diver-clock";Clocks =<0x16>;reg =<0x11c>;ti、divers =<0x8 0x10>;phandle =<0x62>
    ;<clock-cless =
    0x178<rev = 0x178>;clock-clock<rev =
    0x24>;<rev
    
    = 0x24>;clock-clock<rev = 0x24>;clock<rev = 0x24>;clock<rev = 0x24<rev = 0x24>;cl
    phandle =<0x63>;
    };
    
    Abe_giclk_div@174{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x63>;
    reg =<0x174>;
    ti、max-div =<0x2>;
    phandle =<0x91>;
    };
    
    Abe_LP_clk_div@
    
    
    
    
    
    
    
    
    @1d8{#clock-cells =<0x0>;compatible ="ti、diver-clock";Clocks =<0x16>;reg =<0x1d8>;ti、divers =<0x10 0x20>;phandle =<0x83>;}abe-clocks
    
    =<0x120>;abe= 0x1d<TI_clocks =<0x1d<rev = 0x1d>;ti-clocks = 0x1d<1d<xd<xd<xd<xd>;ams-cl<xd<xd<xd>;am<1
    
    
    
    };
    
    adc_gfclk_mux@1dc{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    clock =<0x11 0x60 0x50>;
    reg =<0x1dc>;
    };
    
    sys_clk1_dclk_ddiv@1c8{
    #clock-cells =<0x0>;
    
    
    reg =<0x1dc>;<clock-clocks=<rev =<0x40>;times<times<times<times<times<times<times<times<times<times<times<rev
    
    TI、index-power-of -two;
    phandle =<0x6c>;
    };
    
    sys_clk2_dclk_ddiv@1cc{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x60>;
    ti、max-div =<0x40>;
    reg =<0x1cc>;
    TI、索引-二进制功率;
    相位=<0x6d>;
    };
    
    per_abe_x1_dclk_ddiv@1bc{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x64>;
    ti、max-div =<0x40>;
    reg =<0x1bc>;
    TI、索引-二进制功率;
    相位=<0x6e>;
    };
    
    dsp_gclk_div@18c{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x21>;
    ti、max-div =<0x40>;
    reg =<0x18c>;
    TI、索引-二进制功率;
    相位=<0x70>;
    };
    
    GPU_dclk@1a0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x28>;
    ti、max-div =<0x40>;
    reg =<0x1a0>;
    TI、索引-二进制功率;
    相位=<0x72>;
    };
    
    EMIF_phy_dclk_ddiv@190{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x65>;
    ti、max-div =<0x40>;
    reg =<0x190>;
    TI、索引-二进制功率;
    相位=<0x74>;
    };
    
    GMAC_250m_dlk_dclk_ddiv@19c{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x66>;
    ti、max-div =<0x40>;
    reg =<0x19c>;
    TI、索引-二进制功率;
    相位=<0x67>;
    };
    
    GMAC_MAIN_clk{
    #clock-cells =<0x0>;
    兼容="固定因数-时钟";
    时钟=<0x67>;
    时钟-多普勒=<0x1>;
    Clock-div =<0x2>;
    phandle =<0xc8>;
    };
    
    l3init_480m_dlk_dclk_ddiv@1ac{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x4d>;
    ti、max-div =<0x40>;
    reg =<0x1ac>;
    TI、索引-二进制功率;
    相位=<0x79>;
    };
    
    USB_OTG_Dclk_ddiv@184{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x68>;
    ti、max-div =<0x40>;
    reg =<0x184>;
    TI、索引-二进制功率;
    相位=<0x7a>;
    };
    
    SATA_dclk_div@1C0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x11>;
    ti、max-div =<0x40>;
    reg =<0x1c0>;
    TI、索引-二进制功率;
    相位=<0x7B>;
    };
    
    PCIe2_dclk_ddiv@1b8{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x69>;
    ti、max-div =<0x40>;
    reg =<0x1b8>;
    TI、索引-二进制功率;
    相位=<0x7c>;
    };
    
    pcie_dclk_div@1B4{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x6a>;
    ti、max-div =<0x40>;
    reg =<0x1b4>;
    TI、索引-二进制功率;
    相位=<0x7d>;
    };
    
    emu_dclk_ddiv@194{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x11>;
    ti、max-div =<0x40>;
    reg =<0x194>;
    TI、索引-二进制功率;
    相位=<0x7E>;
    };
    
    SECURE_32k_dclk_ddiv@1c4{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x6b>;
    ti、max-div =<0x40>;
    reg =<0x1c4>;
    TI、index-power-of -two;
    phandle =<0x7f>;
    };
    
    clkoutmux0_clk_mux@
    
    
    
    
    
    
    @158{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clock =<0x6c 0x6d 0x6e 0x6e 0x70 0x71 0x72 0x72 0x73 0x7b 0x7b 0x78 mux-clocks;0x7b 0x7b 0x78 0x7b 0x78 mux-clocks
    = 0x7b 0x7b 0x78;0x7b 0x7b 0x7b 0x78 0x7b 0x78 mux-clkc 0x78 0x78 0x78 0x78 0x78 0x78 0x7 mux_clkc;0x7b 0x7b 0x78 0x7b 0x78 0x
    
    时钟=<0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x79 0x7a 0x7B 0x7c 0x7d 0x7E 0x7f 0x80>;
    reg =<0x15c>;
    };
    
    clkoutmux2_clk_mux@160{
    #clock-compatible cLOCK
    = 0x0};
    时钟=<0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x79 0x7a 0x7c 0x7d 0x7E 0x7f 0x80>;
    reg =<0x160>;
    phandle =<0x4e>;
    };custefus_0x7c 0x7d 0x7d 0x7e 0x7e 0x7e 0x7f 0x7f 0x80>;
    
    
    
    reg <cock = 0x1div;<clock-cycl= 0xd=<cock-cycl=<cock<x0>;<cycl=<cock-cock<xt = 0x1<cycl=<
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    @;eve_clk@180{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clocks =<0x34 0x37>;reg =<0x180>;};HDMI_DPLL_clk_mux@164{#clock-cells =<0x0>;compatible ="ti、mux-clock";reg
    
    
    
    = 0x134;<clocks=<0x60>;<clocks=<clock-clocks=<0x134<re=<clus<clus<0x60>;<clus<cl<clus<clus<clus<clus<clus<clus<clus<clus<clus<0x134<clus<clus<
    
    TI、索引功率二进
    制;};
    
    mlbp_clk@130{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x82>;
    ti、max-div =<0x40>;
    reg =<0x130>;
    TI、索引功率二进制;
    };
    
    per_abe_x1_gfclk2_div@138{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x64>;
    ti、max-div =<0x40>;
    reg =<0x138>;
    TI、索引功率二进制;
    };
    
    timer_sys_clk_div@144{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x11>;
    reg =<0x144>;
    ti、max-div =<0x2>;
    };
    
    video_DPLL_clk_mux@168{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clocks =<0x11 0x60>;
    reg =<0x168>;
    };
    
    video_DPLL_clk_mux@
    
    
    
    
    
    
    @16c{#clock-cells =<0x108>;compatible = 0x1081211>
    ;clock-mux<clock-clocks = 0x60>;clus_mux<0x60>;clock-clock-clock-clock<0x108<l=<l=<l=<lick>
    
    
    
    相位=<0x55>;
    };
    };
    
    clocktrl 域{
    };
    
    wkupaON_cm@1800{
    兼容="ti、omap4-cm";
    reg =<0x1800 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围=<0x0 0x1800 0x100>;
    
    clk@20{
    兼容="ti、clkcle";
    reg = 0x8cell>
    ;#x6cocktrl = 0x20>;}
    
    
    
    };
    
    SCM_conf@c000{
    compatible ="SYSCON";
    reg =<0xc000 0x1000>;
    phandle =<0x7>;
    };
    };
    
    axi@
    
    
    
    
    
    @0{compatible =" simple-bus";#size-cells =<0x1>;#address-cells =<0x1000000 0x1000000
    
    寄存器= 0x100000";0x100000n rc = 0x100000";0x100000n rc = 0x100000"寄存器0x100000"
    中断=<0x0 0xe8 0x4 0x0 0xe9 0x4>;
    #address-cells =<0x3>;
    #size-cells =<0x2>;
    device_type ="PCI";
    范围=<0x81000000 0x0 0x3000 0x10000 0x82000000 0x0 0x13000 0x13000 0x0x0 0x0x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000>;
    
    <hw1>= 0x0000.<cid-cycums
    
    = 0x000>;<cip-*** = 0x000<0x000>= 0x000>;<cip-*** = 0x000<0x000>= 0x0000.1<r0-***
    
    PHYs =<0x84>;
    phy-names ="PCIe-phy0";
    ti、SYSCON-lane SEL =<0x85 0x18>;
    interrupt-map-mask =<0x0 0x0 0x0 0x0 0x0 0x7 0x7>;
    interrupt-map =<0x0 0x0 0x0 0x0 0x86 0x0
    
    0x6 0x0 0x6 0x0 0x0 0x0 0x6 0x0 0x0 0x4、"PCIe 0x4 0x4 0x4、"FR";"0x4 0x4 0x4 0x4 0x4 0x4 0x4、"pcie"
    GPIO =<0x87 0x8 0x1>;
    
    中断控制器{
    中断控制器;
    #address-cells =<0x0>;
    #interrupt-cells =<0x1>;
    phandle =<0x86>;
    };
    };
    
    PCIe_EP@51000000{
    reg =<0x51000000 0x28 0x51002000 0x14c 0x51001000 0x28 0x1000 0x10000000>;
    reg 名称="EP_dbics"、"ti_conf"、"EP_dbics2"、"addr_space";
    中断=<0x0 0xe8 0x4>;
    num-lanes =<0x1>;
    num-ib-windows =<0x4>;
    num-ob-windows =<0x10>;
    ti、hwmods ="pcie1";
    phys =<0x84>;
    phy-names ="PCIe-phy0";
    ti、SYSCON-unaligned 访问=<0x88 0x14 0x1>;
    ti、SYSCON-lane SEL =<0x85 0x18>;
    status ="禁用";
    compatible ="ti、dra746-PCIe-EP"、"ti、dra7-pcie"
    ;}
    };
    
    axi@1{
    compatible ="简单总线";
    #size-cells =<0x1>;
    #address-cells =<0x1>;
    ranges =<0x51800000 0x51800000 0x3000 0x0 0x30000000 0x10000000>;
    status ="禁用";
    
    pcie@51800000{
    reg =<0x51800000 0x2000 0x164c
    ;0x1802_cules
    = 0x2000"
    、0x164c = 0x18000";0x2000"寄存器= 0x164c = 0x164~0x000"地址0x000"
    #size-cells =<0x2>;
    device_type ="PCI";
    ranges =<0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x30013000 0x13000 0x1000 0x0 0x0x0x0x0x0x0x000>;
    bus-range =<0x0 0xff>;
    #interrupt-cells =<0x1>;
    num-lanes = 0x1
    、linux<PCIe2 = 0x1;<PCId'域
    = 0x1;<PCId'
    PHYs =<0x89>;
    phy-names ="PCIe-phy0";
    interrupt-map-mask =<0x0 0x0 0x0 0x0 0x0 0x0 0x1
    0x8a 0x0 0x0 0x0 0x0 0x2 0x8a 0x0 0x0 0x0 0x3 0x8a 0x3 0x0 0x4
    ;interrupt-cells
    
    
    
    = 0x746-cells 0x4;interrt cells 0x746-dracells 0x4、0x4s 0x7>PCIe 控制器0x4<cells 0x7';inter-cell-cells 0x7'
    #interrupt-cells =<0x1>;
    phandle =<0x8a>;
    };
    };
    };
    
    ocmcram@40300000{
    compatible ="MMIO-SRAM";
    reg =<0x40300000 0x80000>;
    Ranges =<0x0 0x40300000 0x80000>;
    #address-cells =<0x1>;
    #size-cells = 0x1>;
    
    SRAM-hs@
    
    
    
    
    
    @0{compatible ="ti、secure-ram";reg = 0x400000;0x400000 = 0x400000}
    RAM = 0x400000;0x400000 = 0x400000;RAM0<0x400mRAM0>
    
    
    
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    };
    
    ocmcram@
    
    
    
    
    
    
    
    
    @40500000{status ="disabled";compatible ="MMIO-SRAM";reg =<0x40500000 0x100000>;ranges =<0x0 0x40500000 0x100000>;#address-cells = 0x2124 = 0x002380
    ;0x4bandcle = 0x0040 0x4232 = 0x0040 000>;0x4bandcr 0x4c = 0x0040 0001cr 0x4c = 0x0040 000> 0x4bandcr 0x4c = 0x24000C
    ;0x4cr 0x4bandcr 0x4c = 0x0040 000C = 0x0040 000C 0x24000> 0x4cr 0x24000C 0x24000> 0x4c = 0x000C
    中断=<0x0 0x79 0x4>;
    #thermicature-sensor-cells =<0x1>;
    phandle =<0xd9>;
    };
    
    DSP_SYSTEM@40d00000{
    compatible ="SYSCON";
    reg =<0x40d00000 0x100>;
    phandle =<inc3>;
    };
    
    padconf@4844a000 =<0xd1<cells
    = 0xd1cells;<0xd1<cells
    
    = 0xd1cells = 0xd1cells;<cells
    
    = 0xd4cells = 0xd1cells;<0xd1<cells = 0xd1cells = 0x4cells
    
    mmc1_iodelay_DDR_rev11_conf{
    pinctrl-PIN-array =<0x618 0x23c 0x21c 0x620 0x5f5 0x0 0x624 0x0 0x258 0x628 0x0 0x62c 0x37 0x630 0x193 0x78 0x634 0x0 0x638 0x0 0x0 0x63c 0x0 0x640 0x0 0x650 0x0 0x0 0x6580x0 0x0 0x64c 0x0 0x0 0x64 0x0 0x0 0x0 0x65 0x65 0x0 0x0 0x64 0x0 0x65 0x65 0x0 0x65 0x0 0x64 0x0 0x65 0x0 0x65 0x0 0x64 0x0 0x65 0x65 0x65 0x0 0x0 0x0 0x65c 0x0 0x0>;
    };
    
    mmc1_iodelay_ddr50_rev20_conf{
    pinctrl-pino-array =<0x618 0x434 0x14a 0x620 0x4f7 0x0 0x654 0x2d2 0x0 0x628 0x0 0x62c 0x0 0x630 0x2ef 0x0 0x644 0x0 0x640 0x14 0x648 0x0 0x0 0x6580x0 0x6580x0 0x6580x0 0x64C 0x0 0x0 0x0 0x0 0x6580x0 0x6580x0 0x6580x0 0x0 0x640 0x0 0x0 0x0 0x0 0x6580x0 0x0 0x6580x0 0x6580x0 0x0 0x6580x0 0x0 0x0 0x65c 0x0 0x00x0>;
    };
    
    mmc1_iodelay_sdr104_rev11_conf{
    pinctrl-pin_array =<0x620 0x427 0x11 0x628 0x0 0x62c 0x17 0x0 0x634 0x0 0x0 0x638 0x0 0x0 0x640 0x0 0x0 0x625 0x0 0x0 0x65 0x0 0x0 0x65 0x0 0x65 0x0 0x65 0x0 0x65 0x0 0x65 0x65 0x0 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x
    
    
    mmc1_iodelay_sdr104_rev20_conf{
    pinctrl-pino-array =<0x620 0x258 0x190 0x628 0x0 0x62c 0x0 0x0 0x634 0x0 0x638 0x1E 0x0 0x640 0x0 0x0 0x644 0x0 0x0 0x64c 0x0 0x0 0x650 0x0 0x658>0x658>0x0 0x658-0x0 0x658>0x658>0x0 0x658+0x6540-0x0
    
    
    mmc2_iodelay_hs200_rev11_conf{
    pinctrl-pino-array =<0x190 0x26d 0x258 0x12c 0x0 0x1a8 0x2e3 0x258 0xf0 0x1ac 0xf4 0x32c 0x258 0x1b8 0x1c0 0x1c0 0x3ba 0x2580x1c0 0x2580x1d0x1c0 0x2580x1c0 0x1c0 0x2580x1c00x1c00x1c00x2580x1c00x1c00x1c00x1c00x1c00x2580x1c00x1c00x1c00x2580x1c00x1c00x1c00x1c00x1c00x1c00x 0x235 0x258 0x200 0x3c 0x0 0x364 0x3c9 0x258 0x368 0xb4 0x0>;
    };
    
    mmc2_iodelay_HS200_rev20_conf{
    pinctrl-PIN-array =<0x190 0x112 0x0 0x194 0xa2 0x0 0x1a8 0x191 0x1ac 0x49 0x0 0x1b4 0x1d1 0x0 0x1b8 0x73 0x0 0x1c0 0x279 0x1c4 0x1c0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x106 0x0 0x200 0x2e 0x0 0x364 0x2ac 0x0 0x368 0x4c 0x0>;
    };
    
    mmc2_iodelay_DDR_3_3V_rev11_conf{
    pinctrl-pin-array =<0x18c 0x0 0x78 0x190 0x0 0x194 0xae 0x0 0x1a4 0x109 0x168 0x1a8 0x0 0x1ac 0x0 0x1b0 0x78 0x78 0x1b4 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1c0 0x1d 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x78 0x1f0 0x0 0x1F4 0x78 0x0 0x1f8 0x78 0x78 0x64 0x1fc 0x0 0x0 0x200 0x0 0x360 0x0 0x360 0x0 0x0x0 0x0 0x0 0x360 0x0 0x0 0x0 0x0 0x0 0x0 0xb 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x36 0x0 0x0 0x
    
    
    mmc2_iodelay_DDR_1_8v_rev11_conf{
    pinctrl-pin-array =<0x18c 0x0 0x190 0x0 0x194 0xae 0x0 0x1a4 0x112 0xf0 0x1a8 0x0 0x1ac 0x0 0x1b0 0x1b0 0x1c 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x3c 0x1f0 0x0 0x0 0x1F4 0x78 0x0 0x1f8 0x79 0x364 0x364 0x1fc 0x0 0x0 0x200 0x0 0x0 0x360 0x0 0x360 0x0x0 0x360 0x0 0x0 0x0 0x360 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3c 0x0 0x0 0x0 0x
    
    
    mmc3_iodelay_manual1_conf{
    pinctrl-PIN-array =<0x678 0x196 0x0 0x680 0x293 0x0 0x684 0x0 0x688 0x0 0x68c 0x0 0x0 0x690 0x82 0x0 0x694 0x0 0x0 0x698 0x0 0x0 0x0 0x69c 0xA9 0x0 0x6a0 0x0 0x0 0x6a0 0x0 0x6b0 0x0 0x0 0x6b0 0x0 0x0 0x0 0x6b0 0x0 0x0 0x00x6b0 0x0 0x00x00x00x00x00x6 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x6 0x0 0x0 0x 0x0 0x0 0x6bc 0x0 0x0>;
    };
    
    MMC4_iodelay_DS_rev11_conf{
    pinctrl-PIN-array =<0x840 0x0 0x848 0x0 0x84c 0x60 0x0 0x850 0x0 0x854 0x0 0x0 0x870 0x246 0x0 0x874 0x0 0x0 0x78 0x0 0x0 0x0 0x87c 0x187 0x0 0x880 0x0 0x888 0x880 0x0 0x880 0x0 0x880 0x0 0x880 0x88 0x88 0x0 0x880 0x0 0x88 0x88 0x88 0x88 0x88 0x88 0x0 0x88 0x88 0x88 0x0 0x88 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x 0x0 0x0 0x89c 0x0 0x0>;
    };
    
    MMC4_iodelay_DS_rev20_conf{
    pinctrl-pine-array =<0x840 0x0 0x848 0x0 0x84c 0x133 0x0 0x850 0x0 0x854 0x0 0x0 0x870 0x311 0x0 0x874 0x0 0x0 0x78 0x0 0x0 0x0 0x87c 0x265 0x280 0x0 0x888 0x0 0x880 0x0 0x0 0x880 0x0 0x0 0x880 0x0 0x880 0x0 0x8848 0x0 0x0 0x88 0x88 0x88 0x88 0x88 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x88 0x88 0x0 0x 0x0 0x0 0x89c 0x0 0x0>;
    };
    
    MMC4_iodelay_sdr12_hs_sdr25_rev11_conf{
    pinctrl-pine-array =<0x840 0x0 0x848 0xa5b 0x0 0x84c 0x763 0x0 0x850 0x0 0x854 0x0 0x870 0x779 0x0 0x874 0x0 0x0 0x898 0x878 0x8780x0 0x890 0x880 0x0 0x880 0x880 0x0 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x870 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x8C 0x880 0x880 0x0 0x 0x0 0x0 0x89c 0x0 0x0>;
    };
    
    MMC4_iodelay_sdr12_hs_sdr25_rev20_conf{
    pinctrl-pin_array =<0x840 0x0 0x848 0x47b 0x0 0x84c 0x72a 0x0 0x850 0x0 0x854 0x0 0x870 0x875 0x0 0x874 0x0 0x0 0x898 0x878 0x878 0x7880 0x88c 0x0 0x8880 0x780 0x8880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x 0x0 0x0 0x89c 0x0 0x00x0>;
    };
    
    
    @;dma-controller 4a056000{
    compatible ="ti,omap4430-sdma";
    reg =<0x4a056000 0x1000>;
    interrupts =<0x0 0x7 0x4 0x8 0x4 0x4 0x0 0x4 0x0 0x0 0xA 0x4 0x4 0x4;
    
    
    
    reg <0x4dma>;<0x4dma-mcells = 0x7dma>;<dma-rmags=<0xdma>;<0xdma-rs-cells = 0x7dma<dma>;<dma
    phandle =<0xe>;
    };
    
    EDMA@43300000{
    compatible ="ti、EDMA3-tpcc";
    ti、hwmonds ="tpcc";
    reg =<0x43300000 0x100000>;
    reg 名称="EDMA3_cc";
    中断=<0x0 0x169 0x4 0x0 0x16 0x16 0x16 0x16
    0x16 0x16 0x16 0x40、0x3 0xEDMA3;"0xmctram_int";"0xmcr = 0x4 0x4 0xmag3 0xmand";"0xmcr、"0x4 0x4 0xmcand";"0xmcr、"0xmag3 0x4、"
    
    #dma-cells =<0x2>;
    ti、tptcs =<0x8b 0x7 0x8c 0x0>;
    phandle =<0xF>;
    };
    
    tptc@
    
    
    
    
    
    
    
    
    @43400000{compatible ="ti、EDMA3-tptc";ti、hwmonds ="tptc0";reg =<0x43400000;tprinc = 0x00002<0x000";tprintrabout1 = 0x4mag3;t0002 = 0x0000.cn"中断= 0x000";tmagc = 0x0000.000"
    
    
    
    中断=<0x0 0x173 0x4>;
    中断名称="EDMA3_tcertcertcertrint";
    phandle =<0x8c>;
    };
    
    GPIO@4ae10000{
    兼容="ti、OMAP4-GPIO";
    reg =<0x410000 0x200>;
    中断=<0x0 0x18 0x4>;
    ti、hwmods ="GPIO-2"
    
    ;控制器#GPIO1-cells;
    中断控制器#GPIO1-cells
    #interrupt-cells =<0x2>;
    phandle =<0xa7>;
    };
    
    GPIO@48055000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48055000 0x200>;
    interrupts =<0x0 0x19 0x4>;
    ti、hwmods ="GPIO2";
    GPIO-controller;
    #GPIO-cells =<0x2>
    ;interrupt-controller;interrupt-cells = 0x2>
    #interrupt-cells =<0x2>;
    phandle =<0x87>;
    };
    
    GPIO@48057000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48057000 0x200>;
    interrupts =<0x0 0x1A 0x4>;
    ti、hwmonds ="GPIO3";
    GPIO-controller;
    #GPIO-cells =<0x2>
    ;interrupt-controller; interrupt-cells = 0x2-controller;interrupt-controller; interrupt
    #interrupt-cells =<0x2>;
    };
    
    GPIO@48059000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48059000 0x200>;
    interrupts =<0x0 0x1b 0x4>;
    ti、hwmds ="GPIO4";
    GPIO-controller;
    #GPIO-cells =<0x2>;
    中断控制器;
    #interrupt-cells =<0x2>;
    phandle =<0xa9>;
    };
    
    GPIO@4805b000{
    Compatible ="ti、OMAP4-GPIO";
    reg =<0x4805b000 0x200>;
    interrupts =<0x0 0x1c 0x4>;
    ti、hwmods ="GPIO5";
    GPIO 控制器;
    #GPIO-cells = 0x2>
    ;interrupt-cells = 0x2>
    #interrupt-cells =<0x2>;
    };
    
    GPIO@4805d000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x4805d000 0x200>;
    interrupts =<0x0 0x1d 0x4>;
    ti、hwmods ="GPIO6";
    GPIO-controller;
    #GPIO-cells =<0x2>;
    interrupt-controller;interrupt-controller;
    #interrupt-cells =<0x2>;
    phandle =<0xaf>;
    };
    
    GPIO@48051000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48051000 0x200>;
    interrupts =<0x0 0x1E 0x4>;
    ti、hwmonds ="GPIO7";
    GPIO-controller;
    #GPIO-cells =<0x2>
    ;interrupt-controller; interrupt-cells = 0x2-controller;interrupt-controller; interrupt
    #interrupt-cells =<0x2>;
    ti、no-reset-on-init;
    ti、no-idle-on-init;
    phandle =<0xAA>;
    };
    
    GPIO@48053000{
    Compatible ="ti、OMAP4-GPIO";
    reg =<0x48053000 0x200>;
    interrupts =<0x0 0x74 0x4>;
    ti、hwmods ="GPIO8";
    GPIO-controller;
    #GPIO-cells =<0x2>;
    interrupt-controller;
    #interrupt-cells =<0x2>;
    }
    
    串行@
    
    
    
    
    
    
    
    
    
    
    @4806a000{compatible ="ti、dra742-UART"、"ti、OMAP4-UART";reg =<0x4806a000 0x100>;interrupts-extended =<0x1 0x0 0x43 0x4c>;ti、hwmonds ="uart1";clock-frequency = 0x4802ti、
    "cc4;"0x480-t"= 0x480d";"0x480-d"= 0x4ctruart1";"0x480d"= 0x4ctrab"= 0x480d";"0x4d"= 0x4d"= 0x4d"
    
    中断=<0x0 0x44 0x4>;
    ti、hwmods ="uart2";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    DMA =<0x8d 0x33 0x8d 0x34>;
    dma-names ="TX"、"Rx";
    }
    
    串行@480ti{
    ="cti、0x20000"
    
    
    
    
    ;UART = 0x4carts = 0x4c00;<0x4carts = 0x4c00;UART = 0x4c00、0x4carts = 0x4c00;<0x4carts = 0x4c00;UART = 0x4cartc00;UART = 0x4c00、0x4cartc00;u.u.uartc4 = 0x4carts = 0x
    DMA =<0x8d 0x35 0x8d 0x36>;
    dma-names ="TX"、"Rx";
    中断扩展=<0x1 0x0 0x45 0x4 0x8e 0x3f8>;
    };
    
    串行@4806e000{
    compatible ="ti、dra742-UART"、"ti、"omag4-ti";
    reg = 0x4e000= 0x4804e000>
    
    
    ;<0x4dx = 0x4d4d";0x4dx 4d" 0x4d";0x4d4d"= 0x4d"
    
    
    dma-names ="TX"、"Rx";
    }
    
    串行@
    
    
    
    
    
    
    
    
    
    
    @48066000{compatible ="ti、dra742-UART"、"ti、OMAP4-UART";reg =<0x48066000 0x100>;interrupts =<0x0 0x64 0x4>;ti、480hwmods ="uart5";clock-frequency =<0x2dc64x>;"0x364c"=
    0x40";"dma-r"= 0x40";"dma-truart"= 0x40";"ctr = 0x40";"ctr = 0x40";"ctr = 0x40";"cc4 μ s = 0x40";"d"
    
    中断=<0x0 0x65 0x4>;
    ti、hwmods ="uart6";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    DMA =<0x8d 0x4f 0x8d 0x50>;
    dma-names ="TX"、"Rx";
    }
    
    ;串行@4820000{
    compatible ="cti、
    hw4d"
    
    
    
    ;UART = 0x4d4、"uarts = 0x4d4、"uart";time-controls = 0x4d4、"uart";UART = 0x4d4、uart"}
    
    
    串行@48422000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48422000 0x100>;
    interrupts =<0x0 0xdb 0x4>;
    ti、hwmods ="uart8";
    时钟频率=<0x2dc6c00>;
    status ="disabled";
    };
    
    串行@48424000{
    兼容="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48424000 0x100>;
    中断=<0x0 0xdc 0x4>;
    ti、hwmds ="uart9";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    }
    
    串行@4ae2b000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x4ae2b000 0x100>;
    interrupts =<0x0 0xdd 0x4>;
    ti、hwmds ="uart10";
    时钟频率=<0x2dc6c00>;
    status ="disabled"}
    ;
    
    邮箱@4a0f4000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4a0f4000 0x200>;
    中断=<0x0 0x15 0x4 0x87 0x4 0x0 0x86 0x4>;
    ti、hwmds ="mailbox1";
    #mbox-cells =<0x1>;
    
    ti、mbox-mbox-users=<0xnum = 0x8-num;<0xnum = 0xnum = 0xnum = 0xnum
    状态="禁用";
    }
    
    ;邮箱@4883a000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4883a000 0x200>;
    中断=<0x0 0xED 0x4 0x0 0xee 0x4 0xef 0x4 0x0 0xf0 0x4>;
    ti、hwmds ="mailboti";
    #mbox
    = 0xnum、c = 0x4-users;<num = 0x4-cells;<0xnum = 0x4-*** = 0xnum = 0xc-***;<c盒子= 0x4-uss;<0xnum = 0xnum = 0x4-uss
    = 0xnum
    状态="禁用";
    }
    
    ;邮箱@4883c000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4883c000 0x200>;
    中断=<0x0 0xF1 0x4 0x0 0x0 0xf3 0x4 0x0 0xf4 0xf4 0x4>;
    ti、hwmds ="mailbox3";
    #mbox
    = 0xnum、<num = 0x4-users>;<0x4num = 0x4num = 0x4num;<c框<***-*** = 0xnum = 0x4<***-***;<***-***-***;
    <
    状态="禁用";
    }
    
    ;邮箱@4883e000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4883e000 0x200>;
    中断=<0x0 0xf5 0x4 0xf6 0x4 0xf7 0x4 0x0 0xf8 0x4>;
    ti,FIFmds =" mailboos";<hwc-box
    
    
    = 0xmnum = 0x4mnum;<mnum =0x4mcr = 0xmcr = 0xmcum-***-***;<mcr = 0x4mcr = 0x4mcr = 0xmcr;<mcr = 0xm
    状态="禁用";
    }
    
    ;邮箱@48840000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48840000 0x200>;
    中断=<0x0 0xf9 0x4 0xfa 0x4 0xfb 0x4 0x0 0xFC 0x4>;
    ti、FIFmds ="mailboti";
    #muti
    
    、hwc框= 0x4num;<mnum-***-*** = 0x4;<0xnum = 0x4num = 0x4mcum-***-c盒子= 0x4;<0x4num = 0x4mcum-***-***-***;<
    状态="确定";
    相位= 0x93>;
    
    mbox_ipc3x{
    ti、mbox-TX =<0x6 0x2 0x2>;
    ti、mbox-Rx =<0x4 0x2 0x2>;
    状态="确定";
    相位=<0x94>;
    };
    
    mbox_dsp1_ipcbox = 0x2
    
    ;<0x2;<0x2 = 0xmrx 2;
    
    }
    
    
    
    邮箱@48842000{
    Compatible ="ti、OMAP4-mailbox";
    reg =<0x48842000 0x200>;
    interrupts =<0x0 0xFD 0x4 0x0 0xFF 0x4 0x4 0x0 0x100 0x4>;
    ti、hwmds ="mailbox6";
    #mbox-cells =<0x1>;
    ti、mbox>
    = 0xnum = 0x4num;<mnum-users-users-num-users= 0x4num = 0xnum = 0x4num;<mbox-users-num-users-num-users-
    状态="确定";
    相位=<0x9b>;
    
    mbox_ipc3x{
    ti、mbox-TX =<0x6 0x2 0x2>;
    ti、mbox-Rx =<0x4 0x2 0x2>;
    状态="确定";
    相位=<0x9C>;
    };
    
    mbox_dsple = 0x2
    = 0x2;<0x2
    = 0x2;mbox
    = 0x2;<0x2 = 0x2;}
    
    
    
    
    邮箱@48844000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48844000 0x200>;
    interrupts =<0x0 0x101 0x4 0x102 0x4 0x103 0x4 0x0 0x104 0x4>;
    ti、hwmds ="mailbox7";
    #mbox-cells =<0x1>;
    <mbox-users=0xnum
    、<0x4mc盒= 0xnum;<mnum-users-users-num-users=0x4mcum-num-users<0x4>;<mbox<mnum-users-
    状态="禁用";
    }
    
    ;邮箱@48846000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48846000 0x200>;
    中断=<0x0 0x105 0x4 0x106 0x4 0x107 0x4 0x0 0x108 0x4>;
    ti、hwmds ="FIFmailboti";
    #mbox-mos
    
    = 0xnum、0x4-cells;<0xnum = 0x4-***;<0xnum = 0x4-*** = 0xx8、mcums;<0x4-*** = 0xnum = 0x4-***;<0xnum = 0x4 <
    状态="禁用";
    }
    
    ;邮箱@4885e000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4885e000 0x200>;
    中断= 0x0 0x109 0x4 0x10a 0x4 0x10b 0x4 0x0 0x10c 0x4>;
    ti、FIFmds ="mailbox9";<muti-box>
    = 0xmnum>;<0x4musers-box>;<0xmnum = 0x4mnum-c盒子= 0x4mcum-***;<0x4mnum-***-*** = 0x4<0x4<0x4mnum>
    
    
    状态="禁用";
    }
    
    ;邮箱@48860000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48860000 0x200>;
    中断= 0x0 0x10d 0x4 0x10e 0x4 0x10f 0x4 0x0 0x0 0x0 0x110 0x4>;
    ti、hwmds ="mailbox10";
    #mbox
    = 0x4num、users-cells;<0x4num = 0x4num = 0x4-***;<***-*** = 0x4num = 0x4-***;<***-***;<***-cbox = 0x4<***
    
    状态="禁用";
    }
    
    ;邮箱@48862000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48862000 0x200>;
    中断=<0x0 0x111 0x4 0x112 0x4 0x113 0x4 0x0 0x114 0x4>;
    ti、hwmds ="mailbox11";
    #mbox-cells = 0x4num
    ;<0x4num
    = 0x4num;<mbox-uss = 0x4num = 0x4num = 0x4num;<mcum-*** = 0x4num = 0x4num;<0x4num = 0x4n
    状态="禁用";
    }
    
    ;邮箱@48864000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48864000 0x200>;
    中断=<0x0 0x115 0x4 0x0 0x116 0x4 0x117 0x4 0x0 0x118 0x4>;
    ti、hwmds ="FIFmailbox12";
    #mbox-c盒子= 0x4mnum
    
    ;<0xnum = 0x4mcum-cells;<0xnum = 0x4mbox = 0x4muss;<num = 0x4mcum-***;<0x4mcum-*** = 0xnum = 0x
    状态="禁用";
    }
    
    ;邮箱@48802000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48802000 0x200>;
    中断= 0x0 0x17b 0x4 0x4 0x0 0x17d 0x4 0x0 0x17e 0x4>;
    ti、FIFmonds ="mailbox13";
    #muti
    
    、hwc框= 0x4num;<mnum-users-cells = 0x4<0x4<hc-***;<hums-box>;<hum-***-***-box>
    状态="禁用";
    }
    
    计时器@
    
    
    
    
    
    
    
    
    
    @4hw18000{compatible ="ti、omap5430-timer";reg =<0x4ae18000 0x80>;中断=<0x0 0x20 0x4>;ti、hwmods ="Timer1";ti、timer-alwon;时钟名称="fck ";计时
    器= 0x802";计时器= 0x48021;
    
    计时器= 0x48021;计时器= 0x4802 = 0x4MHz;计时
    器= 0x48021;计时器= 0x4802 = 0x4MHz;计时器= 0x4MHz;计时器= 0x48021;计时器= 0x4MHz
    时钟=<0x57 0x38 0x18>;
    时钟名称="fck";
    }
    
    ;计时器@
    
    
    
    
    
    
    
    
    
    @48034000{兼容="ti、omap5430-timer";reg =<0x48034000 0x80>;中断=<0x0 0x22 0x4>;ti、hwmds ="timer3";
    ti =<0x57 0x40 0x80>;timer
    = 0x36000= 0x36000";timer = 0x36000";timer = 0x36000";timer = 0x36000"
    中断=<0x0 0x23 0x4>;
    ti、hwmds ="timer4";
    时钟=<0x57 0x48 0x18>;
    时钟名称="fck";
    phandle =<0x9e>;
    }
    
    ;计时器@48820000{
    compatible ="ti、omap5430-timer";
    reg =<0x48820000 0x80>
    ;时
    
    
    钟= 0x4e>;"timerhinds
    
    = 0x24";0x4hwmycle= 0x24";"timershocks = 0x24";0x4>shocks = 0x0004 = 0x0004 = 0x0004;"timermycle"
    
    计时器@
    
    
    
    
    
    
    
    
    
    @48822000{compatible ="ti、omap5430-timer";reg =<0x48822000 0x80>;interrupts =<0x0 0x25 0x4>;ti、hwmods ="timer6";Clocks =<0x90 0x20 0x18>;clock-names ="fck ";phandle =<0xd6>
    
    
    
    ;timer = 0x4800"= 0x4800";timer = 0x4800"计时器= 0x4800";timer = 0x4800"计时器= 0x4800";timer = 0x4800"计时器= 0x4800";timer = 0x4800"计时器= 0x4800"= 0x4800";timer =
    时钟=<0x90 0x28 0x18>;
    时钟名称="fck";
    phandle =<0x97>;
    }
    
    ;计时器@
    
    
    
    
    
    
    
    
    
    @48826000{Compatible ="ti、omap5430-timer";reg =<0x48826000 0x80>;interrupts =<0x0 0x27 0x4>;
    ti、monds ="0x3e80";timer
    = 0x4808;clocks = 0x3e80>;clocks = 0x4808;clocks = 0x80>
    中断=<0x0 0x28 0x4>;
    ti、hwmds ="timer9";
    时钟=<0x57 0x50 0x18>;
    时钟名称="fck";
    phandle =<0x9f>;
    }
    
    ;计时器@48086000{
    compatible ="ti、omap5430-timer";
    reg =<0x48086000 = 0x57>
    
    
    
    
    
    ;时钟= 0x29>;"hwems"= 0x29>;"timerds = 0x29"
    
    计时器@
    
    
    
    
    
    
    
    
    
    @48088000{compatible ="ti、omap5430-timer";reg =<0x48088000 0x80>;interrupts =<0x0 0x2a 0x4>;ti、hwmds ="timer11";Clocks =<0x57 0x30 0x18>;clock-names ="fck";phandle =<0x95>;ti、hwmonds ="0x4500";timer
    =
    0x4btimer =
    0x000a;timer = 0x4a 计时器= 0x000a;timer;timer = 0x4a
    
    计时器= 0x000a 计时器= 0x80>
    
    时钟=<0x8F 0x28 0x18>;
    时钟名称="fck";
    }
    
    ;计时器@
    
    
    
    
    
    
    
    
    
    @48828000{兼容="ti、omap5430-timer";reg =<0x48828000 0x80>;中断=<0x0 0x153 0x4>;ti、hwmods ="timer13";
    ti =<0x570x487800";
    reg = 0x480008;timer = 0x480008;timer = 0x4830>
    中断=<0x0 0x154 0x4>;
    ti、hwmds ="timer14";
    时钟=<0x57 0xd0 0x18>;
    时钟名称="fck";
    phandle = 0x96>;
    }
    
    ;计时器@4882c000{
    compatible ="ti、omap5430-timer";
    reg =<0x48cle = 0x18>
    
    
    ;时
    钟= 0x82c00
    ;0x15586>;中断= 0x85"
    
    Timer@
    
    
    
    
    
    
    
    
    
    
    @4882e000{compatible ="ti、omap5430-timer";reg =<0x4882e000 0x80>;interrupts =<0x0 0x156 0x4>;ti、hwmods ="timer16";Clocks =<0x57 0x130 0x18>;clock-names ="faek";assigned ti = 0x57x4dT
    = 0x14000
    
    ;time-clocks = 0x4ds = 0x4ds = 0x4dT = 0x4nocks;time-cluss = 0x4ds = 0x4dT = 0x4nocks;time-nocks = 0x4ds = 0x4nocks = 0x14000>;times = 0x4
    TI、hwmods ="IPU_timer2";
    };
    
    spinlock@4a0f6000{
    compatible ="ti、OMAP4-hwspinlock";
    reg =<0x4a0f6000 0x1000>;
    ti、hwmods ="spinlock";
    #hwlock-cells =<0x1>;
    };
    
    dmm@
    
    
    
    
    
    
    @4e80000 = 0x5800m;reg = 0x4e0004、0x4mr = 0x0001mr;"dr = 0x5am"
    ;"dr = 0x0001m";"dr = 0x000";"dr = 0x5am";"dr = 0x000";"dr = 0x4mc";"0dr = 0x4mc";"0x000";"0x4mcr = 0x4m";"0x4m";"
    
    
    ti、hwmonds ="ipu1";
    iommus =<0x92>;
    ti、rproc-standby-info =<0x4a005520>;
    status ="确定";
    mbox = 0x93 0x94>;
    timers = 0x95 0x96>;
    watchdog-timers =<0x97 0x98>;
    memory-region =<0x99>;
    };
    
    ipc@55020000{
    compatible ="ti、dra7-ipus";
    reg = 0x55020000 0x10000>;
    reg-names ="l22";
    
    
    ipc = 0x009a;iommus = 0x4mus-standby;<us-rts = 0x49a;
    状态="正常";
    mbox =<0x9b 0x9C>;
    计时器=<0x9d>;
    看门狗计时器=<0x9e 0x9f>;
    存储器区域=<0xa0>;
    };
    
    DSP@40800000{
    兼容="ti、dra7-dsp";
    reg =<0x40800000 0x40e00000;
    "lpr1ms"
    ;"1lsprms";"rms" 0x8000、"1ms";"lspr1ms";"ldsp000"
    SYSCON-bootreg =<0x9 0x55c>;
    iommus =<0x1 0xa2>;
    ti、rproc-STANDBY-INFO =<0x4a005420>;
    状态="正常";
    mbox =<0x93 0xa3>;
    计时器=<0xa4>;
    安全装置计时器=<0xA5>;
    存储器区= 0xa6>;
    
    
    I2C@48070000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x48070000 0x100>;
    interrupts =<0x0 0x33 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c1";
    status ="确定";
    时钟频率=<0x61a80>;
    
    tps659038@58{
    兼容="ti、tps659038";
    reg =<0x58>;
    中断父级=<0xa7>;
    中断=<0x0 0x8>;
    #interrupt-cells =<0x2>;
    中断控制器;
    ti、系统电源控制器;
    ti、power-hold;power-mas 覆盖
    phandle =<0xa8>;
    
    tps659038_PMIC{
    compatible ="ti、tps659038-PMIC";
    
    稳压器{
    
    smps12}{
    regulator-name ="smps12";
    regulator-min-microvolt =<0xcf850>;
    regulator-max-microvolt =<0x1312d0>;
    regulator-d随时
    启动;regulator-max-on
    phandle =<0x6>;
    };
    
    smps3{
    reguler-name ="smps3";
    reguler-min-microvolt =<0x149970>;
    reguler-max-microvolt =<0x149970>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xe2>;
    };
    
    smps45{
    reguler-name ="smps45";
    reguler-min-microvolt =<0xcf850>;
    reguler-max-microvolt =<0x1312d0>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    smps6{
    reguler-name ="smps6";
    reguler-min-microvolt =<0xcf850>;
    reguler-max-microvolt =<0x118c30>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    smps8{
    reguler-name ="smps8";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    ldo1{
    reguler-name ="ldo1";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-boot-on;
    reguler-always-on;
    phandle =<bb1>;
    };
    
    ldo2{
    reguler-name ="ldo2";
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    ldo3{
    reguler-name ="ldo3";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    ldo4{
    reguler-name ="ldo4";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xcd>;
    };
    
    ldo9{
    reguler-name ="ldo9";
    reguler-min-microvolt =<0x100590>;
    reguler-max-microvolt =<0x100590>;
    reguler-always-on;
    reguler-boot-on;
    };
    
    ldoln{
    reguler-name ="ldoln";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xcc>;
    };
    
    ldousb{
    reguler-name ="ldousb";
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-boot-on;
    phandle =<0xbb>;
    };
    
    regen1{
    reguler-name ="regen1";
    reguler-boot-on;
    reguler-always-on;
    phandle =<0xE1>;
    };
    };
    };
    
    tps659038_RTC{
    Compatible ="ti、Palms-rtc";
    interrupt-parent =<0xa8>;
    interrupts =<0x8 0x2>;
    wake-source;
    };
    
    tps659038_pwr_Button{
    compatible ="ti、Palms-pwrbutton";
    interrupts-parent =<0xa8>
    
    
    
    
    
    
    
    
    ;<pwell-seconds=0x6524>;<pgpio rupts=0x6524>;<pips-ble>;<pover-seconds=<gpov<potrupts
    
    ;<pips=0x6524>;<gpips-ble>;<pips-ble>;<pip-rupts = 0x6524th-rupts;<p
    
    tps659038_usb{
    compatible ="ti、Palms-usb-vid";
    ti、enable-vBus 检测;
    vbus-gpio =<0xa9 0x15 0x0>;
    phandle =<0xc1>;
    }
    ;
    
    tmp102@
    
    
    
    
    
    
    
    
    @48{compatible ="ti、tmp102";
    
    ti =<0x48>;phirt=<0x320a1.4>;<vicle= 0x320a1.4>;<vicle= 0x3a104>;<vicle>热中断= 0x3a104<vicle>;<icle= 0x3a104<vicle>
    
    分配的时钟=<0x4e>;
    分配的时钟父级=<0x6d>;
    状态="正常";
    ADC-SETTLE-ms =<0x28>;
    AVDD 电源=<0xAB>;
    IOVDD 电源=<0xAB>;
    DRVDD 电源=<0xAB>;
    DVDD-SUPPLY =<0xac>;
    phandle =<0xe9>;
    };
    
    EEPROM@50{
    Compatible ="Atmel、24c32";
    reg =<0x50>;
    };
    };
    
    iwf@48072000{
    compatible ="ti、OM2c-ic4";
    reg =<0x48072000 0x100>;
    interrupts =<0x2mc"
    
    
    
    ;<0x34>= 0x4mcCell = 0x4mc";<0x4mc4 = 0x3c";<c4 = 0xcems"大小<0xc4;ic4 = 0xc4;<cemc4 = 0xcems"
    };
    
    i2c@48060000{
    compatible ="ti、omag4-i2c";
    reg =<0x48060000 0x100>;
    interrupts =<0x0 0x38 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c3";
    status ="确定";
    时钟频率=<0x61a80>;
    
    RTC@6F{
    兼容="微芯片、mcp7941x";
    reg =<0x6f>;
    中断扩展=<0x1 0x0 0x2 0x1 0x8e 0x424>;
    中断名称="IRQ"、"WAKEUP";
    VCC-SUPPLY =<0xab>;
    唤醒源;
    };
    };
    
    i2c@4807a000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x4807a000 0x100>;
    interrupts =<0x0 0x39 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c4";
    status ="disabled";
    };
    
    i2c@4807c000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x4807c000 0x100>;
    interrupts =<0x0 0x37 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c5";
    status ="disabled";
    };
    
    MMC@4809c000{
    compatible ="ti、dra7-sdhci";
    reg =<0x4809c000 0x400>;
    interrupts =<0x0 0x4e 0x4>;
    ti、hwmods ="mmc1";
    status ="确定";
    pbias 电源=<0xAD>;
    最大频率=<0xb1b000>;
    MMC-DDR-1_8v;
    MMC-DDR-3_3V;
    pinctrl-names ="默认值"、"hs";
    pinctrl-0 =<0xae>;
    总线宽度=<0x4>;
    CD-GPIO =<0xaf 0x1b 0x1>;
    pinctrl-1 =<b0>;
    VMMC-supply =<b1>;
    NO-1-8-v;
    };
    
    1W@480b2000{
    compatible ="ti、OMAP3-1W";
    reg =<0x480b2000 0x1000>;
    interrupts =<0x0 0x35 0x4>;
    ti、hwmods ="hdq1w";
    };
    
    MMC@480b4000{
    compatible ="ti、b7-sdhci";
    reg =<0x480b4000 = 0x3mctrab-mcus/mctrabs-0x000>
    ;
    
    0x3mcr = 0x3mcr
    
    = 0x3mcr = 0x3mctrabs-mcus/mcr = 0x0001mcr;0x000-2mcr = 0x3mcr;0x3mcr = 0x3mcr = 0x3mcr = 0x000-2mcr;0x3mcr = 0x3mcr = 0xdmmcr;
    
    
    
    pinctrl-names ="default";
    pinctrl-0 =<bb2>;
    VMMC-supply =<0xab>;
    vqmmc-supply =<0xab>;
    总线宽度=<0x8>;
    不可拆卸;
    no-1-8-v;
    };
    
    MMC@
    
    
    
    
    
    
    
    
    
    @480ad000{compatible ="ti、dra7-sdhci";reg =<0x480ad000 0x400>;interrupts =<0x0 0x59 0x4>;ti、hwmods ="mmc3";status ="disabled";max-frequency =<0x480dci
    =<0x1000 0x400dmmc = 0x400"
    
    ;smcr = 0x400ddhcr = 0x400";s_dmcr = 0x400dcr = 0x400mcr = 0x400dcr = 0x400dcr = 0x400dcr;s_dmcr = 0x400dcr = 0x400mcr = 0x400dcr;<0x400dcr = 0x400dcr = 0x400dcr =
    
    0x
    max-frequency =<bbbbb71b000>;
    sdhci-caps-mask =<0x0 0x400000>;
    };
    
    MMU@
    
    
    
    
    
    
    
    
    
    @40d01000{compatible ="ti、dra7-dsp-iommu";reg =<0x40d01000 0x100>;interrupts =<0x40dmu1;<0x40mu1 mu1;<mu0x0xmu1 mu1;<mu1 mu1 mu1}<mu1 mu1;<0x40mu1 mu1 mu1;<0x2000>
    
    
    
    TI、hwmuds ="mu1_dsp1";
    #iommu-cells =<0x0>;
    ti、SYSCON-mumconfig =<bbb3 0x1>;
    phandle =<0xa2>;
    };
    
    mu@58882000{
    compatible ="ti、dra7-iommu";
    reg =<0x58802mu>
    
    
    ;<mu-iphus= 0x100>;<ipumb = 0x100>;<ipumb = 0x100>;<ipum-its = 0x100>
    
    
    };
    
    MMU@55082000{
    compatible ="ti、dra7-iommu";
    reg =<0x55082000 0x100>;
    interrupts =<0x0 0x18c 0x4>;
    ti、hwmids ="MMU_ipu2";
    #iommu-cells =<0x0>;
    ti、iommu-bus-le-back
    = 0x9a;anderr;
    };
    
    pruss-SoC-bus@4b226004{
    兼容="ti、am5728-pruss-SoC-bus";
    reg =<0x4b226004 0x4>;
    ti、hwmds ="pruss1";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="确定";
    
    pruss@4b200000{
    兼容="ti、am5728-pruss";
    reg =<0x4B200000 0x80000>;
    中断=<0x0 0xba 0x4 0xbb 0x4 0xb0 0x4 0xbd 0x4 0x4 0x0 0x0 0x4 0x0 0x4 0x0 hostf 0x4 0x4 0x4 0xc4 0xc4 0x4 0xc4 0x4 0x4 0xc4 0x4 0xc4 0x4 0xc4 0x4、"0x4 0x4 0xc1"
    、"0x4 0x4 0x4 0x4 0xc"、"0x4 0x4 0x4 0x4 0xc" "host6"、"host7"、"host8"、"host9";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="正常";
    
    存储器@4b200000{
    reg =<0x4b200000 0x2000 0x4b202000 0x2000 0x2000 0x4b210000 0x8000 0x4b22e000 0x31c 0x4b230000 0x60>;
    reg -names ="dram0"、"dram1"、"shram1"、"shrep"、"shrep"、"IE2"、"shram2" "ECAP";
    };
    
    cfg@4b226000{
    compatible ="SYSCON";
    reg =<0x4b226000 0x2000>;
    };
    
    MII-RT@4b232000{
    compatible ="SYSCON";
    reg =<0x4b232000 0x58>;
    };
    
    interrupt-controller@4b220000{
    compatible ="0x5760"
    
    
    
    
    ;<cell-cells = 0x4b2b2b2b2b>;<cells = 0x4b2b2b2b2b<cells = 0x2000>;}
    
    PRU@4b234000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b234000 0x3000 0x4b222000 0x400 0x4b222400 0x100>;
    reg 名称="IRAM"、"控制"、"调试";
    固件名称="am57xx-pru1_0-FW";
    interrupt-parent =<bbx4>;
    interrupts =<0x10 0x11>;
    interrupt-names ="vring "、"kind";
    }
    
    ;PRU@4b238000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b238000 0x3000 0x4b224000 0x400 0x4b224400 0x100>;
    reg-debug"
    、"pr-names";"pr-control-names"、"pr-rmware"
    interrupt-parent =<bbx4>;
    interrupts =<0x12 0x13>;
    interrupt-names ="vring "、"kind";
    };
    
    MDIO@4b232400{
    compatible ="ti、Davinci_MDIO";
    reg =<0x4b232400 0x90>;
    #address-cells =<0x1>;
    #size-cells =<0x0>
    
    ;<cock-names =<focks =<0x5>;
    bus_freq =<0xf4240>;
    状态="禁用";
    };
    };
    };
    
    pruss-SoC-bus@4b2a6004{
    兼容="ti、am5728-pruss-so-bus";
    reg =<0x4b2a6004 0x4>;
    ti、hwmds ="pruss2";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="确定";
    
    PRUSS@4b280000{
    兼容="ti、am5728-pruss";
    reg =<0x4b280000 0x80000>;
    中断=<0x0 0xc4 0x0 0xc5 0x4 0x0 0xc6 0x4 0x0 0xc7 0x4 0x4 0xc8 0x4 0x4 0xc4 0xc4 0xc5 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4、
    "hostnames = 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0x "host6"、"host7"、"host8"、"host9";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="正常";
    
    存储器@4b280000{
    reg =<0x4b280000 0x2000 0x4b282000 0x2000 0x2000 0x4b290000 0x8000 0x4b20000x31c 0x4b2b0000 0x60>;
    reg 名称="shram0"、"shram1"、"shram1"、"shrame2"、"IEP"、"shram2" "ECAP";
    };
    
    cfg@4b2a6000{
    compatible ="SYSCON";
    reg =<0x4b2a6000 0x2000>;
    };
    
    MII-RT@4b2b2000{
    compatible ="SYSCON";
    reg =<0x4b2b2000 0x58>;
    }
    
    ;interrupt-controller@4b2a0000 =
    0x57ble>
    
    
    ;interrupt-cells = 0x4b2b2bt;<cells
    
    = 0xb2b2b0xb2b0sb0sb0sb0xb<cells;<cells;<cell-cells = 0xb2b2b0xb2b
    
    PRU@4b2b4000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b2b4000 0x3000 0x4b2a2000 0x400 0x4b2a2400 0x100>;
    reg-names ="IRAM"、"control"、"debug";
    firmware-name ="am57xx-pru2_0-fw";
    interrupt-parent =<bb6>;
    interrupts =<0x10 0x11>;
    interrupt-names ="vring"、"kind";
    };
    
    PRU@4b2b8000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b2b8000 0x3000 0x4b2a4000 0x400 0x4b2a0x4400 0x100>
    
    ;"debug-names"、"am571";"pr-control-names"、"pr-ry"
    interrupt-parent =<bbb6>;
    interrupts =<0x12 0x13>;
    interrupt-names ="vring "、"kind";
    };
    
    MDIO@4b2b2400{
    compatible ="ti、DaVinci_mdio";
    reg =<0x4b2b2400 0x90>;
    #address-cells =<0x1>;
    #size-cells =<0xb0>
    ;
    clocks =<bcocks =<buck>;
    bus_freq =<0xf4240>;
    状态="禁用";
    };
    };
    };
    
    电脑控制器- ABB - MPU{
    compatible ="ti、ABB - v3";
    电脑控制器名称="ABB_MPU";
    #address-cells =<0x0>;
    #size-cells =<0x0>;
    Clocks =<0x11>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07ddc 0x4 0x4ae07de0 0x4 0x4ae06014 0x4 0x4a003b20 0xc 0x4ae0c158 0x4>;
    reg-names ="setup-address"、"control-address"、"efint-address"、"use"、"efint "LDO-address";
    ti、traxdo-status-mask =<0x80>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x102ca0 0x0 0x0 0x0 0x2000000 0x1f00000 0x11bs-mask = 0x000>
    
    
    
    
    
    
    
    ;0x0000-0x0x0x0x0x1000-1 0x000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x1000-1 bv3-0x000+ 0x0000_bv3-0x000+ 0x0000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0>
    时钟=<0x11>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07e34 0x4 0x4ae07e24 0x4 0x4ae06010 0x4 0x4a0025cc 0xc 0x4a002470 0x4>;
    reg-names ="setup-address"、"control-address"、"efine-address"、"use-address"、"efint-address" "LDO-address";
    ti、traxdo-status-mask =<0x40000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10ABB 0x0 0x0 0x0 0x0 0x2000000 0x1f00000 0x1d00
    
    
    ;<0x0000-0x0x0x0x1d0;d1 0x0000-0x0>
    兼容
    
    
    的单位0x0000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0>;d1个单位0xd1个单位0x0000-0x0x0x0x0x0x0x0x0~0x
    
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07e30 0x4 0x4ae07e20 0x4 0x4ae06010 0x4 0x4a0025e0 0xc 0x4a00246c 0x4>;
    reg-names ="setup-address"、"control-address"、"efine"、"int-address" "LDO-address";
    ti、traxdo-status-mask =<0x20000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10ABB 0x0 0x0 0x0 0x0 0x2000000 0x1f00000 0x1cv3-0x000<0x000>
    
    
    
    
    
    
    ;<GPUb-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0>;0x1000-1 0x0000_000<GPUb-0x0x0x0x0x0x0 = 0x0000_000<0x0000_000<1 0x000>
    
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07de4 0x4 0x4ae07de8 0x4 0x4ae06010 0x4 0x4a003b08 0xc 0x4ae0c154 0x4>;
    reg-names ="setup-address"、"control-address"、"efint-address"、"efint 使用" "LDO-address";
    ti、tranxdo-status-mask =<0x10000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10a1d0 0x0 0x0 0x2000000 0x0001f00000
    
    
    @
    
    ;0x270004
    0x0004 0x0004 0x0001mc4;0x804c4 0x0001mc4 0x0001mc4 0x0001c4 0x804;0x804c4 0x0001c4 0x804 0x000-0x381c4 0x000> 0x0001c4 0x0001m4 0x0001m4 0x0001c4 0x0001c4 0x0001c4;0x0001c4 0x0001c4 0x000-0x804
    
    #size-cells =<0x0>;
    ti、hwmds ="mcspi1";
    ti、spi-num-cs =<0x4>;
    DMA =<0x8d 0x23 0x8d 0x24 0x8d 0x25 0x8d 0x26 0x8d 0x27 0x8d 0x28 0x8d 0x29 0x8d 0x2a>;
    DMA 名称="tx0"、"rx0"、"tx1"、"rx1"、"rx1"、 "tx2"、"rx2"、"TX3"、"rx3";
    status ="disabled";
    };
    
    SPI@4809a000{
    兼容="ti、omap4-mcspi";
    reg =<0x4809a000 0x200>;
    中断=<0x0 0x3D 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="mcspid2";
    ti、spi-cnum = 0x2>;
    DMA =<0x8d 0x2b 0x8d 0x2C 0x8d 0x2D 0x8d 0x2e>;
    dma-names ="tx0"、"rx0"、"tx1"、"rx1";
    状态="禁用";
    }
    
    ;SPI@480b8000{
    兼容="ti、OMAP4-mcspi";
    reg =<0x480b8000 0x200>;
    中断=<0x0 0x56 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、spimds ="mc3";
    <SPI-num = 0x2>;
    DMA =<0x8d 0xF 0x8d 0x10>;
    DMA-名称="tx0"、"rx0";
    状态="禁用";
    };
    
    SPI@480ba000{
    compatible ="ti、OMAP4-mcspi";
    reg =<0x480ba000 0x200>;
    interrupts =<0x0 0x2b 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="mcspi4";
    ti、SPI-num-cs = 0x1>;
    DMA =<0x8d 0x46 0x8d 0x47>;
    dma-names ="tx0"、"rx0";
    status ="禁用";
    };
    
    QSPI@4b300000{
    compatible ="ti、dra7xxx-QSPI";
    reg =<0x4b300000 0x100 0x5c000000 0x4000000>;
    reg 名称="QSPI_base"、"QSPI_mMAP";
    SYSCON-chipsSELECs=<0x9 0x157>;
    #address-cells =<0x1>;<0x138<hocks
    
    
    
    = 0x57>
    
    
    ;<cocks = 0x138<x0>= 0x4hms = 0x138<cocks = 0x4>;<x4nocks = 0x4nocks = 0x138-s
    = 0x4nocks;<xnocks = 0x138nocks = 0x4nocks = 0x4nocks = 0x138
    
    ocp2scp@4a090000{
    compatible ="ti、OMAP-ocp2scp";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges;
    reg =<0x4a090000 0x20>;
    ti、hwmonds ="ocp2scp3";
    
    phy@4a096000 = 0x4a80"
    
    
    ;rev = 0x4aQ1sby-cr = 0x4a960080;0x4py
    = 0x4aQ4py = 0x4a80>
    
    时钟名称="SYSCLK"、"REFCLK";
    SYSCON-PLRESET =<0x9 0x3fc>;
    #phy-cells =<0x0>;
    phandle =<0xb9>;
    };
    
    pciephy@4a094000{
    compatible ="ti、phy-pipe3-pce";
    reg = 0x4000-iphy
    = 0x85>
    ;SYSCON-0x4000-by-cPhy = 0x85>;SYSCON_994cy = 0x4000-cy = 0x85>
    
    时钟=<0x3E 0x3f 0xb7 0x90 0x8 0xb7 0x90 0x9 0xb7 0x90 0xA 0xb8 0x11>;
    时钟名称="DPLL_ref"、"DPLL_ref_m2"、"wkupclk"、"REFCLK"、 "div-clk"、"phy-div"、"SYSCLK";
    #phy-cells =<0x0>;
    phandle =<0x84>;
    };
    
    pciephy@4a095000{
    compatible ="ti,phy-pipe3-pce";
    reg =<0x4a095000 0x80 0x4a095400 0x64>;
    reg 名称="phy_Rx"、"bphy_TX";
    SYSCON-phy-power =<0x85 0x20>;
    SYSCON-0x8_0x8_b1bl = 0x78"
    、0x8bl 0x7_clkb 0x7_clkb;"0x8_clr" 0x8_clr" 0x8_clk" 0x8_clk"、0x8_clk" 0x8_clk"
    "div-clk"、"phy-div"、"SYSCLK";
    #phy-cells =<0x0>;
    状态="禁用";
    phandle =<0x89>;
    };
    
    
    SATA@4a141100{
    兼容="SNPS,DWC-AHCI";
    reg =<0x4a140000 0x1100 0x4a141100 0x7>;
    中断=<0x0 0x31 0x4>;
    phys =<bbb9>;
    phy-names ="SATA-ti";
    
    
    
    status = 0x68;sategy = 0x7;phy-ports = 0xb0Xb>;phy = 0xb0b;phy = 0x68;phy-ports = 0xbnh
    ;phy = 0x68;phy-ports = 0xbnh;phy = 0xbn
    
    RTC@48838000{
    compatible ="ti、am3352-rtc";
    reg =<0x48838000 0x100>;
    interrupts =<0x0 0xd9 0x4 0x0 0xd9 0x4>;
    ti、hwmds ="rtcs";
    Clocks =<0x50>;
    };
    
    ocp2scp@
    
    
    
    
    
    
    
    @4a080000 =<v1uamps
    ;"v1uamps ="uamps;"ip-cells = 0x4pb2、ips";"082pr";"v"= 0x4pb2、ip-cells = 0x4b2、"v";"am"= 0xb2、ip-cells = 0x4pb2、"ues";"am"= 0x4pb2、ip-cells = 0xb2、"u";"v"= 0x4b2
    reg =<0x4a084000 0x400>;
    SYSCON-phy-power =<0x9 0x300>;
    时钟=<0xba 0xd0 0x8>;
    时钟名称="wkupclk"、"REFCLK";
    #phy-cells =<0x0>;
    phy-supply =<0xbb>;
    phandle =<bbbbv>;
    };
    
    phy@4a085000{
    compatible ="ti、dra7x-USB2-phy2"、"ti、OMAP-USB2";
    reg =<0x4a085000 0x400>;
    SYSCON-phy-power =<0x9 0xb2-phy74>;
    clock =<clc 7 0x20 0x20 0xb>
    
    ;<by-supply = 0xby-cy<cy<cy<cy<cy<cy<bxbxb<bxb<b<b<b<b<bv<b<b<b<b<bv<b<
    
    phandle =<0xC2>;
    };
    
    phy@4a084400{
    compatible ="ti、OMAP-USB3";
    reg =<0x4a084400 0x80 0x4a084800 0x64 0x4a084c00 0x40>;
    reg-names ="Rx_phy"、"phy_TX"、"PLL_ctrl";SYSCON=0x7nb-0xrk>
    、0xby-cocks
    
    
    = 0xby-clbd = 0xx0xrk>、0xby-cocks = 0xby";0xby-cocks = 0xby-clk#xrs = 0xby-clbd;0xxrk-0xrk-0x0xrbd = 0xbd = 0xb
    phandle =<0xc0>;
    };
    }
    
    ;目标模块@4a0dd000{
    compatible ="ti、sysc-omap4-SR"、"ti、sysc";
    ti、hwmods ="SmartReflex_core";
    reg =<0x4a0dd038 0x4>;
    reg-names ="sysc";
    <0x4a0x1>
    
    
    
    = 0x0000>;0x0000=0x0000<sysmask
    
    = 0x000<0x0000>;0x0000.0x3<0x0000>
    
    
    目标模块@
    
    
    
    
    
    
    
    
    
    
    
    
    
    @4a0d9000{compatible ="ti、sysc-omap4-SR"、"ti、sysc";ti、hwmonds ="SmartReflex_MPU";reg =<0x4a0d9038 0x4>;reg-names ="sysc";ti、dwc-mask =<0x4000000>;reg = 0x48000-1;syscclocks = 0x481<0x0001>;syscclocks = 0x481<0x3>
    
    TI、hwmods ="USB_OTG_SS1";
    reg =<0x48880000 0x10000>;
    中断=<0x0 0x48 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    utmi-mode =<0x2>;
    范围;
    
    USB@48890000{
    compatible ="SNP、dwc3";
    reg =<0x48890000 0x17000>;
    interrupts =<0x0 0x47 0x4 0x47 0x4 0x0 0x48 0x4>;
    interrupt-names ="peripheral"、"host"、"OTG";
    phy =<phy f 0xc0>;
    ddr-names ="USB2"
    、"super-speed"、"USB2"、"super-mode"="phy-b3";b3"
    
    SNP、ds_u3_suspuhy_quirik;
    SNP、ds_u2_suspuhy_quik;
    };
    
    
    OMAP-dwc3_2@488c0000{
    兼容="ti、dwc3";
    ti、hwmds ="USB_OTG_SS2";
    reg =<0x488c00000x10000>;
    <0x57
    
    = 0x1;<out1 = 0x57单元格;<out1 = 0x1;<out1 = 0x1;<out1;<out1;<out1 = 0x1;<out1;<out1;<out1 = 0x1;<out1;<out1;<out1;<out1
    
    
    extcon =<0xc1>;
    
    USB@488d0000{
    兼容="SNPs、dwc3";
    reg =<0x488d0000 0x17000>;
    中断=<0x0 0x49 0x4 0x49 0x4 0x0 0x57 0x4>;
    中断名称="外设"、"主机"、"OTG";
    PHY = 0xC2>;
    PHY-names ="USB2-phy";
    最大速度="高速";
    dr_mode ="外设";
    SNP、ds_u3_suspuhy_quirik;
    SNP、ds_u2_suspuhy_quirik;
    SNP、dis_metastability _quirk;
    }
    ;
    
    OMAP-dwc3_3@48900000{
    兼容="ti、dwc3";
    ti、hwmds ="USB_OTG_SS3";
    reg = 0x48900000 0x10000>;
    中断= 0x0 0x158 0x4>;
    #address-cells =<0x1
    
    ;<utmi-cells = 0x1;<out1 =<utmi-cells = 0x1;<utmikes = 0x1;#-modes =<utmi-cells
    =<0x1;<out
    状态="禁用";
    
    USB@48910000{
    兼容="SNP、dwc3";
    reg =<0x48910000 0x17000>;
    中断=<0x0 0x58 0x4 0x58 0x4 0x4 0x0 0x158 0x4>;
    中断名称="外设"、"主机"、"OTG";
    最大速度="高速";
    DR_MODE ="OTG";
    SNP、ds_u3_suspuhy_quirk;
    SNP、ds_u2_suspuhy_quirk;
    };
    };
    
    Elm@48078000{
    compatible ="ti、am3352-elm";
    reg =<0x48078000 0xfc0>;
    interrupts =<0x0 0x1 0x4>;
    ti、hwmds ="elm";
    status ="disabled";
    };
    
    GPMC@50000000{
    compatible ="ti、am3352-gpMC";<0xmcc
    
    = 0x400c = 0x000>
    ;<0x300mcc = 0x400c = 0x400c =
    
    0x400c;<0xmcr = 0xmcr = 0x400c = 0x400c = 0x000>
    
    GPMC、num-waitpins =<0x2>;
    #address-cells =<0x2>;
    #size-cells =<0x1>;
    中断控制器;
    #interrupt-cells =<0x2>;
    GPIO-controller;
    #GPIO-cells =<0x2>;
    status ="禁用";
    };
    
    ATL@
    
    
    
    
    
    
    
    
    
    @4843c000{compatible ="ti、dra7-atl";reg =<0x4843c000 0x3ff>;ti、hwmods ="atl";ti、provided 时钟=<0xc4 0xc5 0xc6 0xc7>;clocks =<0x10 0x0 0x8001ti>;clock-ams
    ="0x46000";cr = 0x46000" Mcd"= 0x48000";clock-am"= 0x46000" Mcd"
    
    
    reg-names ="MPU"、"dat";
    中断=<0x0 0x68 0x4 0x0 0x67 0x4>;
    中断名称="TX"、"RX";
    DMA =<0xc3 0x81 0x1 0xc3 0x80 0x1>;
    dma-names ="TX"、"RX";
    cl1c =<0x90 0x10 0xkr
    
    = 0x90"、"clks";clkr = 0x90"0x10"0x90";clk"
    };
    
    McASP@48464000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp2";
    reg =<0x48464000 0x2000 0x45c00000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x95 0x4 0x94 0x94 0x0000x000>
    ;"0xcrx
    
    1 = 0x3";"ta-rx 1 = 0xts";"0xta-rx 1 = 0xt";"0xcrx 1 = 0xt";"0xcrx 1 = 0xt";"0xcrx 2 = 0xt";"0xta-r
    时钟=<0x57 0x160 0x16 0x57 0x160 0x18 0x57 0x160 0x1c>;
    时钟名称="fck"、"ahclkx"、"ahclkr";
    状态="禁用";
    };
    
    McASP@48468000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp3";
    reg =<0x48468000 0x2000 0x46000000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x97 0x4 0x96 0x4>;
    "0x85mA-RX"=
    0x85"
    ;"0xctransc";"rx 名称= 0xctrans"= 0xctrans"、"0xctrans";"0xctrans"= 0xctrans";"0xctransc-rx 1 = 0x85";"rx
    时钟=<0x57 0x168 0x16 0x57 0x168 0x18>;
    时钟名称="fck"、"ahclkx";
    状态="正常";
    #sound-di-cells =<0x0>;
    分配时钟= 0x57 0x168 0x18>;
    分配时钟父节点= 0x60>;
    运算模式=<0x0>;
    tdm-slots =<0x2>;
    serial-dir =<0x1 0x2 0x0>;
    TX-num-evt =<0x20>;
    Rx-num-evt =<0x20>;
    <0x8
    };eandle = 0x8;
    
    McASP@4846c000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp4";
    reg =<0x4846c000 0x2000 0x48436000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x99 0x4 0x98 0x98 0x4> 0x87
    
    
    ;0x170x17x 1 = 0x17x
    1;"0xDAM" 0x17" 0x17x 0x17";"0x17x RX-Rx1" 0x17";"0x17" 0x17x 0x17" 0x17"= 0x17x 0x17" 0x17";"0x17" 0x17x 0x17" 0x17" 0x17" 0x17x 0x17x 0x17
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@48470000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp5";
    reg =<0x48470000 0x2000 0x4843a000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9b 0x0 0x9a 0x4 0x9a 0x4>;
    0x57x
    
    0x18x = 0x178178a 0x178;0x178 0x3RX = 0x178 0x27x
    1;"rx r" 0x178-r" 0x17x 1、"rx 1、"rx 名称0x17x"
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@48474000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp6";
    reg =<0x48474000 0x2000 0x4844c000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9d 0x4 0x9C 0x4 0x57 0x4c 0x18>
    ;0x4c
    
    
    = 0x18x 0x4b = 0x4r 0x18";0x4r 0x4c = 0x18x 1 0x4r 0x4r 0x4r = 0x4r = 0x4r 0x4b;0x4r = 0x4r 0x4r 0x4r = 0x4r 0x4r = 0x4r 0x4r = 0x4r 0x4r = 0x
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@48478000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp7";
    reg =<0x48478000 0x2000 0x48450000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9f 0x4 0x9e 0x4>;reg =
    
    
    
    0x8208 = 0x18";0x3TX = 0xcr = 0x5rx 1;0xcr = 0x3c = 0x5rx 1、0x5rx 1、0x5rx 1;0xcr = 0x5rx 1、0x5rx 1、0xcr = 0x5rx 1、0x5rx 1、0xcr = 0x5r = 0x5r
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@4847c000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp8";
    reg = 0x4847c000 0x2000 0x48454000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x1 0x4 0xa0 0xa0 0x4 0x4> 0x57
    
    
    ;0x3TX = 0x517"
    ;"0x5rx 1" 0x5rx 1 0x3";"0x5rx 1" 0x3" 0xc" 0x5rx 1 0x5r";"0x5rx 1rx 1 0x17";"0x1rx 1rx 1 0x3" 0xta-rx 1 0x17" 0x5rx 1
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    crossbar@4a002a48{
    compatible ="ti、irq-crossbar";
    reg =<0x4a002a48 0x130>;
    中断控制器;
    interrupt-parent =<0x8>;
    #interrupt-cells =<0x3>;
    ti、max-IRQ =<0xa0>;
    TI、max-crossbar-sources=<0x190>;
    ti、reg-size =<0x2>;
    ti、IRQs-reserved =<0x0 0x1 0x2 0x3 0x5 0x6 0x83 0x84>;
    ti、IRbs-skip =<0xA 0x85 0x8b 0x8c>;
    ti、IRQs-safe-map =<0x48b"
    
    
    
    @
    
    ;"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";"cts = 0x48b"、"cts = 0x48b";cs"、"cts = 0x48b"
    ;"cs"、"cts = 0x48b";"cs"、"cs"、"cs"、"cts = 0x48bs";"c
    
    cpdma_channels =<0x8>;
    ale_entries =<0x400>;
    bd_ram_size =<0x2000>;
    mac_control =<0x20>;
    从设备=<0x2>;
    ACTIVE_SLAVE =<0x0>;
    CPT_clock_mult =<0x784cfe14>;
    CPTs_clock_shift =<0x1d>;
    reg =<0x48484000 0x1000 0x48485200 0x2e00>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ti、no-idle;
    中断=<0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4 0x4 0x4 0x4 0x1;
    
    <SYSCON>
    = 0x15;"SYON_STATUS = 0x151";<0x151";"SYSCON_AC"
    
    
    MDIO@48485000{
    兼容="ti、cpsw-mdio"、"ti、Davinci_mdio";
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="Davinci_mdio";
    bus_freq =<0xf4240>;
    reg =<0x48485000 0x100>;
    
    ethernet-phy@1{
    reg =<0x1>;
    phandle =<0xc9>;
    };
    
    ethernet-phy@2{
    reg =<0x2>;
    status ="禁用";
    最大速度=<0x64>;
    phandle =<0xca>
    ;}
    };
    
    从站@48480200{
    mac-address =[00 00 00 00 00 00 00];
    phy-handle =<0xc9>;
    phy-mode ="RGMII";
    dual_EMAC_res_vlan =<0x1>;
    };
    
    从站@48480300{
    mac-address =[00 00 00 00 00 00 00];
    phy-handle =<0xca>;
    phy-mode ="RGMII";
    dual_EMAC_res_vlan =<0x2>;
    };
    
    cpsw-phy-SEL@4a002554{
    compatible ="ti、dra7xx-cpsw-phy-SEL";
    reg =<0x4a002554 0x4>;
    reg-names ="gmii-SEL";
    };
    
    
    CAN@
    
    
    
    
    
    
    
    
    
    @4a3cae000{compatible ="ti、dra7-dCAN ";reg = 0x480000 = 0x487>00;CAN = 0x48d1;CAN = 0x48d1;
    CAN = 0x48d1;CAN = 0x48d1 = 0x48d1;CC3cr = 0x48d= 0x48d1;CAN = 0x48d1;CAN = 0x48d= 0x48d+
    TI、hwmods ="dcan2";
    reg =<0x48480000 0x2000>;
    SYSCON-raminit =<0x9 0x558 0x1>;
    中断=<0x0 0xe1 0x4>;
    时钟=<0x11>;
    状态="禁用";
    }
    
    ;
    
    GPU@56000000{compatible ="ti、7-sgx544;clocks = 0x544"
    
    
    ;"GPU_clus"= 0x544">"
    寄存器= 0x544">"、0x544";"GPU";"0x544";"GPUgcu = 0x544";"0x544cu = 0x544">"
    时钟名称="iclk"、"fclk1"、"fclk2";
    状态="禁用";
    };
    
    bb2d@
    
    
    
    
    
    
    
    
    
    @59000000{compatible ="ti、dra7-bb2d";reg =<0x59000000 0x700>;interrupts =<0x0 0x78 0x4>;ti、hwmods ="bb2d";Clocks =<0xcb 0x10 0x0>;clock-names ="fcc";status ="ok";ti、hwminds ="0x58600";cls
    
    
    
    
    = 0x599x ="dss";cl-core-cells = 0x599x = 0x599";cls = 0x4s ="dss";cls = 0x599x ="dss";cls = 0x5cock-cls = 0x5cock-c
    #size-cells =<0x1>;
    范围;
    reg =<0x58000000 0x80 0x58004054 0x4 0x58004300 0x20 0x58009054 0x4 0x58009300 0x20>;
    reg 名称="DSS"、"pll1_clkctrl"、"pll1"、"pll2_clkctrl"、 "pll2";
    时钟=<0xcb 0x0 0x8 0xcb 0x0 0xc 0xcb 0x0 0xd>;
    时钟名称="fcl"、"video1_clk"、"video2_clk";
    VDDA_VIDEA-SUPPLY =<0xcc>;
    
    dispc@
    
    
    
    
    
    
    
    
    
    @58001000{compatible ="ti、dra7-dispc";reg =<0x58001000 0x1000>;interrupts =<0x0 0x14 0x4>;ti、hwmods ="dss_dispc";Clocks =<0xcb 0x0 0x8>;clock-names ="fpel";SYSCON-534 = 0x600800080
    
    = 0x800080;0x58000200 reg;0x8050000> 0x40000800080 = 0x805800080;0x4000080 HDMI 编码器0x805800080 = 0x4000080 0x800080 = 0x4000080
    reg-names ="wP"、"pll"、"phy"、"core";
    中断=<0x0 0x60 0x4>;
    状态="ok";
    ti、hwmds ="DSS_HDMI";
    时钟=<0xcb 0x0 0x9 0xcb 0x0 0xA>;
    时钟名称="Fck)、"sys_clk";
    DMA =<0x8d 0x4c>;
    
    
    
    
    
    
    端点名称="音频"0xce"
    
    
    
    ;<0xce"= 0xcle>;<0xce-port>;<0xce-port>= 0x5<0xce";<0xce-port>;<0xce-port>= 0xce-port>;<0xce-port>= 0xce-port>= 0xce-port>
    };
    
    epwmss@4843e000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x4843e000 0x30>;
    ti、hwmds ="epwms0";
    #address-cells =<0x1>;
    #size-cells =<0x1>
    ;status ="disabled";
    范围;
    
    PWM@4843e200{
    兼容="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x4843e200 0x80>;
    时钟=<0xcf 0xb>;
    时钟名称="TBCLK"、"fck";
    状态=禁用
    }
    
    eCAP@4843e100{
    兼容="ti、dra746-eCAP"、"ti、am3352-eCAP";
    #PWM-cells =<0x3>;
    reg =<0x4843e100 0x80>;
    时钟=<0xb>;
    时钟名称="Fck";
    状态="禁用";
    };
    };
    
    epwmss@48440000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x48440000 0x30>;
    ti、hwmds ="epwms1";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    status ="disabled";
    范围;
    
    PWM@48440200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x48440200 0x80>;
    时钟=<0xd0 0xb>;
    时钟名称="TBCLK"、"fck";
    状态=禁用
    };
    
    eCAP@48440100{
    兼容="ti、dra746-eCAP"、"ti、am3352-eCAP";
    #pwM-cells =<0x3>;
    reg =<0x48440100 0x80>;
    时钟=<0xb>;
    时钟名称="Fck";
    状态="禁用";
    };
    };
    
    epwmss@48442000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x48442000 0x30>;
    ti、hwmds ="epwms2";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    status ="disabled";
    范围;
    
    PWM@48442200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x48442200 0x80>;
    时钟=<0xD1 0xb>;
    时钟名称="TBCLK"、"Fck ";
    status = disabled
    ;}
    
    ECAP@48442100{
    compatible ="ti、dra746-ECAP"、"ti、am3352-ECAP";
    #PWM-cells =<0x3>;
    reg =<0x48442100 0x80>;
    时钟=<0xb>;
    时钟名称="fck";
    状态="禁用";
    };
    };
    
    AES@4b50000{
    兼容="ti、OMAP4-AES";
    ti、hwmods ="aes1";
    reg =<0x4b500000 0xa0>;
    中断=<0x0 0x50 0x4>;
    DMA =<0xc3 0x6f 0x0 0xc3 0x6e 0x0>;
    dma-names =
    0xfck;"rx clocks";"rx fclocks"="r"
    
    };
    
    AES@4b700000{
    兼容="ti、OMAP4-AES";
    ti、hwmods ="aes2";
    reg =<0x4b700000 0xa0>;
    中断=<0x0 0x3b 0x4>;
    DMA =<0xc3 0x72 0x0 0xc3 0x71 0x0>;
    dma-names ="TX Clocks"
    
    ;"rx-fclock"
    };
    
    DES@480a5000{
    兼容="ti、OMAP4-DES";
    ti、hwmods ="DES";
    reg =<0x480a5000 0xa0>;
    中断=<0x0 0x4d 0x4>;
    DMA =<0x8d 0x75 0x8d 0x74>;
    dma-names ="TX"、"Rx";
    时钟= 0xfck
    ;时钟= 0xfck-names = 0xfck;
    };
    
    sham@53100000{
    compatible ="ti、omap5-sham";
    ti、hwmds ="sham";
    reg =<0x4b101000 0x300>;
    interrupts =<0x0 0x2e 0x4>;
    DMA =<0xc3 0x77 0x0>;
    dma-names ="rx";
    times= 0xfck);
    时钟名称="fclock"
    ;时钟="fam"
    
    RNG@48090000{
    compatible ="ti、omap4-rng";
    ti、hwmods ="rng";
    reg =<0x48090000 0x2000>;
    interrupts =<0x0 0x2F 0x4>;
    Clocks = 0xA>;
    clock-names ="fck";
    };
    
    opp-supply@4a003b20{<0x3vp
    
    = 0x3bvp;rev
    
    = 0x3bvp;rev = 0x3bvp = 0x3bt
    
    
    ;rev = 0x3bvp;rev = 0x3bt、rev = 0x3bvp;rev = 0x3bt;rev = 0x3bvp = 0x3bt;rev = 0x3bvp;rev = 0x3bvbvp = 0x3bt;rev =
    
    TI、hwmods ="VPE";
    时钟=<0x56>;
    时钟名称="Fck";
    reg =<0x489d0000 0x120 0x489d0700 0x80 0x489dCSC 0x18 0x489dd000 0x400>;
    reg-names ="VPE_TOP"、"SC"、"vpdma";
    中断=<0x0 0x162 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    };
    
    VIP@0x48970000{
    compatible ="ti、vip1";
    reg =<0x48970000 0x114 0x48975500 0xd8 0x48975700 0x18 0x4897800 0x80 0x48a00
    ;parc97400 "0x48d"、0x4897400 "v"、"x48cr 0" "parser1"、"csc1"、"sc1"、"vpdma";
    ti、hwmds ="vip1";
    中断=<0x0 0x15f 0x4 0x0 0x188 0x4>;
    SYSCON-POL =<0x9 0x534>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    状态="禁用";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@= 0x2
    
    
    
    
    
    
    
    
    ;端口= 0xreg
    ;}= 0x2 = 0x2;端口= 0x1@@reg;= 0x1 = 0x1 =寄存器
    
    port@3{
    reg =<0x3>;
    };
    
    };};
    
    DSP_SYSTEM@41500000{
    compatible ="SYSCON";
    reg =<0x41500000 0x100>;
    phandle =<0xd2>;
    };
    
    OMAP-dwc3_4@48940000{
    compatible ="mi, dwc3";
    ti、hwmods = 0x4800>
    
    
    ;<0x4ds-cries= 0x000>
    ;<0x48ds-cells = 0x4>b = 0x000>;<0x48ds-cries= 0x4<0x4<rebegcries<0x000>;<0x4<0x000>;<0x48ds-cells = 0x000<0x4<0x000>
    
    
    状态="禁用";
    
    USB@48950000{
    兼容="SNP、dwc3";
    reg =<0x48950000 0x17000>;
    中断=<0x0 0x159 0x4 0x159 0x4 0x0 0x15a 0x4>;
    中断名称="外设"、"主机"、"OTG";
    最大速度="高速";
    DR_MODE ="OTG";
    };
    
    
    MMU@
    
    
    
    
    
    
    
    
    
    @41501000{兼容="ti、dra7-DSP-iommu";reg =<0x41501000 0x100>;中断=<0x0 0x92 0x4>;ti、hwmods ="mu0_dsp2";#iommu-cells =<0x150mu2>
    
    ;<0x150mu2<mu0xmu2>;<mu2mu0xmu0xmu2mu0<0x2000>
    ;<murom2<mu0<mu0<mu1<mu0<mu0<mu0<mu0<xmu0<mu0<mu0<mu0>;<mu0xmu0xmu0<mu0<mu0<mu0<mu
    
    #iommu-cells =<0x0>;
    ti、SYSCON-muconfig =<0xd2 0x1>;
    phandle =<0xd4>;
    };
    
    dsp@41000000{
    compatible ="ti、dra7-dsp";
    reg =<0x41000000 0x48000 0x41600000 0x8000 0x41700000 0x8000>;
    
    "lpram"、lsp2、lpram";"lspmands"、"ldam"
    SYSCON-bootreg =<0x9 0x560>;
    IMOMUS =<0xd3 0xd4>;
    ti、rproc-STANDBY-INFO =<0x4a005620>;
    状态="正常";
    mbox =<0x9b 0xd5>;
    计时器=<0xd6>;
    安全装置计时器=<0xd7>;
    存储器区
    = 0xd8>;
    
    VIP@0x48990000{
    compatible ="ti、vip2";
    reg =<0x48990000 0x114 0x48995500 0xd8 0x48995700 0x18 0x48995800 0x80 0x48995a00 0xd8 0x48995c00 0x18 0x48995d00 0x80 0x4899d000 0x400>;
    reg-names ="parsc0"、"vIP"、"0"、"vIP" "parser1"、"csc1"、"sc1"、"vpdma";
    ti、hwmds ="vip2";
    中断=<0x0 0x160 0x4 0x0 0x189 0x4>;
    SYSCON-POL =<0x9 0x534>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    状态="禁用";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@0 = 0x2
    
    ;
    
    
    
    
    
    端口@@reg = 0x2;= 0x1 = 0x2;端口= 0xreg;
    
    
    
    port@3{
    reg =<0x3>;
    };
    
    };};
    
    VIP@0x489b0000{
    compatible ="ti、vip3";
    reg =<0x489b0000 0x114 0x489b5500 0xd8 0x489b5700 0x18 0x489b5800 0x80 0x489b5a00 0xd8 0x489b5b5500 0xd00、0x489b5000 0x48d00
    、"0x489b0"、"vip 0"、"0x489b0"、"vip 0" "parser1"、"csc1"、"sc1"、"vpdma";
    ti、hwmds ="vip3";
    中断=<0x0 0x161 0x4 0x0 0x18a 0x4>;
    SYSCON-POL =<0x9 0x534>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    状态="禁用";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@
    
    
    
    @= 0x0;}= 0x1;}寄存器= 0x1;
    
    
    
    
    
    
    热区{
    
    CPU_Thermal{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x0>;
    系数=<0x0 0x7d0>;
    
    TRIPS{
    
    CPU_ALERT{
    TEMPERATURE =<0x13880>;
    迟滞=<0x7d0>;
    type ="
    
    }="无源;}= 0xdle;
    
    cpu_crit{
    temperature =<0x15f90>;
    迟滞=<0x7d0>;
    type ="严重";
    };
    
    cpu_alert1{
    temperature =<0xc350>;
    迟滞=<0x7d0>;
    type ="有效";
    phandle =<0xdc>;
    };
    };
    
    冷却映射{
    
    map0{
    trip =<0xda>;
    冷却设备=<0xdb 0xffffffff 0xffffFFF>;
    };
    
    map1{
    trip =<0xdc>;
    冷却设备=<0xdd 0xffff 0xffFFF>;
    }
    ;
    };
    
    GPU 热
    
    
    
    系数{polling-delay-passive =<0xfa>;polling-delay = 0xd1pensors = 0xd0xd90>;
    
    
    
    }热系数0xd1 = 0xd1;GPU 温度传感器= 0xd0xd10nF = 0xd10nF = 0xd10nF;0xd1;}
    
    迟滞=<0x7d0>;
    类型="严重";
    };
    };
    };
    
    core_thermal{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x2>;
    系数=<0x0 0x7d0>;
    
    TRIPS{
    
    CORE_Crit{
    TEMPERATURE =<0x15f90>;
    迟滞=<0x7d0>;
    TYPE ="临界"}
    
    ;};
    };
    
    dspive_thermal{
    POLLINGE-DELAY_PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x3>
    ;系数=<0x0 0x7d0>;
    
    TRIPS{
    
    dspive_crit}
    温度=<0x15f90>;
    迟滞=<0x7d0>;
    类型="临界"
    ;}
    
    };
    
    IVA_热力{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x4>;
    系数=<0x0 0x7d0>;
    
    TRIPS{
    
    IVA_Crit}
    温度=<0x15f90>;
    迟滞=<0x7d0>;
    类型="临界";
    };
    };
    };
    
    board_thermal{
    POLLINGE-DELAGE-PASSIVE =<0x4e2>;
    POLLINGE-DELAY =<0x5dc>;
    热传感器=<0xDE 0x0>;
    
    TRIPS{
    
    board_ALERT{
    TEMPERATURE =<0x9c40>;
    迟滞=<0x7d0>;
    type ="有效";
    phandle =<0xdf>;
    };
    
    Board_crit {
    温度=<0x19a28>;
    迟滞=<0x0>;
    类型="严重";
    };
    };
    
    冷却映射{
    
    map0{
    trip =<0xdf>;
    冷却设备=<0xdd 0xffffffffffffff>;
    };
    
    };
    };};};
    
    PMU{
    compatible ="arm、cortex-a15-PMU";
    interrupt-parent =<0x8>;
    interrupts =<0x0 0x83 0x4 0x0 0x84 0x4>;
    };
    
    memory@
    
    
    
    
    
    
    
    
    
    @0{device_type ="memory";reg =<0x0 0x8000000 0x0 0x80000000>;reserved memory{#0x58000= 0x58000>
    ;shared cells-cells = 0x5800000;<reus-cells = 0x58000>
    
    
    状态="确定";
    相位=<0xa0>;
    };
    
    dsp1-memory@99000000{
    compatible ="shared-dma-pool";
    reg =<0x0 0x99000000 0x0 0x4000000>;
    可重复使用;
    status ="确定";
    phandle =<0xa6>;
    };
    
    ipu1-memory@9d000000{
    compatible ="shared-dma-pool";
    reg =<0x0 0x9d000000 0x0 0x2000000>;
    可重用;
    status ="确定";
    phandle =<0x99>;
    };
    
    dsp2-memory@9f000000{
    compatible ="shared-dma-pool";
    reg =<0x0 0x9f000000 0x0 0x800000>;
    可重复使用;
    status ="确定";
    phandle =<0xd8>;
    };
    
    cmem_block_mem@a0000000{
    reg =<0x0 0xa0000000 0x0 0xc000000>;
    无映射;
    状态="确定";
    phandle =<0xeb>;
    };
    
    cmem_block_mem@40500000{
    reg =<0x0 0x40500000 0x0 0x100000>;
    无映射;
    状态="确定";
    phandle =<0xec>;
    };
    };
    
    fixedreguler-main_12v0{
    compatible ="reguler-fixed";
    reguler-name ="main_12v0";
    reguler-min-microvolt =<bb71b00>;
    reguler-max-microvolt =<b71b00>;
    reguler-always 开启;
    电脑控制器启动开启;
    相位=<0xe0>;
    };
    
    fixedreguler-EVM_5v0{
    兼容="固定稳压器";
    电脑控制器名称="EVM_5v0";
    电脑控制器最小值-微伏=<0x4c4b40>;
    电脑控制器最大值-微伏=<0x4c4b40>;
    VIN-电源=<e0>;
    稳压器常开;
    稳压器启动;
    };
    
    固定稳压器 VDD_3V3{
    兼容="稳压器固定";
    稳压器名称="VDD_3V3";
    VIN-电源=<0xe1>;
    稳压器最小值微伏=<0x325aa0>;
    稳压器最大值微伏=<0x325aa0>;
    phandle =<0xab>;
    };
    
    fixedreguler-AIC_DVDD{
    compatible ="reguler-fixed";
    reguler-name ="ACC_DVDD_fixed";
    VIN-supply =<0xab>;
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    phandle =<0xac>;
    };
    
    fixedreguler-VTT{
    compatible ="reguler-fixed";
    reguler-name ="VTT_fixed";
    VIN-supply =<0xe2>;
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-always-on;
    reguler-boot-on;
    enable-active-high;
    gpio =<0xAA 0xb 0x0>;
    }
    
    ;LED{
    compatible ="gpi-LEDs";
    
    led0{
    label ="beagle-x15:usr0";
    gpio=<0xAA 0x9 0x0>;
    linux、default-trigger ="heart";
    
    
    
    默认
    
    
    值= 0xgpix-out";"0xgpulo-off"= 0xr1";"gpulo-off"= 0xr1 ="nault-off";"noff"= 0xr1 = 0xr1 ="noff";"gpul-state
    
    = 0xr1 = 0xr1 ="noff";
    
    LED2{
    标签="bagle-x15:usr2";
    GPIOs =<0xAA 0xe 0x0>;
    Linux、default-trigger ="mmc0";
    default-state ="off";
    };
    
    LED3{
    标签="beagle-x15:usr3";
    GPIOs =<0xAA 0xF 0x0>;
    linux、default-state ="
    
    
    ;default-state ="}
    
    GPIO_FAN{
    compatible ="GPIO-FAN";
    GPIO =<0xe3 0x2 0x0>;
    GPIO-FAN、SPEEDE-MAP =<0x0 0x0 0x32c8 0x1>;
    #Cooling-cells =<0x2>;
    phandle =<0xdd>;
    };
    
    连接器{
    compatible ="HDMI-connector";
    label ="HDMI"
    = 0x61"
    
    
    
    
    ;[eport]= 0x61>};[phandle = 0x6风 口= 0x6风 扇= 0xdd>;}
    
    
    
    
    
    编码器{
    compatible ="ti、tpd12s015";
    status ="disabled";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@0{
    reg = 0x0>;
    
    端点{
    remote -endpoint =<0xe5>;
    phandle =<0xce>;
    };
    }
    
    
    
    
    
    端点;端口@1{reg = 0xe6>
    
    };}
    
    
    };
    
    sound0{
    compatible ="简单音频卡";
    简单音频卡、name ="BeagleBoard-X15";
    简单音频卡、小工具="线路"、"线路输出"、"线路"、 "线路输入";
    简单音频卡、路由="线路输出"、"LLOUT"、"线路输出"、"RLOUT"、"MIC2L"、 "线路输入"、"MIC2R"、"线路输入";
    简单音频卡、格式="DSP_b";
    简单音频卡、位时钟主设备=<0xe7>;
    simple-audio-card、frame-master =<0xe7>;
    simple-audio-card、位时钟反转;
    
    simple-audio-card、CPU{
    sound-dai =<0xe8>;
    };
    
    simple-audio-card、codec{
    sound-dai =<0xe9>;
    时钟=<0xEA>;
    phandle =<0xe7>;
    };
    };
    
    cmem{
    compatible ="ti、cmem";
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    #pool-size-cells =<0x2>;
    status ="确定";
    
    cmem_block@0{
    reg =<0x0>;
    memory-region =<0xeb>;
    cmem-buf-pools =<0x1 0x0 0xc000000>;
    };
    
    cmem_block@1{
    reg =<0x1>;
    memory-region =<0xec>;
    };
    
    };};}; 

    n`t、仅"禁用"不存在的 GPU 似乎还不够、因为 AM5726没有 GPU。 我必须删除此节点吗?

     

     

     

     

     

     

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    U-Boot 和内核具有各自的设备树。 不能在内核中使用 U-Boot 的设备树、反之亦然。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    >> U-Boot 和内核具有各自的设备树。 不能在内核中使用 U-Boot 的设备树、反之亦然。

    好的、没问题、我现在使用内核中的 dtB/dts。

     

    错误内核消息

    [0.535907] NET: registered protocol family 16
    [0.543176] DMA:preassigned 256 KiB pool for atic 相干分配
    [0.551258] omap_hwmod:L3_main_2 using broken dt data from OCP
    [0.767351] Unhandled fault: 异步外部中止(0x1211)在0x00000000
    [0.767354] PgD =(ptrval)
    [0.767357][000000000000]*PgD=80000080004003,*PMD=00000000
    [0.767369]内部错误:1211 [#1]抢占 SMP ARM
    [0.767372]链接的模块: 

    输出消息现在为:

    U-Boot SPL 2019.01 (2019年10月21日- 13:31:27 +0200)
    DRA752-GP ES2.0
    尝试从 MMC1引导
    默认模式无 pinctrl 状态
    对于默认模式无 pinctrl 状态
    从 FAT 加载环境... ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... 卡未响应电压选择!
    ***警告-无块设备,使用默认环境
    
    
    
    U-Boot 2019.01 (2019年10月21日- 13:31:27+0200)
    
    CPU:DRA752-GP ES2.0
    模型:TI AM5726 sec4
    板:SEC4
    DRAM:1 GiB
    大小的 DRAM 为1024 MB
    
    的
    OMAP beagle_x MMC:0
    正在从 FAT...加载环境 ***警告- CRC 错误,使用默认环境
    
    从 MMC 加载环境... MMC Device 1 not found
    *** Warning - No MMC card found,using default environment
    
    ***-> This Board is unknown
    
    晚期初始
    
    化2a invalid
    
    MMC device
    晚期初始化2b
    
    end of 晚期初始化
    
    网络:找不到以太网。
    按任意键停止自动引导:0
    =>
    => setenv bootargs console=ttyS2、115200 earlyprintk loglevel=3 mem=0x40000000 loglevel=7
    =>加载 MMC 0:1 0x88000000 sec4.DTB
    90430字节在5ms 内读取(17.2 MiB/s)
    =>加载 MMC 0:1 0x40000000 loglevel=7
    字节在5ms 内读取0x88000000 sec4.DTB 90430字节(17.23721 MIB)
    => bootz 0x82000000 - 0x88000000
    ##平展设备树 blob,88000000使用
    0x88000000的 FDT blob 启动
    正在将设备树加载到8ffe6000,结束8ff13d... 确定
    
    启动内核...
    
    [0.000000]在物理 CPU 上引导 Linux 0x0
    [0.000000] Linux 版本4.19.38-rt19 (Rene@Ubuntu)(gcc 版本8.3.0 (A 配置文件架构的 GNU 工具链8.3-2019.03 (arm-rel-8.36))) 9
    [0.000000] CPU:ARMv7处理器[412fc0f2]修订版2 (ARM30cr v7
    (可用代码:
    )[0.38dV cr = 0.0000.c: PIPT / VIPT 非混叠数据高速缓存、PIPT 指令高速缓存
    [0.000000](共:FDT):机器型号:TI AM5728 BeagleBoard-X15
    [0.000000]启用了引导控制台[earlycon0]
    的[0.000000]内存策略:数据高速缓存 writealloc
    [0.000000] EFI:从 FDT 获取 EFI 参数:
    [0.000000]未找到 UEFI:
    [0.000000]保留存储器:创建了0x000095800000处的 CMA 存储器池、大小为56 MIB
    [0.000000]、共:保留存储器:初始化节点 ipu2-memory@95800000、兼容 ID shared-dma-pool
    [0.000000]保留存储器:创建了0x000099990000处的 CMA 存储器池、大小为64 mib
    [0.000000]、共:保留存储器: 已初始化节点 dsp1-memory@99000000、兼容 id sharedma-pool
    [0.000000]保留内存:已在0x000000009d000000创建 CMA 内存池、大小为32 mib
    [0.000000] of:reserved mem: initialized node ipu1-memory@9d000000、compatible id shareddma-dma-pool
    [0.000000]保留内存:已创建 mcma 内存池、大小为0x000000、
    大小为0x000000 mcma:已保留大小为0.000000: 初始化节点 dsp2-memory@9f000000、兼容的 id shareda-dma-pool
    [0.000000] CMA:在0x0000000be400000
    [0.000000] OMAP4:将0x0000bfd00000映射到(ptrval)用于 DRAM 屏障
    [0.0000]DRA752 ES2.0
    [0.000000] random:从 start_kernel_crng+0.480]调用 get_randbytes
    :0x0000_kernel=0x0000+0.480 嵌入式15页/CPU s32544 r8192 d20704 u61440
    [0.000000]在上构建了1个区域列表、移动分组。 总页数:210496
    [0.000000]内核命令行:console=ttyS2,115200 adlyprintk loglevel=3 mem=0x40000000 loglevel=7
    [0.000000]条目高速缓存哈希表条目:131072 (顺序:8、1048576字节)
    [0.000000] inode 高速缓存哈希表条目:65536 (顺序:6、26000000
    字节) 提供635936K/848896K (8192K 内核代码、315K RWdata、2180K rodata、2048K init、264K BSS、 24544K 保留、188416K CMA-r)
    [0.000000]虚拟内核内存布局:
    [0.000000] 向量:0xffffff0000 - 0xffffff1000 (4KB)
    [0.000000] Fixmap:0xc00000 - 0xc00000 (3072 KB)
    [0.000000] vmalloc:0xf0800000 - 0x0x800000 (240MB)
    [0.000000] 低内存:0xC0000000 - 0xf0000000 (768 MB)
    [0.000000] pkmap:bfe00000 - 0xC0000000 (2 MB)
    [0.000000] 模块:bbbf000000 - bbfe00000 (14 MB)
    [0.000000] .text:0x (ptrval)- 0x (ptrval)(10208 KB)
    [0.0000] init:0x (ptrval)-0x (ptrval)(2048KB)
    [0.000000] .data:0x (ptrval)- 0x (ptrval)(316 KB)
    [0.0000] .bss:0x (ptrval)- 0x (ptrval)(265KB)
    [0.000000] slub:HWalign=64、order=0-3、MinObjects=0、CPU=2、Nodes =1
    [0.000000] RCU:可抢占分层实现。
    [0.000000] RCU: RCU 优先级提升:优先级1延迟500毫秒。
    [0.000000]无加速宽限期(RCU_NORMAL、After _boot)。
    [0.000000]启用了 RCU 任务。
    [0.000000] NR_IRQ:16、nr_IRQ:16、预分配 IRQ:16
    [0.000000] GIC:使用分离式 EOI/Deactivate 模式
    [0.000000] OMAP 时钟事件源:32786Hz 时的 Timer1
    [0.000000] ARI_TIMER:以6.14MHz (PHY)运行的 CP15计时器。
    [ 0.0000]时钟源:ARCH_SYS_COUNTER:MASK:0xffffffffffffffFFFF max_cycles:0x16af5adb9、max_idle_ns:440795202250 ns
    [0.000005] sched_clock:56位、频率为6MHz、分辨率为162ns、每43980465FFFF23ns 换行
    一次[0.000011]、FFFF 时
    钟源:0x000281ns、最大值为0x99000249ns:0x000249[0.000249ns:0x000249_FFFF 时钟源:0x0002410FFFF:0x0002410FFFF:0x000289[0.0002410FF_0002410]
    32768Hz
    [0.000732]上的32K_COUNTER 控制台:彩色虚拟设备80x30
    [0.321576]校准延迟环路(跳过)、使用计时器频率计算得出的值。 12.29 BogoMips (lpj=6147)
    [ 0.321585] pid_max:默认值:32768最小值:301
    [ 0.321729]安装高速缓存散列表条目:2048 (顺序:1、8192字节)
    [ 0.321738]安装点高速缓存散列表条目:2048 (顺序:1、8192字节)
    [ 0.322467字节] CPU
    一致性测试:CP240:veV 使用 ICIALU 权变措施
    [0.322741]/cpus/cpu@0 missing clock frequency property
    [0.367632]/cpus/cpu@1 missing clock frequency property
    [0.373086] CPU0:Thread -1、CPU 0、socket 0、mpidr 80000000
    [0.384930]为0x80200000 - 0x80200060
    [ 0.3948]设置静态标识映射[SRCU 分层实施。
    [0.406534] EFI 服务将不可用。
    [0.413219] SMP:启动辅助 CPU ...
    [0.431681] CPU1:线程-1、CPU 1、插座0、mpidr 80000001
    [0.431685] CPU1:幽灵 v2:使用 ICIALU 变通办法
    [0.431814] SMP:提起1个节点、2个 CPU
    [0.447311] SMP:总共激活2个处理器(24.58个 BogoMips)。
    [0.453686] CPU:所有 CPU 均在 HYP 模式下启动。
    [0.458442] CPU:提供虚拟化扩展。
    [0.464292] devtmpfs:已初始
    化[0.497321] VFP 支持 v0.3:Immentor 41架构4第30部分变体 f rev 0
    [0.505550]时钟源:jiffies:mask:0xFFFFFFFF max_cycles:0xFFFFFFFF、max_idle_idle_5000:1911260446275000 ns
    [ 0.631] futex:2568个
    字节(命令代码:0.512) 初始化的 pinctrl 子系统
    [0.531422] DMI 不存在或无效。
    [0.535907] NET: registered protocol family 16
    [0.543176] DMA:preassigned 256 KiB pool for atic 相干分配
    [0.551258] omap_hwmod:L3_main_2 using broken dt data from OCP
    [0.767351] Unhandled fault: 异步外部中止(0x1211)在0x00000000
    [0.767354] PgD =(ptrval)
    [0.767357][000000000000]*PgD=80000080004003,*PMD=00000000
    [0.767369]内部错误:1211 [#1] Preempt SMP ARM
    [0.767372]链接的模块:[0.767381]硬件
    
    名称:0.7674[0.767382]未被污染[1.001.] 通用 DRA74X (平展设备树)
    [0.767395] PC 位于_enable_sysc+0x6c/0x228
    [0.767400] LR 位于_enable_sysc+0x50/0x228
    [0.767405] PC:[ ] LR:[ ] PSR:40000013
    [0.767408] sp:ef0a1e40 IP:ef0a1e40 FP:ef0a1e64
    [0.767411] R10:c0e563a8 R9:c0e47824 R8:00000000
    [0.767414]r7:c10126dc R6:c1007488r4:c10017488r4:c10487r4:c100r4
    c1012248 r0:c10121c4
    [0.767422]标志:模式 SVC_32 ISA ARM 段用户
    [0.767426]控制:30c5387d 表:80003000 DAC:fffffffd
    [0.767430]处理 swapper/0 (pid:1、stack = 0.76740
    )[0x6740](pid:06740)
    ef0a1e64 b3a39597 c10121c4 00000000 c104f4d0 c10126dc ef0a1e8c ef0a1e68
    [0.767456] 1e60:c021fb38 c021f730 c100fd70 c1007488 c10121e8 c10007456c1001e0e0456c1001e0e0e0c1001e0c0c100c100c0c100c100c100c07248 c100c1001e0c100c0c1001e456c1001e0c0c0c0c0c0c0c0c0c0c0c0c100c0c0c100c100c0c0c0c100c0c0c0c0c0c0c0c0c0c0c0d4
    :c100c100c0c100c100c0c0c0c0c0c100c0c0c0c0c0
    
    c104e80 c1007488 ef0a1f4c ef0a1ed8 c02023fc c0e0d02c 00000000 c0b6e964
    [0.767466] 1e0:c0b6e900 c0b79f50 c1007488 00000000 c0b6e9670002 0002 [0.76740]
    
    c1006740 c0100401e40040 c400401e40c40040c1006748 c1006748 c1006748 c1006748 00000002
    ef0a1f94 ef0a1f50 c001048 c0202384 00000002 00000002 00000000 c0e004f0
    [0.767486] 1f60:c0c1fb9c 000000b4 c08d80bc 00000000 c08d2e8 00000000 0000000000000000000000000000 [0.767491]
    1f0000 080000000000 080000000000 0800080008000800080000000000 080008000800080008000800080000 c0000 080000000000 080000000000
    
    00000000 00000000 00000000
    [0.767505] 1fe0:00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 00000000
    [0.767507]回溯:
    [0.767518][ ](_enable_sysc)从[ ](_enable+0x1ec/0x25c)
    [0.767524] r7:c10126dc r6:c104f4d0 r5:00000000 r4:c10121c4
    [0.767533][ ](_enable)从[ ](_setup.constprop.25+0x150/0x4e8)
    [0.767538] r7:c10121fc r6:c10121c4 r5:c1007488 r4:c10121e8
    [0.767550][ ](_setup.constprop.25)、来自[ ](_omap_hwmod_setup_All+0x114/0x12c)
    [0.767555] r7:c0e0d020 R6:ffe000 R5:c100c528 R4:c10121c4
    [0.767565][ ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [0.767568] R5:c1007488 R4:c104ee80
    [0.767576][ ](多个_initcall)、来自[ ](kernel_init_freeed+0x214/0x2a8)
    [0.767581] r8:c0e47844 r7:c0e004f0 r6:c104ee80 r5:c104ee80 r4:00000003
    [0.767589][ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [0.767595] r10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c08d2ee8
    [0.767597] r4:00000000
    [0.767604][ ](kernel_init)、来自[ ](RET_FAND_F叉+0x14/0x34)
    [0.767607]异常堆栈(0xef0a1fb0至0xef0a1ff8)
    [0.767611] 1fa0: 00000000 00000000 00000000 00000000
    [0.767616] 1fc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [0.767620] 1fe0:00000000 00000000 00000000 00000013 00000000
    [0.767624] R5:c08d2ee8 R4:00000000
    [0.767631]代码:e1a00004 ebfffe3 e5943004 e1a00004 (e5942044)[1.126765]
    
    代码:e1a00004尝试终止中断跟踪0001e5943004 (e5924000044)[ 1.123665]代码:尝试中断00000001e0001e0001e0001e0001e150001e0001e0001-中断跟踪 exitcode=0x0000000b
    [ 1.123765]
    [ 1.123775] CPU1:停止
    [ 1.123782] CPU:1 PID:0 Comm:swapper/1被污染:g D 4.19.38-rt19 #4
    [1.123785]硬件名称:通用 DRA74X (平展设备树)
    [1.123787]背板:
    [1.123799][ ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.123806] r7:fa212000 r6:60000193 r5:00000000 r4:c104ce64
    [ 1.123821][ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [ 1.123831][ ](dump_stack)从[ ](handle_ipi+0x1bc/0x22c)
    [1.123837] r7:fa212000 r6:00000001 r5:00000000 r4:c104f100
    [ 1.123848][ ](handle_ipi)从[ ](GIC_Handle_IRQ+0x94/0x98)
    [1.123852] R6:fa21200c R5:c1026dbc R4:c100796c
    [ 1.123859][ ](GIC_Handle_IRQ)、来自[ ](__IRQ_Svc+0x58/0xa0)
    [1.123862]异常堆栈(0xef0cff28至0xef0cff70)
    [1.123868] ff20: 00000000 00000b74 00000000 c021a180 ffe000 c10074bc
    [1.123873] ff40:c1007504 00000002 00000001 c104ea96 c0b6f188 ef0cff84 ef0cff88 ef0cff78
    [1.123877] ff60:c0208c20 2083r 20600c6
    r8:cffr 1:r8 cffr 1:ffr 1 0008 cffr 1:c0008 r3 1:cffr 1:ffr 1 0008 r3 cffr 1:c60013 cffr 1 c 1 c 1:ffr 1
    ](arch_cpu_idle)从[ ](DEFAULT_IDLE_CALL + 0x34/0x40)
    [1.123903][ ](DEFAULT_IDLE_CALL)从[ ](do_idle+0x110/0x180)
    [1.123909][ ](DO 空闲)从[ ](cpu_startup_entry+0x20/0x28)
    [1.123915] r10:00000000 r9:412fc0f2 r8:80007000 r7:c104f108 r6:00000001 r5:ef0ce000
    [ 1.123918] r4:00000086 r3:ef0ce000
    [ 1.123926][ ](CPU_STARTUP_INPUK)、来自[ ](secondary _start_kernel+0x178/0x180)
    [ 1.123932][ ](secondary _start_kernel)从[<8020210c>](0x8020210c)
    [1.123936] r7:c104f108 R6:30c0387d R5:00000000 R4:af0771c0
    

     

     

    从 DTB 转换的 DTS:

    /DTS-v1/;
    
    /{
    #address-cells =<0x2>;
    #size-cells =<0x2>;
    compatible ="ti、am572x-beagle-x15"、"ti、am5728"、"ti、dra742"、 "TI、dra74"、"ti、dra7";
    interrupt-parent =<0x1>;
    模型="TI AM5728 BeagleBoard-X15";
    
    选择的{
    stdout-path ="/ocp/serial
    
    
    
    
    
    /ocp/i2c@48020000";};别名{i2c0 ="/ocp/i2c
    /ocp/i2c@48070000";i2c1 ="/ocp/i2c@48072000";"i4802c4
    ="i2c4000@48027000";"i2c4 =/ocp/i2c@4802c";"i2c4000 ="i4802c"="i2c4000@4802c"
    Serial0 ="/ocp/serial@4806a000";
    SERIAL1 ="/ocp/serial@4806c000";
    SERIAL2 ="/ocp/serial@48020000";
    serial3 ="/ocp/serial@4806e000";
    serial4 ="/ocp/serial@48066000";
    serial5 ="/ocp/serial@48068000";
    serial6 ="/ocp/serial@4842000";
    serial7 ="/ocp/serial@48422000";
    serial8 ="/ocp/serial@48424000";
    serial9 ="/ocp/serial@4ae2b000";
    Ethernet0 ="/ocp/ethernet@48484000/从器件@48480200";
    ethernet1 ="/ocp/ethernet@48484000/从器件@48480300";
    D_CAN0 ="/ocp/can@4ae3c000";
    D_CAN1 ="/ocp/can@480000";
    spi0 ="/ocp/qspi@4b300000";
    rpro0 ="/ocp/ipu@58820000";
    rpro1 ="/ocp/ipu@55020000";
    rpro2 ="/ocp/dsp@40800000";
    rpro3 ="/ocp/dsp@41000000";
    rtc0 ="/ocp/i2c@48060000/RTC@6F";
    RTC1 ="/ocp/i2c@48070000/tps659038@58/tps659038_RTC";
    rtc2 ="/ocp/rtc@48838000";
    display0 ="/connect";
    sound0 ="/sound0";
    sound1 ="/ocp/dss@58000000 /编码器@58060000";
    };
    
    定时器{
    兼容="arm、armv7-timer";
    中断=<0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xA 0x308>;
    中断父级=<0x2>;
    };
    
    中断控制器@48211000{
    兼容="arm、cortex-a15-GIC";
    中断控制
    器=<0x3>单元;中断控制器= 0x3>单元;
    REG =<0x0 0x48211000 0x0 0x1000 0x0 0x48212000 0x0 0x2000 0x0 0x48214000 0x2000 0x0 0x48216000 0x2000>;
    中断=<0x1 0x9 0x304>;
    中断父级=<0x2>;
    相位=<0x2>;
    
    
    中断控制器@48216000 0x1000
    
    
    = 0x480-0;
    
    中断母体= 0x1000;中断#omag4 = 0x1000;中断#wugu-0x1000 = 0x1000;中断-omapi-parent = 0x1000;中断-omap4 = 0x1000 = 0x1000;中断#wugu-0x1000;中断#omapi-cells = 0x1000
    phandle =<0x8>;
    };
    
    CPU{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    CPU@0{
    device_type ="CPU";
    compatible ="arm、cortex-a15";
    reg =<0x0>;
    operating points-v2 =<0x3>;
    Clocks =<0x4>;
    时钟名称="CPU";
    时钟延迟=<0x493e0>;
    #Cooling-Cells =<0x2>;
    VBB-SUPPLY =<0x5>;
    VDD-SUPPLY =<0x6>;
    电压容差=<0x1>;
    相位=<0xdb>;
    };
    
    CPU@1{
    device_type ="cpu";
    compatible ="arm、cortex-a15";
    reg =<0x1>;
    operating points-v2 =<0x3>;
    Clocks =<0x4>;
    时钟名称="CPU";
    时钟延迟=<0x493e0>;
    #Cooling-Cells =<0x2>;
    VBB-SUPPLY =<0x5>;
    };
    };
    
    opp-table{
    compatible ="操作点-v2-ti-cpu";
    SYSCON =<0x7>;
    opp-shared;
    phandle =<0x3>;
    
    opp_nom-1000000000{
    opp-Hz =<0x0 0x3b9aca00>;
    opp-microsuspend =<0x102100000000
    
    
    
    
    ;0x1180=0x8bcoff-0x8100810060 = 0x100;0x8bc100b1b= 0x8b1300>;0x8bc100b1b1bc100b = 0x340
    
    = 0x8b1b1b1b1350>;0x8bc100b1b1b1b1bcb = 0x8bcb = 0x8bcb = 0x100b = 0x100b = 0x100b = 0x100b = 0x340;0x100b = 0x100b = 0x100b = 0x100
    opp-supported-HW =<0xff 0x2>;
    };
    
    opp_high@1500000000{
    opp-Hz =<0x0 0x59682f00>;
    opp-microvolt =<0x127690 0xe7ef0 0x1312d0 0x127690 0xe7ef0 0x1312d0>;opp-microfv =<0x127690
    
    
    
    
    
    
    
    
    
    
    = 0xmosc
    
    
    
    
    = 0xapti";"am-compatible}"amoti-f";"ame"= 0xmosc = 0x5"am";"mos";"am-moti-f";"am"= 0xmoti-f";"am"= 0xmos";"am";"am-moti-ti-f"= 0xmos";"am";"ov-mos"= 0x5"ame";"am-mos"
    #size-cells =<0x1>;
    ranges =<0x0 0x0 0x0 0xC0000000>;
    ti、hwmods ="L3_main_1"、"L3_main_3";
    reg =<0x0 0x44000000 0x0 0x000000 0x0 0x45000000 0x1000>;
    interrupts-extended =<0x1 0x0 0x4 0x4000000
    
    @
    = 0x4000000;0x4000000 0x4a cells 0x4
    = 0x4000000 0x4c1;#vic-cells 0x4r1s 0x4r1>
    
    
    
    SCM@2000{
    Compatible ="ti、dra7-SCM-core"、"simple-bus";
    reg =<0x2000 0x2000>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    Ranges =<0x0 0x2000 0x2000>;
    
    SCM_conf@0{
    compatible ="SYSCON"、"simple-bus";
    reg
    
    =
    0x1400 cells = 0x0>;#0x140-cells
    = 0x0>;ranges = 0x140-0>;<0x140-cells = 0x0>;#cells = 0x140-cells = 0x0>;#.0x0>
    
    pbias _regulator@e00{
    compatible ="ti、pbias -dra7"、"ti、pbias -omap5";
    reg =<0xe00 0x4>;
    SYSCON =<0x9>;
    
    pbias _mmc_omap5{
    regulator 名称="pbias _mmc_omap5";
    regulator -min-microregulator =<0x1bagle>
    
    ;}<0x325-volt = 0x7740>;volt = 0x7740V
    
    };
    
    时钟{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    dss_shdcp_clk@558{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0xA>;
    ti、bit-shift =<0x0>
    ;reg =<0x558>;
    };
    
    ehrpwm0_TBCLK@558{
    #clock-cells =<0x0>;
    compatible ="ti、gate-clock";
    Clocks =<0xb>;
    ti、bit-shift =<0x14>;
    reg =<0x558>;
    phandle =<0xCf>;
    };
    
    ehrpwm1_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xb>;
    ti、bit-shift =<0x15>;
    reg =<0x558>;
    phandle =<0xd0>;
    };
    
    ehrpwm2_TBCLK@{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0xb>;
    ti、bit-shift =<0x16>;
    reg =<0x558>;
    phandle =<0xD1>;
    };
    
    sys_32k_ck{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0xc 0xd 0xd 0xd>;
    ti、bit-shift =<0x8>;
    reg =<0x6c4>;
    phandle =<0x50>;
    };
    };
    };
    
    pinmux@1400{
    compatible ="ti、dra7-padconf"、"pinctrl-single";
    reg =<0x1400 0x468>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    #pinctrl-cells =<0x1>;
    #interrupt-cells =<0x1>;
    中断控制器;
    pinctrl-single、寄存器宽度=<0x20>;
    pinctrl-single、函数掩码=<0x3fffffff>;
    phandle =<0x8e>;
    
    mmc1_PINS_DEFAULT{
    pinctrl-single、引脚= 0x364 0x60000 0x35600 0x60000 0x368e
    0x60000 0x60000
    ;0x3680x3680x60000 0x3680x600cle = 0x6000x3680x600c00 0x600c00 0x600c00;0x3680x368c00 0x368c00 0x600c00 0x368c00 0x600c00 0x368c00 0x600c00 0x368c00 0x368c1 0x600c1 0x368c1 0x600c1 0x368c1 0x600c1
    
    
    
    
    
    mmc1_PINS_hs{
    pinctrl-single、pins =<0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>;
    phandle = 0x3640x601b0;
    };
    
    mmc1_pins_s25 0x601b0 0x601b0
    0x601b0 0x358b0 0x601b0 0x601b0 0x601b0 0x601b0 0x601b0 0x364b0 0x60b0 0x60b0 0x60b0 0x601b0 0x364b0 0x601b0 0x60b0 0x
    
    
    mmc1_PINs_sdr50{
    pinctrl-single、pins = 0x354 0x601a0 0x358 0x601a0 0x35c 0x601a0 0x360 0x601a0 0x364 0x601a0 0x368 0x601a0 0x368 0x601a0>;
    };
    
    mmc1_PIN_Ddr50{
    pinctrl 0x60100 0x60100
    
    
    0x35860
    0x360 0x360 0x360 0x60100 0x360 0x3640x60100 0x60100 0x60100 0x3640x60100 0x60100 0x60360 0x60100 0x60360 0x3640x60100 0x60100 0x60350 0x60100 0x60100 0x60350 0x60100 0x60100 0x60350 0x60350 0x60100 0x60350 0x60100 0x60350 0x60100 0x60350 0x60100 0x60100 0x60350 0x60100 0x60
    };
    
    mmc2_PINS_DEFAULT{
    pinctrl-single、PINS =<0x9C 0x60001 0xb00x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
    phandle =<2>;
    }
    
    mmc2_PINs_hs{
    pinctrl-single、pins =<0x9C 0x60001 0xbb00x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
    };
    
    mmc2_pins 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60C 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x60101 0x
    
    
    
    mmc2_PINS_DDR_1_8v_rev11{
    pinctrl-single、PINS =<0x9C 0x60101 0x60101 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x60101 0x90 0x60101 0x94 0x60101 0x60101>;
    0x60001
    
    0x6000001 0x6000001 0x0001_0x6000001 0x0001 0x6000001 0x0001 0x6000001 0x0001 0x0001_0x6000001 0x0001 0x0001 0x0001 0x0001_0x6000001 0x0001 0x0001 0x0001 0x0001 0x6000001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x0001 0x600
    
    
    
    mmc2_PINS_HS200{
    pinctrl-single、PINS =<0x9C 0x60b1010 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0x8c 0x60101 0x60101 0x60101 0x94 0x60101 0x98 0x60101>;
    }MMC4_PINS 0x60103
    
    
    0x603c 0x60103c 0x601030x6008 0x60103c 0x60103 0x60103fc 0x601030x601030x601030x603ctrl 0x601030x601030x601030x1030x1030x601030x1030x6030x30x6030x30x603
    
    
    MMC4_PINS_hs{
    pinctrl-single、PINS =<0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x60103 0x60103 0x3fc 0x60103>;
    };
    
    mmc3_PINS_DEFAULT{
    pinctrl-single、PINS =<0x37c 0x60000 0x60000 0x38400 0x600C 0x60000 0x38400 0x38400 0x60000 0x38400 0x38400 0x60000 0x38400
    
    
    0x38400 0x38400 0x600C 0x60000 0x38400
    0x38400 0x38400 0x38400 0x60000 0x38400 0x38400 0x38400 0x38400 0x38400 0x38400 0x38400 0x600C 0x600C 0x60000 0x38600 0x38600 0x38400 0x38400 0x38600 0x38
    };
    
    mmc3_PINs_sdr12{
    pinctrl-single、pins =<0x37c 0x60000 0x380 0x60000 0x384 0x60000 0x388 0x60000 0x38c 0x60000 0x390 0x60000>;
    };
    
    mmc3_PINs_sdr25{
    pinctrl-single、pins =<0x37c 0x60000 0x60000 0x3880000x60000 0x3840 0x3840 0x60000 0x3838 0x60000 0x3840 0x3838 0x60000 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840 0x3840
    
    
    mmc3_PINs_sdr50{
    pinctrl-single、pins =<0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
    };
    
    mc4_PINs_sdr12{
    pinctrl–single、pctrl =<0xinc8 0x60103 0x60103 0x3603 0x3604 0x603c 0x603c 0x60103 0x603c 0x603c 0x603c 0x603c 0x60103c 0x603c 0x603c 0x603c 0x603c 0x103c 0x60103c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x603c 0x103c
    
    
    
    
    };
    };
    
    SCM_conf@1c04{
    compatible ="SYSCON";
    reg =<0x1c04 0x20>;
    #SYSCON-cells =<0x2>;
    phandle =<0x88>;
    };
    
    SCM_conf@
    
    
    
    
    
    @1c24{compatible ="SYSCON";reg =<0x1c24 0x24>;phandle = 0x78>;dma-dma = 0x78>;bdma-dma = 0x78>;bdma-dma-dma = 0x78>;bdma-dma = 0x78>
    
    
    
    
    
    dma-masters =<0xe>;
    phandle =<0x8d>;
    };
    
    dma-router@C78{
    兼容="ti、dra7-dma-crossbar";
    reg =<0xc78 0x7c>;
    #dma-cells =<0x2>;
    dma-requests =<0xcc>;
    ti、dma-safe-map =<0x0>;
    dma-ma-masters =<0xF>;
    phandle =<0xc3>;
    };
    };
    
    cm_core_aon@5000{
    compatible ="ti、dra7-cm-core-aon"、"simple-bus";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    reg =<0x5000 0x2000>;
    ranges =<ti 0x0000x000x0>
    
    
    
    
    
    
    
    ;<clock-clocks=<x0>;<locks<x0>
    
    
    };
    
    atl_clkin1_ck{
    #clock-cells =<0x0>;
    compatible ="ti,dra7-atl-clock";
    clock =<0x10 0x0 0x1a>;
    phandle =<0xc5>;
    };
    
    atl_clkin2_ck{
    #clock-cells =<0x0>;
    compatible ="ti,7-cells"
    
    
    ;<0x1cock-clock<0x1<clock<x0<x0>
    
    
    
    
    ;atlock<clock-clock<0x1<x<x0<x0>;atl=<clock-clock<cl<x<x<x0x0<atlock<atlock<x<x0>;atlock<atlock<x
    phandle =<0xc7>;
    };
    
    HDMI_CLKIN_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x0>;
    phandle =<0x30>;
    };
    
    MLB_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x81>;
    };
    
    mlbp_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>;
    phandle =<0x82>;
    };
    
    pciesref_acs_clk_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x5f5e100>;
    phandle =<0x40>;
    };
    
    Ref_clkin0_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    };
    
    ref_clkin1_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>;
    }
    
    ref_clkinscell-cock-cells =<0x0>
    
    
    
    
    
    
    ;<clock-clock-cock-cells = 0x0>
    
    
    
    
    RMII_clk_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    };
    
    sdvenc_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x0>
    
    
    
    
    
    
    
    ;};secure_32k_clock-clk_clock-cells = 0x8000;<clock-clock-cells = 0x8000;<clock-clock-cells = 0x000>
    
    SYS_clk32_crystal_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x8000>;
    phandle =<0xc>;
    };
    
    SYS_clk32_pseude_ck{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x11>;
    clock-mult =<0x1>;
    clock-div =<0x262>;
    phandle =<0xd>;
    };
    
    virt_12000000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0xb71b00>;
    phandle =<0x59>;
    };
    
    virt_13000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0xc65d40>;
    };
    
    virt_16800000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x1005900>;
    phandle =<0x5b>
    ;
    
    virt_19200000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x124f800>;
    phandle =<0x5c>;
    };
    
    virt_20000000_ck{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1312d00>;
    phandle =<0x5a>;
    };
    
    virt_26000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x18cba80>;
    phandle =<0x5d>;
    };
    
    virt_27000000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock-frequency =<0x19bfcc0>;
    phandle =<0x5e>;
    };
    
    virt_38400000_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x249f000>;
    phandle =<0x5f>;
    };
    
    SYS_clkin2{
    #clock-cells =<0x0>;
    兼容="固定时钟";
    时钟频率=<0x1588800>;
    相位=<0x60>;
    };
    
    USB_OTG_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x68>;
    };
    
    video_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x3a>;
    };
    
    video_m2_CLKIN_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    clock frequency =<0x0>;
    phandle =<0x2F>;
    };
    
    VIDEO2_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x3b>;
    };
    
    VIDEO2_M2_CLKIN_CK{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    phandle =<0x2e>;
    };
    
    DPLL_AAB_CK@1e0{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-m4xen-cock";
    时钟=<0x12 0x13>;
    reg =<0x1e0 0x1e4 0x1ec 0x1e8>;
    分配时钟=<0x14>;
    分配时钟速率= 0xf080>;
    
    
    
    DPLL_AE_x2_ck{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-x2-clock";
    时钟=<0x14>;
    phandle =<0x15>;
    };
    
    DPLL_ABE_M2x2_ck@1f0{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x15>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1f0>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    phandle =<0x16>;
    };
    
    Abe_clk@108{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x16>;
    ti、max-div =<0x4>;
    reg =<0x108>;
    TI、索引-二进制功率;
    相位=<0x62>;
    };
    
    DPLL_AAB_M2_CK@1f0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x14>;
    ti、max-div =<0x1f>;
    ti、自动空闲-移位=<0x8>;
    reg =<0x1f0>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    phandle =<0x64>;
    };
    
    DPLL_AABE_m3x2_ck@1f4{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x15>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1F4>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x17>;
    };
    
    DPLL_CORE_BYP_MUx@12c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x12c>;
    phandle =<0x18>;
    };
    
    DPLL_CORE_CK@120{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-CORE-clock";
    Clocks =<0x11 0x18>;
    reg =<0x120 0x124 0x12c 0x128>;
    phandle =<0x19>;
    };
    
    DPLL_CORE_x2_ck{
    #clock-cells = 0x19>
    
    ;clock-clock-cells
    
    = 0x19>;}
    
    DPLL_CORE_h12x2_ck@13c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x13c>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x1b>;
    };
    
    MPU_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clock=<0x1b>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x1c>;
    };
    
    DPLL_MPU_ck@
    
    
    
    
    
    
    
    @160{#clock-cells =<0x0>;compatible ="ti、omap5-MPU-DPLL-clock";Clocks =<0x11 0x1m2>;reg =<0x160 0x164 0x16c 0x168>;phandle =<ti 0x4>;}<ti 0x1mcock_cock<1mcy=<t<1mcock-r>
    
    ;<tid<1mcock-r=<1mcock<1mcy<1d<1d<1d<1mcy_dr>;
    
    
    
    reg =<0x170>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x1d>;
    };
    
    MPU_dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x1d>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    相位=<0x6f>;
    };
    
    DSP_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1b>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x1E>;
    };
    
    DPLL_DSP_BYP_mux@240{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x1E>;
    ti、bit-shift =<0x17>;
    reg =<0x240>;
    phandle =<0x1f>;
    };
    
    DPLL_DSP_CK@234{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x11 0x1f>;
    reg =<0x234 0x238 0x240 0x23c>;
    Assigned Clocks =<0x20>;
    Assigned Clock-RATES =<0x23c34600>;
    phandle = 0x20
    ;}
    
    DPLL_DSP_m2_ck@244{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x20>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x244>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    分配的时钟=<0x21>;
    分配的时钟速率=<0x23c34600>;
    PHANDLE =<0x21>;
    };
    
    IVA_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1b>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x22>;
    };
    
    DPLL_IVA_BYP_mux@1ac{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x22>;
    ti、bit-shift =<0x17>;
    reg =<0x1ac>;
    phandle =<0x23>;
    };
    
    DPLL_IVA_CK@1a0{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-clock";
    时钟=<0x11 0x23>;
    reg =<0x1a0 0x1a4 0x1ac 0x1a8>;
    分配的时钟=<0x24>;
    分配的时钟速率=<0x45724>;
    
    }
    
    DPLL_IVA_m2@1b0{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x24>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x1b0>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    分配的时钟=<0x25>;
    分配的时钟速率=<0x17257f16>;
    phandle =<0x25>;
    };
    
    IVA_dclk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x25>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x71>;
    };
    
    DPLL_GPU_BYP_mux@2e4{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x2e4>;
    phandle =<0x26>
    ;}
    
    DPLL_GPU_CK@2d8{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-clock";
    时钟=<0x11 0x26>;
    reg =<0x2d8 0x2dc 0x2e4 0x2e0>;
    分配的时钟=<0x27>;
    分配的时钟速率=<0x4c1dle>
    
    ;}
    
    DPLL_GPU_m2_ck@2e8{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x27>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2e8>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    分配的时钟=<0x28>;
    分配的时钟速率=<0x195f286b>;
    phandle =<0x28>;
    };
    
    DPLL_CORE_m2_ck@130{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x19>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x130>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x29>;
    };
    
    core_DPLL_OUT_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x29>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x73>;
    };
    
    DPLL_DDR_BYP_mux@21c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x21c>;
    phandle =<0x2a>;
    };
    
    DPLL_DDR_CK@210{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x11 0x2a>;
    reg =<0x210 0x214 0x21c 0x218>;
    phandle =<0x2b>;
    };
    
    DPLL_DDR_m2_ti@220 <
    时钟=<clock-cells =<0x2b
    
    
    ;ti-cells
    =<0x2ble<0x2b;<clock =<0x2b<0x2b>;<id-cyclock-clock-cy<0x2<0x2d<0x2d>;<
    reg =<0x220>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x65>;
    };
    
    DPLL_GMAC_BYP_MUx@2B4{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x17>;
    ti、bit-shift =<0x17>;
    reg =<0x2b4>;
    phandle =<0x2C>;
    };
    
    DPLL_GMAC_CK@
    
    
    
    
    
    
    
    @2a8{#clock-cells =<0x0>;compatible ="ti、OMAP4-DPLL";Clocks =<0x11 0x2c>;reg =<0x2a8 0x2ac 0x2b4 0x2b0>;phandle =<0x2D>;};dpll_gMAC_clock<0x2m8>
    ;auto-shock<0x2mcle
    
    
    = 0x2m8>;<0x2d-div>;<0x2mcock-clock<0xd= 0x2m8>;<0xd= 0x2m8<xd<xd<xds-dle>;ti-cock<0xdle>
    
    reg =<0x2b8>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x66>;
    };
    
    VIDEO2_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x2e>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x75>;
    };
    
    video_1_dclk_ddiv{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x2F>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    phandle =<0x76>;
    };
    
    HDMI_dclk_ddiv{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x30>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x77>;
    };
    
    PER_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x17>;
    时钟多路复用=<0x1>;
    Clock-div =<0x2>;
    PHANDLE =<0x43>;
    };
    
    USB_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x17>;
    时钟多路复用=<0x1>;
    Clock-div =<0x3>;
    PHANDLE =<0x47>;
    };
    
    EV_DPLL_hs_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x1b>;
    时钟多路复用=<0x1>;
    Clock-div =<0x1>;
    PHANDLE =<0x31>;
    };
    
    DPLL_EVE_BYP_mux@290{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x31>;
    ti、bit-shift =<0x17>;
    reg =<0x290>;
    phandle =<0x32>;
    };
    
    DPLL_EIV_CK@284{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-clock";
    Clocks =<0x11 0x32>;
    reg =<0x284 0x288 0x290 0x28c>;
    phandle =<0x33>;
    };
    
    DPLL_EIV_m2_ti@
    
    auti{#clock-cells = 0x33>;dock-cells =
    
    <0x33>;<id-cock-cock-cyclock<0x33>;<idr = 0x33>;<idr = 0xdock = 0xdle<0xdle<0xdle>;
    
    reg =<0x294>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x34>;
    };
    
    EVE_Dclk_ddiv{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x34>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x80>;
    };
    
    DPLL_CORE_h13x2_ck@140{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autidle-shift =<0x8>;
    reg =<0x140>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    };
    
    DPLL_core_h14x2_ck@144{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x1a>;
    ti、max-div =<0x3f>;
    ti、auto-shift =<0x8>
    reg =<0x144>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x51>;
    };
    
    DPLL_CORE_h22x2_ck@154{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x154>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x3D>;
    };
    
    DPLL_CORE_h23x2_ck@158{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x158>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x56>;
    };
    
    DPLL_CORE_h24x2_ck@15c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x1a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x15c>;
    ti、index-starts-on-one;
    ti、反转自动空闲位;
    };
    
    DPLL_DDR_x2_ck{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x2b>;
    phandle =<0x35>;
    };
    
    DPLL_DDR_h11x2_ck@228{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x35>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x228>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    };
    
    DPLL_DSP_x2_ck{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-cock";
    Clocks =<0x20>;
    phandle =<0x36>;
    };
    
    DPLL_DSP_m3x2_ck@248{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x36>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x248>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    分配的时钟=<0x37>;
    分配的时钟速率=<0x17d78400>;
    相位=<0x37>;
    };
    
    DPLL_GMAC_x2_ck{
    #clock-cells =<0x0>;
    兼容="ti、OMAP4-DPLL-x2-cock";
    时钟=<0x2D>;
    相位=<0x38>;
    };
    
    DPLL_GMAC_h11x2_ck@2c0{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x38>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c0>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x39>;
    };
    
    DPLL_GMAC_h12x2_ck@2c4{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x38>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2c4>;
    ti、index-starts-on-one;
    ti、反转自动空闲位;
    };
    
    DPLL_GMAC_h13x2_ck@2c8{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    clocks =<0x38>;
    ti、max-div =<0x3f>;
    autobrand-shift =<0x8>;
    reg =<0x2c8>;
    ti、index-starts-at-one;
    ti、inver-autobide-bit;
    phandle =<bb5>;
    };
    
    DPLL_GMAC_m3x2_ck@2bc{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x38>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x2bc>;
    ti、index-starts-at-1;
    ti、反转自动空闲位;
    };
    
    gmii_m_clk_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x39>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    };
    
    HDMI_clk2_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x30>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    HDMI_div_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x30>;
    时钟多项=<0x1>;
    时钟 div =<0x1>;
    };
    
    L3_iclk_div@100{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    ti、max-div =<0x2>;
    ti、bit-shift =<0x4>;
    reg =<0x100>;
    时钟=<0x1b>;
    ti、索引-二进制功率;
    phandle =<0xA>;
    };
    
    L4_ROOT_clk_div{
    #clock-cells =<0x0>;
    兼容="固定因数-时钟";
    时钟=<0xA>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    phandle =<0xb>;
    };
    
    video/clk2_div{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x3a>;
    时钟多普勒=<0x1>;
    Clock-div =<0x1>;
    };
    
    video_div_clk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x3a>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    video2_clk2_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x3b>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    video_div_clk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x3b>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    dummy_ck{
    #clock-cells =<0x0>;
    compatible ="固定时钟";
    Clock-frequency =<0x0>;
    };
    };
    
    时钟域{
    };
    
    MPU_cm@300{
    Compatible ="ti、OMAP4-cm";
    reg =<0x300 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x300 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkcti";reg = 0x400cm;<0x400cm = 0x400cm;time-cells = 0x400cm;time-cells = 0x400cm;}
    
    
    
    #size-cells =<0x1>;
    ranges =<0x0 0x400 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0x4>;
    #clock-cells =<0x2>;
    }
    ;
    
    ippu1_cm@
    
    
    
    
    
    
    @500{compatible ="ti、omc4–cm";reg =<0x500;#clkcell-cells = 0x100;#clcells
    = 0x100;#clcell-cells = 0x100;<0x100 = 0xcell-cells = 0x100;#cell-cells = 0x100;<0x100;<0xcell-cells = 0x100
    reg =<0x20 0x20>;
    #clock-cells =<0x2>;
    分配的时钟=<0x3c 0x0 0x18>;
    分配的时钟父节点=<0x3D>;
    相位=<0x3c>;
    };
    };
    
    IPU_cm@540{
    compatible ="ti、OMAP4-cm";
    reg =<0x540 0xc0>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x540 0xc0>;
    
    clk@0{
    compatible ="ti、clkctrl";
    reg =<0x0 0x44>
    ;#hock-cells
    
    };<0x90>}
    
    
    dsp2_cm@600{
    compatible ="ti、OMAP4-cm";
    reg =<0x600 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x600 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkctrl";reg =<0x20 0x4>
    
    
    
    ;#rtcells = 0x700};<cell-cells = 0x100>;<cells = 0x700 cells = 0x100>;<cock-cells = 0x100>;<cells = 0x100cm;<cells = 0x100cm;<cell-cells = 0x100>
    范围=<0x0 0x700 0x100>;
    
    clk@40{
    compatible ="ti、clkctrl";
    reg =<0x40 0x8>;
    #clock-cells =<0x2>;
    };
    };
    };};
    
    cm_core@
    
    
    
    
    
    
    
    
    
    
    @8000{compatible ="ti、dra7-cm-core"、"simple-bus";#address-cells =<0x1>;#size-cells =<0x1>;reg =<0x8000 0x3000>;ranges =<0x0 0x8000 0x3000>;Clocks{#address-cells =<0x202020cells =<0x202020204s;<cell_clock_clock<0x204<0x20>;<0x2020204bells
    
    = 0x204nv_clock<1>;<cock_clock_clock_clock<0x201>
    
    
    
    };
    
    DPLL_PCIe_ref_m2ldo_ck@210{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x3E>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x210>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x3f>;
    };
    
    apll_PCIe_in_clk_mux@
    
    
    
    
    
    
    
    
    @
    
    
    
    
    
    
    
    @4ae06118{compatible ="ti、mux-clock";Clocks =<0x3f 0x40>;#clock-cells =<0x0>;reg =<0x21c 0x4>;ti、bit-shift =<0x7>;phandle =<0x2141;}<clock-clock-clocks = 0x42>;<peti-clock-clock<0x42>= 0x42>;clock-clock-clock<xtid<xtid<xtcr = 0x4c
    = 0x42>;clip_clip_clipcr = 0x42>
    时钟=<0x42>;
    #clock-cells =<0x0>;
    reg =<0x21c>;
    ti、分频器=<0x2 0x1>;
    ti、bit-shift =<0x8>;
    ti、max-div =<0x2>;
    phandle =<bbbv8>;
    };
    
    apll_PCIe_clkvcoldo{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x42>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    apll_pcie_clkvcoldo_div{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clock=<0x42>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    };
    
    apll_pcie_m2_ck{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x42>;
    时钟多普勒=<0x1>;
    时钟 div =<0x1>;
    phandle =<0x6a>;
    };
    
    DPLL_PER_BYP_mux@14c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x43>;
    ti、bit-shift =<0x17>;
    reg =<0x14c>;
    phandle =<0x44>;
    };
    
    DPLL_PER_CK@140{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL- clock";
    Clocks =<0x11 0x44>;
    reg =<0x140 0x144 0x14c>;
    phandle =<0x45>;
    };
    
    DPLL_PER_m2_ck@150{
    #clock-cells =<0x14;
    
    
    
    ti = 0x45>;shock-cock-cle =<0x45>;dock-div>;<0x45>;<idr =<tidr = 0x45>;ti、tid-cock =<0x45>
    reg =<0x150>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x46>;
    };
    
    func_96m_aon"
    
    
    ;clock-cells/div{#clock-cells =<0x0>;compatible ="固定因子-时钟";clock=<0x46>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    PHANDLE =<0x78>;
    };
    
    DPLL_USB_BYP_mux@18c{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x11 0x47>;
    ti、bit-shift =<0x17>;
    reg =<0x18c>;
    phandle =<0x48>;
    };
    
    DPLL_USB_ck@180{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-j-type-clock";
    Clocks =<0x11 0x48>;
    reg =<0x180 0x184 0x18c 0x188>;
    phandle =<0x49>;
    };
    
    DPLL_USB_ti_ti_190@= 0x7m2;
    
    <clock-m8>
    
    ;auto-shock = 0x49>;dock-randle = 0x49>;<id-mcle = 0x49>
    
    reg =<0x190>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x4d>;
    };
    
    DPLL_PCIe_ref_m2_ck@210{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x3E>;
    ti、max-div =<0x7f>;
    ti、autobide-shift =<0x8>;
    reg =<0x210>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x69>;
    };
    
    DPLL_PER_x2_CK{
    #clock-cells =<0x0>;
    compatible ="ti、OMAP4-DPLL-x2-clock";
    Clocks =<0x45>;
    phandle =<0x4a>;
    };
    
    DPLL_PER_h11x2_ck@158{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x4a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x158>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x4b>;
    };
    
    DPLL_PER_h12x2_ck@15c{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x4a>;
    ti、max-div =<0x3f>;
    ti、autobide-shift =<0x8>;
    reg =<0x15c>;
    ti、index-starts-at–one;
    ti、反转自动空闲位;
    };
    
    DPLL_per_h13x2_ck@160{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x4a>;
    ti、max-div =<0x3f>;
    auto-shift =<0x8;auto-ide-shift =<0x8
    reg =<0x160>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    };
    
    DPLL_per_h14x2_ck@164{
    #clock-cells =<0x0>;
    compatible ="ti、divider 时钟";
    Clocks=<0x4a>;
    ti、max-div =<0x3f>;
    ti、auto-shift =<0x8>
    reg =<0x164>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x52>;
    };
    
    DPLL_PER_M2x2_CK@150{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x4a>;
    ti、max-div =<0x1f>;
    ti、autobide-shift =<0x8>;
    reg =<0x150>;
    ti、index-starts-at-one;
    ti、反转自动空闲位;
    phandle =<0x4c>;
    };
    
    DPLL_USB_clkdcoldo{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks=<0x49>;
    clock-mult =<0x1>;
    clock-div =<0x1>;
    phandle =<0x4f>;
    };
    
    func_128m_clk{
    #clock-cells =<0x0>;
    兼容="固定因子时钟";
    时钟=<0x4b>;
    时钟多普勒=<0x1>;
    clock-div =<0x2>;
    };
    
    func_12m_fclk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    Clocks =<0x4c>;
    clock-mult =<0x1>;
    clock-div =<0x10>;
    };
    
    func_24m_clk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x46>;
    clock-mut =<0x1>;
    clock-div =<0x4>;
    };
    
    func_48m_fclk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x4c>;
    clock-mult =<0x1>;
    clock-div =<0x4>;
    };
    
    func_96m_fclk{
    #clock-cells =<0x0>;
    compatible ="固定因子时钟";
    clock =<0x4c>;
    clock-mult =<0x1>;
    clock-div =<0x2>;
    };
    
    l3init_60m_fclk@104{
    #clock-cells =<0x0>;
    兼容="ti、divider-clock";
    时钟=<0x4d>;
    reg =<0x104>;
    ti、dividers =<0x1 0x8>;
    };
    
    clkout2_clk@6b0{
    #ti-cells =<0x104>
    
    ;clock-clocks=<0x8>;clock-clock-clocks =<0x4e =<b>;clock-clock-clock<shift =<0x4e<x0>;clock-clock-clock<
    
    
    phandle =<0xEA>;
    };
    
    l3init_960m_gfclk@6c0{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x4f>;
    ti、bit-shift =<0x8>;
    reg =<0x6c0>;
    };
    
    USB_phy1_always_ON_clk32k@640{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x640>;
    phandle =<0xba>;
    };
    
    USB_phy2_always_on" clk32k@688{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x688>;
    phandle =<bbbbc>;
    };
    
    USB_phy3_always_on" clk32k@698{
    #clock-cells =<0x0>;
    兼容="ti、gate-clock";
    时钟=<0x50>;
    ti、bit-shift =<0x8>;
    reg =<0x698>;
    phandle =<0xbd>;
    };
    
    GPU_core_gclk_mux@1220{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x51 0x52 0x28>;
    ti、bit-shift =<0x18>;
    reg =<0x122>;
    分配的时钟=<0x53>;
    分配的时钟= 0x28>
    phandle =<0x53>;
    };
    
    GPU_hyd_gclk_mux@1220{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x51 0x52 0x28>;
    ti、bit-shift =<0x1a>;
    reg =<0x122>;
    分配的时钟= 0x54>
    ;分配的时钟= 0x28;分配的时钟=分配的父级
    phandle =<0x54>;
    };
    
    l3instr_ts_gclk_div@E50{
    #clock-cells =<0x0>;
    兼容="ti、divider 时钟";
    时钟=<0x55>;
    ti、bit-shift =<0x18>;
    reg =<0xe50>;
    
    
    
    
    
    
    
    
    
    
    
    @、分频器=<0x8 0x10 0x20>;};vip1_gclk_mux@
    
    
    
    
    
    
    
    @1020{#clock-cells =<0x0>;兼容="ti、mux-clock";时钟=<0xA 0x56>;ti、bit-shift =<0x18>;reg =<0x1020>;}vip2_mux-clock<0x30>;<gclock<0x308_clock<x30<x30>
    ;<xnock<xnock-clus<0x30<x_clus<x>;<xnock<xnock<0x30<x_clus<x>;<xnock<xnock<x_clus<x>;<xnock<xnock<xnock<0x18>;<0x30
    兼容="ti、mux-clock";
    时钟=<0xA 0x56>;
    ti、bit-shift =<0x18>;
    reg =<0x1030>;
    };
    };
    
    clockdomain{
    
    coreain_clkdm{
    compatible ="ti、clockdomain";
    clock =<0x49>;
    };
    };
    
    coreain_cm@
    
    
    
    
    
    
    @600{compatible ="ti、OM1c-cm";reg =<0x600 0x100>;#address-cells =<0x1>;#size-cells =<0x1>;ranges = 0x100>
    
    
    ;#clock-cells
    
    
    = 0x100>;#clock<0x100>= 0x100>;#clock-cells = 0x100>
    
    l3main1_cm@700{
    compatible ="ti、OMAP4-cm";
    reg =<0x700 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x700 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkctrl";
    reg =<0x20 0x100;#ipcell-cells = 0x1;<OM4-cm2;<cells = 0x1}cells = 0x1;<ipcell-cells = 0x1;<OM4-cells = 0x1;<cells = 0x100}<cells = 0x1;<cell-cells = 0x100 cells = 0x100
    
    
    
    范围=<0x0 0x900 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0x4>;
    #clock-cells =<0x2>;
    };
    };
    
    dma_cm@
    
    
    
    
    
    
    @a00{compatible ="ti、omap4-cm";reg =<0xa00 0x100>;#address-cells = 0x20;区域= 0xc00 = 0xc00;#cl1 = 0xc00 = 0xc00;#clc00 = 0xc00 = 0xc00;#cl1 = 0xc00 = 0xc00;< 0xc00 = 0xc00;#cl1 = 0xc00;< 0xc00 = 0xc00
    
    
    #clock-cells =<0x2>;
    }
    ;
    
    EMIF_cm@B00{
    compatible ="ti,OMATl-cm";
    reg =<b2000 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 b00 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti,cells = 0x100>;clock-ctr4 = 0xctr4};clock-ctr4 = 0xctr4 = 0xcock_ctr4 cm;clap4 = 0xcock-cab4 =
    0xcm;clap4 = 0xcab4 = 0xcab4}
    
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0xc00 0x100>;
    
    clk@0{
    compatible ="ti、clkctrl";
    reg =<0x0 0x4>;
    #clock-cells =<0x2>;
    phandle =<0x10>;
    };
    };};
    
    l4cfg_cm@d00{
    Compatible ="ti、OMAP4-cm";
    reg =<0xd00 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0xd00 0x100>;
    
    clk@
    
    
    
    
    
    
    @20{compatible ="ti、clkctrl";reg =<0x100>
    
    
    ;<0x3cm1;<reomcell-cells = 0x100>;<0x3cm4 incells = 0x00;<reus-cells = 0x1cm";<0x1cm;#ecell-cells = 0x1cm;<0x1cm4 incells = 0xcells = 0x1cm;<0x1cm;<reus
    
    范围=<0x0 0xe00 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0xc>;
    #clock-cells =<0x2>;
    };
    };
    
    dss_cm@
    
    
    
    
    
    
    @1100{compatible ="ti、omag4-cm";
    
    reg =<0x1100 0x100>;#address-cells = 0x100;#clcells = 0x20 = 0x100;< 0x1 = 0xcells = 0x100;clcock-cells = 0x1 = 0x100;< 0x100 = 0xctrl = 0x1;< 0x100 = 0xctrl = 0xcr = 0x100;< 0x100;
    #clock-cells =<0x2>;
    phandle =<0xcb>;
    };
    };
    
    l3init_cm@1300{
    compatible ="ti、OMAP4-cm";
    reg =<0x1300 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x1300 0x100>;
    
    clk@20{
    compatible ="ti、clkctrl";
    reg =<0x20 0xd4;
    #bidle>};<cock-cells
    
    = 0xble>
    
    
    l4per_cm@1700{
    compatible ="ti、OMAP4-cm";
    reg =<0x1700 0x300>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x1700 0x300>;
    
    clk@0{
    compatible ="ti、clkctrl";
    reg =<0x0 0x20cells = 0x57>
    ;
    <time-clocksigned cells = 0x57>
    
    
    ;<0x57>;<time-clocks= 0x168>
    
    };
    };
    
    L4@4ae00000{
    compatible ="ti、dra7-l4-wkup"、"simple-bus";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges =<0x0 0x4ae00000 0x3f000>;
    
    counter@
    
    
    
    
    
    @4000{compatible ="ti、ti-32k";reprm = 0x4000
    
    
    
    ;<0x4eprm = 0x4000-reprm = 0x000";reg = 0x4000-reprm = 0x4000-reg;0x4000-rem;0x4mr = 0x4000-reg = 0x4000-reg = 0x4000-reg;0x4000-rm;0x4mr = 0x000";0x4mr = 0x4000-reprm = 0x
    #size-cells =<0x1>;
    范围=<0x0 0x6000 0x3000>;
    
    时钟{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    sys_clkin1@110{
    #clock-cells =<0x0>;
    compatible ="ti、mux-cock";
    Clocks=<0x59 0x5b 0x5a = 0x5a
    
    ;0x5a = 0x5a;<0x5a = 0x5a = 0x5a;<0x5a = 0x5a = 0x5a;<0x5a = 0x5a;0x5a = 0x5a
    
    
    
    Abe_DPLL_sys_clk_mux@118{
    #clock-cells =<0x0>;
    兼容="ti、mux-clock";
    时钟=<0x118>
    ;
    寄存器=<0x118>;相位=<0x61>;
    };
    
    ti_DPLL_bype_mux@
    
    
    
    
    
    
    
    @114{#clock-cells = 0x50>
    ;
    兼容时钟= 0x61>;兼容时钟= 0x60>;
    
    reg =<0x10c>;
    phandle =<0x12>;
    };
    
    Abe_24m_fclk@
    
    
    
    
    
    
    
    
    @11c{#clock-cells =<0x0>;compatible ="ti、diver-clock";Clocks =<0x16>;reg =<0x11c>;ti、divers =<0x8 0x10>;phandle =<0x62>
    ;<clock-cless =
    0x178<rev = 0x178>;clock-clock<rev =
    0x24>;<rev
    
    = 0x24>;clock-clock<rev = 0x24>;clock<rev = 0x24>;clock<rev = 0x24<rev = 0x24>;cl
    phandle =<0x63>;
    };
    
    Abe_giclk_div@174{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x63>;
    reg =<0x174>;
    ti、max-div =<0x2>;
    phandle =<0x91>;
    };
    
    Abe_LP_clk_div@
    
    
    
    
    
    
    
    
    @1d8{#clock-cells =<0x0>;compatible ="ti、diver-clock";Clocks =<0x16>;reg =<0x1d8>;ti、divers =<0x10 0x20>;phandle =<0x83>;}abe-clocks
    
    =<0x120>;abe= 0x1d<TI_clocks =<0x1d<rev = 0x1d>;ti-clocks = 0x1d<1d<xd<xd<xd<xd>;ams-cl<xd<xd<xd>;am<1
    
    
    
    };
    
    adc_gfclk_mux@1dc{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    clock =<0x11 0x60 0x50>;
    reg =<0x1dc>;
    };
    
    sys_clk1_dclk_ddiv@1c8{
    #clock-cells =<0x0>;
    
    
    reg =<0x1dc>;<clock-clocks=<rev =<0x40>;times<times<times<times<times<times<times<times<times<times<times<rev
    
    TI、index-power-of -two;
    phandle =<0x6c>;
    };
    
    sys_clk2_dclk_ddiv@1cc{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x60>;
    ti、max-div =<0x40>;
    reg =<0x1cc>;
    TI、索引-二进制功率;
    相位=<0x6d>;
    };
    
    per_abe_x1_dclk_ddiv@1bc{
    #clock-cells =<0x0>;
    compatible ="ti、diver-clock";
    Clocks =<0x64>;
    ti、max-div =<0x40>;
    reg =<0x1bc>;
    TI、索引-二进制功率;
    相位=<0x6e>;
    };
    
    dsp_gclk_div@18c{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x21>;
    ti、max-div =<0x40>;
    reg =<0x18c>;
    TI、索引-二进制功率;
    相位=<0x70>;
    };
    
    GPU_dclk@1a0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x28>;
    ti、max-div =<0x40>;
    reg =<0x1a0>;
    TI、索引-二进制功率;
    相位=<0x72>;
    };
    
    EMIF_phy_dclk_ddiv@190{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x65>;
    ti、max-div =<0x40>;
    reg =<0x190>;
    TI、索引-二进制功率;
    相位=<0x74>;
    };
    
    GMAC_250m_dlk_dclk_ddiv@19c{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x66>;
    ti、max-div =<0x40>;
    reg =<0x19c>;
    TI、索引-二进制功率;
    相位=<0x67>;
    };
    
    GMAC_MAIN_clk{
    #clock-cells =<0x0>;
    兼容="固定因数-时钟";
    时钟=<0x67>;
    时钟-多普勒=<0x1>;
    Clock-div =<0x2>;
    phandle =<0xc8>;
    };
    
    l3init_480m_dlk_dclk_ddiv@1ac{
    #clock-cells =<0x0>;
    兼容="ti、diver-clock";
    时钟=<0x4d>;
    ti、max-div =<0x40>;
    reg =<0x1ac>;
    TI、索引-二进制功率;
    相位=<0x79>;
    };
    
    USB_OTG_Dclk_ddiv@184{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x68>;
    ti、max-div =<0x40>;
    reg =<0x184>;
    TI、索引-二进制功率;
    相位=<0x7a>;
    };
    
    SATA_dclk_div@1C0{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x11>;
    ti、max-div =<0x40>;
    reg =<0x1c0>;
    TI、索引-二进制功率;
    相位=<0x7B>;
    };
    
    PCIe2_dclk_ddiv@1b8{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x69>;
    ti、max-div =<0x40>;
    reg =<0x1b8>;
    TI、索引-二进制功率;
    相位=<0x7c>;
    };
    
    pcie_dclk_div@1B4{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x6a>;
    ti、max-div =<0x40>;
    reg =<0x1b4>;
    TI、索引-二进制功率;
    相位=<0x7d>;
    };
    
    emu_dclk_ddiv@194{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x11>;
    ti、max-div =<0x40>;
    reg =<0x194>;
    TI、索引-二进制功率;
    相位=<0x7E>;
    };
    
    SECURE_32k_dclk_ddiv@1c4{
    #clock-cells =<0x0>;
    兼容="ti、分频器-时钟";
    时钟=<0x6b>;
    ti、max-div =<0x40>;
    reg =<0x1c4>;
    TI、index-power-of -two;
    phandle =<0x7f>;
    };
    
    clkoutmux0_clk_mux@
    
    
    
    
    
    
    @158{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clock =<0x6c 0x6d 0x6e 0x6e 0x70 0x71 0x72 0x72 0x73 0x7b 0x7b 0x78 mux-clocks;0x7b 0x7b 0x78 0x7b 0x78 mux-clocks
    = 0x7b 0x7b 0x78;0x7b 0x7b 0x7b 0x78 0x7b 0x78 mux-clkc 0x78 0x78 0x78 0x78 0x78 0x78 0x7 mux_clkc;0x7b 0x7b 0x78 0x7b 0x78 0x
    
    时钟=<0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x79 0x7a 0x7B 0x7c 0x7d 0x7E 0x7f 0x80>;
    reg =<0x15c>;
    };
    
    clkoutmux2_clk_mux@160{
    #clock-compatible cLOCK
    = 0x0};
    时钟=<0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x79 0x7a 0x7c 0x7d 0x7E 0x7f 0x80>;
    reg =<0x160>;
    phandle =<0x4e>;
    };custefus_0x7c 0x7d 0x7d 0x7e 0x7e 0x7e 0x7f 0x7f 0x80>;
    
    
    
    reg <cock = 0x1div;<clock-cycl= 0xd=<cock-cycl=<cock<x0>;<cycl=<cock-cock<xt = 0x1<cycl=<
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    
    @;eve_clk@180{#clock-cells =<0x0>;compatible ="ti、mux-clock";Clocks =<0x34 0x37>;reg =<0x180>;};HDMI_DPLL_clk_mux@164{#clock-cells =<0x0>;compatible ="ti、mux-clock";reg
    
    
    
    = 0x134;<clocks=<0x60>;<clocks=<clock-clocks=<0x134<re=<clus<clus<0x60>;<clus<cl<clus<clus<clus<clus<clus<clus<clus<clus<clus<0x134<clus<clus<
    
    TI、索引功率二进
    制;};
    
    mlbp_clk@130{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x82>;
    ti、max-div =<0x40>;
    reg =<0x130>;
    TI、索引功率二进制;
    };
    
    per_abe_x1_gfclk2_div@138{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x64>;
    ti、max-div =<0x40>;
    reg =<0x138>;
    TI、索引功率二进制;
    };
    
    timer_sys_clk_div@144{
    #clock-cells =<0x0>;
    兼容="ti、分频器时钟";
    时钟=<0x11>;
    reg =<0x144>;
    ti、max-div =<0x2>;
    };
    
    video_DPLL_clk_mux@168{
    #clock-cells =<0x0>;
    compatible ="ti、mux-clock";
    Clocks =<0x11 0x60>;
    reg =<0x168>;
    };
    
    video_DPLL_clk_mux@
    
    
    
    
    
    
    @16c{#clock-cells =<0x108>;compatible = 0x1081211>
    ;clock-mux<clock-clocks = 0x60>;clus_mux<0x60>;clock-clock-clock-clock<0x108<l=<l=<l=<lick>
    
    
    
    相位=<0x55>;
    };
    };
    
    clocktrl 域{
    };
    
    wkupaON_cm@1800{
    兼容="ti、omap4-cm";
    reg =<0x1800 0x100>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围=<0x0 0x1800 0x100>;
    
    clk@20{
    兼容="ti、clkcle";
    reg = 0x8cell>
    ;#x6cocktrl = 0x20>;}
    
    
    
    };
    
    SCM_conf@c000{
    compatible ="SYSCON";
    reg =<0xc000 0x1000>;
    phandle =<0x7>;
    };
    };
    
    axi@
    
    
    
    
    
    @0{compatible =" simple-bus";#size-cells =<0x1>;#address-cells =<0x1000000 0x1000000
    
    寄存器= 0x100000";0x100000n rc = 0x100000";0x100000n rc = 0x100000"寄存器0x100000"
    中断=<0x0 0xe8 0x4 0x0 0xe9 0x4>;
    #address-cells =<0x3>;
    #size-cells =<0x2>;
    device_type ="PCI";
    范围=<0x81000000 0x0 0x3000 0x10000 0x82000000 0x0 0x13000 0x13000 0x0x0 0x0x0000x0000x0000x0000x0000x0000x0000x0000x0000x0000>;
    
    <hw1>= 0x0000.<cid-cycums
    
    = 0x000>;<cip-*** = 0x000<0x000>= 0x000>;<cip-*** = 0x000<0x000>= 0x0000.1<r0-***
    
    PHYs =<0x84>;
    phy-names ="PCIe-phy0";
    ti、SYSCON-lane SEL =<0x85 0x18>;
    interrupt-map-mask =<0x0 0x0 0x0 0x0 0x0 0x7 0x7>;
    interrupt-map =<0x0 0x0 0x0 0x0 0x86 0x0
    
    0x6 0x0 0x6 0x0 0x0 0x0 0x6 0x0 0x0 0x4、"PCIe 0x4 0x4 0x4、"FR";"0x4 0x4 0x4 0x4 0x4 0x4 0x4、"pcie"
    GPIO =<0x87 0x8 0x1>;
    
    中断控制器{
    中断控制器;
    #address-cells =<0x0>;
    #interrupt-cells =<0x1>;
    phandle =<0x86>;
    };
    };
    
    PCIe_EP@51000000{
    reg =<0x51000000 0x28 0x51002000 0x14c 0x51001000 0x28 0x1000 0x10000000>;
    reg 名称="EP_dbics"、"ti_conf"、"EP_dbics2"、"addr_space";
    中断=<0x0 0xe8 0x4>;
    num-lanes =<0x1>;
    num-ib-windows =<0x4>;
    num-ob-windows =<0x10>;
    ti、hwmods ="pcie1";
    phys =<0x84>;
    phy-names ="PCIe-phy0";
    ti、SYSCON-unaligned 访问=<0x88 0x14 0x1>;
    ti、SYSCON-lane SEL =<0x85 0x18>;
    status ="禁用";
    compatible ="ti、dra746-PCIe-EP"、"ti、dra7-pcie"
    ;}
    };
    
    axi@1{
    compatible ="简单总线";
    #size-cells =<0x1>;
    #address-cells =<0x1>;
    ranges =<0x51800000 0x51800000 0x3000 0x0 0x30000000 0x10000000>;
    status ="禁用";
    
    pcie@51800000{
    reg =<0x51800000 0x2000 0x164c
    ;0x1802_cules
    = 0x2000"
    、0x164c = 0x18000";0x2000"寄存器= 0x164c = 0x164~0x000"地址0x000"
    #size-cells =<0x2>;
    device_type ="PCI";
    ranges =<0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x30013000 0x13000 0x1000 0x0 0x0x0x0x0x0x0x000>;
    bus-range =<0x0 0xff>;
    #interrupt-cells =<0x1>;
    num-lanes = 0x1
    、linux<PCIe2 = 0x1;<PCId'域
    = 0x1;<PCId'
    PHYs =<0x89>;
    phy-names ="PCIe-phy0";
    interrupt-map-mask =<0x0 0x0 0x0 0x0 0x0 0x0 0x1
    0x8a 0x0 0x0 0x0 0x0 0x2 0x8a 0x0 0x0 0x0 0x3 0x8a 0x3 0x0 0x4
    ;interrupt-cells
    
    
    
    = 0x746-cells 0x4;interrt cells 0x746-dracells 0x4、0x4s 0x7>PCIe 控制器0x4<cells 0x7';inter-cell-cells 0x7'
    #interrupt-cells =<0x1>;
    phandle =<0x8a>;
    };
    };
    };
    
    ocmcram@40300000{
    compatible ="MMIO-SRAM";
    reg =<0x40300000 0x80000>;
    Ranges =<0x0 0x40300000 0x80000>;
    #address-cells =<0x1>;
    #size-cells = 0x1>;
    
    SRAM-hs@
    
    
    
    
    
    @0{compatible ="ti、secure-ram";reg = 0x400000;0x400000 = 0x400000}
    RAM = 0x400000;0x400000 = 0x400000;RAM0<0x400mRAM0>
    
    
    
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    };
    
    ocmcram@
    
    
    
    
    
    
    
    
    @40500000{status ="disabled";compatible ="MMIO-SRAM";reg =<0x40500000 0x100000>;ranges =<0x0 0x40500000 0x100000>;#address-cells = 0x2124 = 0x002380
    ;0x4bandcle = 0x0040 0x4232 = 0x0040 000>;0x4bandcr 0x4c = 0x0040 0001cr 0x4c = 0x0040 000> 0x4bandcr 0x4c = 0x24000C
    ;0x4cr 0x4bandcr 0x4c = 0x0040 000C = 0x0040 000C 0x24000> 0x4cr 0x24000C 0x24000> 0x4c = 0x000C
    中断=<0x0 0x79 0x4>;
    #thermicature-sensor-cells =<0x1>;
    phandle =<0xd9>;
    };
    
    DSP_SYSTEM@40d00000{
    compatible ="SYSCON";
    reg =<0x40d00000 0x100>;
    phandle =<inc3>;
    };
    
    padconf@4844a000 =<0xd1<cells
    = 0xd1cells;<0xd1<cells
    
    = 0xd1cells = 0xd1cells;<cells
    
    = 0xd4cells = 0xd1cells;<0xd1<cells = 0xd1cells = 0x4cells
    
    mmc1_iodelay_DDR_rev11_conf{
    pinctrl-PIN-array =<0x618 0x23c 0x21c 0x620 0x5f5 0x0 0x624 0x0 0x258 0x628 0x0 0x62c 0x37 0x630 0x193 0x78 0x634 0x0 0x638 0x0 0x0 0x63c 0x0 0x640 0x0 0x650 0x0 0x0 0x6580x0 0x0 0x64c 0x0 0x0 0x64 0x0 0x0 0x0 0x65 0x65 0x0 0x0 0x64 0x0 0x65 0x65 0x0 0x65 0x0 0x64 0x0 0x65 0x0 0x65 0x0 0x64 0x0 0x65 0x65 0x65 0x0 0x0 0x0 0x65c 0x0 0x0>;
    };
    
    mmc1_iodelay_ddr50_rev20_conf{
    pinctrl-pino-array =<0x618 0x434 0x14a 0x620 0x4f7 0x0 0x654 0x2d2 0x0 0x628 0x0 0x62c 0x0 0x630 0x2ef 0x0 0x644 0x0 0x640 0x14 0x648 0x0 0x0 0x6580x0 0x6580x0 0x6580x0 0x64C 0x0 0x0 0x0 0x0 0x6580x0 0x6580x0 0x6580x0 0x0 0x640 0x0 0x0 0x0 0x0 0x6580x0 0x0 0x6580x0 0x6580x0 0x0 0x6580x0 0x0 0x0 0x65c 0x0 0x00x0>;
    };
    
    mmc1_iodelay_sdr104_rev11_conf{
    pinctrl-pin_array =<0x620 0x427 0x11 0x628 0x0 0x62c 0x17 0x0 0x634 0x0 0x0 0x638 0x0 0x0 0x640 0x0 0x0 0x625 0x0 0x0 0x65 0x0 0x0 0x65 0x0 0x65 0x0 0x65 0x0 0x65 0x0 0x65 0x65 0x0 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x0 0x65 0x65 0x
    
    
    mmc1_iodelay_sdr104_rev20_conf{
    pinctrl-pino-array =<0x620 0x258 0x190 0x628 0x0 0x62c 0x0 0x0 0x634 0x0 0x638 0x1E 0x0 0x640 0x0 0x0 0x644 0x0 0x0 0x64c 0x0 0x0 0x650 0x0 0x658>0x658>0x0 0x658-0x0 0x658>0x658>0x0 0x658+0x6540-0x0
    
    
    mmc2_iodelay_hs200_rev11_conf{
    pinctrl-pino-array =<0x190 0x26d 0x258 0x12c 0x0 0x1a8 0x2e3 0x258 0xf0 0x1ac 0xf4 0x32c 0x258 0x1b8 0x1c0 0x1c0 0x3ba 0x2580x1c0 0x2580x1d0x1c0 0x2580x1c0 0x1c0 0x2580x1c00x1c00x1c00x2580x1c00x1c00x1c00x1c00x1c00x2580x1c00x1c00x1c00x2580x1c00x1c00x1c00x1c00x1c00x1c00x 0x235 0x258 0x200 0x3c 0x0 0x364 0x3c9 0x258 0x368 0xb4 0x0>;
    };
    
    mmc2_iodelay_HS200_rev20_conf{
    pinctrl-PIN-array =<0x190 0x112 0x0 0x194 0xa2 0x0 0x1a8 0x191 0x1ac 0x49 0x0 0x1b4 0x1d1 0x0 0x1b8 0x73 0x0 0x1c0 0x279 0x1c4 0x1c0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d2 0x1d0 0x106 0x0 0x200 0x2e 0x0 0x364 0x2ac 0x0 0x368 0x4c 0x0>;
    };
    
    mmc2_iodelay_DDR_3_3V_rev11_conf{
    pinctrl-pin-array =<0x18c 0x0 0x78 0x190 0x0 0x194 0xae 0x0 0x1a4 0x109 0x168 0x1a8 0x0 0x1ac 0x0 0x1b0 0x78 0x78 0x1b4 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1c0 0x1d 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x78 0x1f0 0x0 0x1F4 0x78 0x0 0x1f8 0x78 0x78 0x64 0x1fc 0x0 0x0 0x200 0x0 0x360 0x0 0x360 0x0 0x0x0 0x0 0x0 0x360 0x0 0x0 0x0 0x0 0x0 0x0 0xb 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x36 0x0 0x0 0x
    
    
    mmc2_iodelay_DDR_1_8v_rev11_conf{
    pinctrl-pin-array =<0x18c 0x0 0x190 0x0 0x194 0xae 0x0 0x1a4 0x112 0xf0 0x1a8 0x0 0x1ac 0x0 0x1b0 0x1b0 0x1c 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1b0 0x1c0 0x1b0 0x1c0 0x1b0 0x1c0 0x1 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x3c 0x1f0 0x0 0x0 0x1F4 0x78 0x0 0x1f8 0x79 0x364 0x364 0x1fc 0x0 0x0 0x200 0x0 0x0 0x360 0x0 0x360 0x0x0 0x360 0x0 0x0 0x0 0x360 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3c 0x0 0x0 0x0 0x
    
    
    mmc3_iodelay_manual1_conf{
    pinctrl-PIN-array =<0x678 0x196 0x0 0x680 0x293 0x0 0x684 0x0 0x688 0x0 0x68c 0x0 0x0 0x690 0x82 0x0 0x694 0x0 0x0 0x698 0x0 0x0 0x0 0x69c 0xA9 0x0 0x6a0 0x0 0x0 0x6a0 0x0 0x6b0 0x0 0x0 0x6b0 0x0 0x0 0x0 0x6b0 0x0 0x0 0x00x6b0 0x0 0x00x00x00x00x00x6 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x6 0x0 0x0 0x 0x0 0x0 0x6bc 0x0 0x0>;
    };
    
    MMC4_iodelay_DS_rev11_conf{
    pinctrl-PIN-array =<0x840 0x0 0x848 0x0 0x84c 0x60 0x0 0x850 0x0 0x854 0x0 0x0 0x870 0x246 0x0 0x874 0x0 0x0 0x78 0x0 0x0 0x0 0x87c 0x187 0x0 0x880 0x0 0x888 0x880 0x0 0x880 0x0 0x880 0x0 0x880 0x88 0x88 0x0 0x880 0x0 0x88 0x88 0x88 0x88 0x88 0x88 0x0 0x88 0x88 0x88 0x0 0x88 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x 0x0 0x0 0x89c 0x0 0x0>;
    };
    
    MMC4_iodelay_DS_rev20_conf{
    pinctrl-pine-array =<0x840 0x0 0x848 0x0 0x84c 0x133 0x0 0x850 0x0 0x854 0x0 0x0 0x870 0x311 0x0 0x874 0x0 0x0 0x78 0x0 0x0 0x0 0x87c 0x265 0x280 0x0 0x888 0x0 0x880 0x0 0x0 0x880 0x0 0x0 0x880 0x0 0x880 0x0 0x8848 0x0 0x0 0x88 0x88 0x88 0x88 0x88 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x0 0x88 0x88 0x88 0x88 0x0 0x 0x0 0x0 0x89c 0x0 0x0>;
    };
    
    MMC4_iodelay_sdr12_hs_sdr25_rev11_conf{
    pinctrl-pine-array =<0x840 0x0 0x848 0xa5b 0x0 0x84c 0x763 0x0 0x850 0x0 0x854 0x0 0x870 0x779 0x0 0x874 0x0 0x0 0x898 0x878 0x8780x0 0x890 0x880 0x0 0x880 0x880 0x0 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x870 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x880 0x8C 0x880 0x880 0x0 0x 0x0 0x0 0x89c 0x0 0x0>;
    };
    
    MMC4_iodelay_sdr12_hs_sdr25_rev20_conf{
    pinctrl-pin_array =<0x840 0x0 0x848 0x47b 0x0 0x84c 0x72a 0x0 0x850 0x0 0x854 0x0 0x870 0x875 0x0 0x874 0x0 0x0 0x898 0x878 0x878 0x7880 0x88c 0x0 0x8880 0x780 0x8880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x7880 0x 0x0 0x0 0x89c 0x0 0x00x0>;
    };
    
    
    @;dma-controller 4a056000{
    compatible ="ti,omap4430-sdma";
    reg =<0x4a056000 0x1000>;
    interrupts =<0x0 0x7 0x4 0x8 0x4 0x4 0x0 0x4 0x0 0x0 0xA 0x4 0x4 0x4;
    
    
    
    reg <0x4dma>;<0x4dma-mcells = 0x7dma>;<dma-rmags=<0xdma>;<0xdma-rs-cells = 0x7dma<dma>;<dma
    phandle =<0xe>;
    };
    
    EDMA@43300000{
    compatible ="ti、EDMA3-tpcc";
    ti、hwmonds ="tpcc";
    reg =<0x43300000 0x100000>;
    reg 名称="EDMA3_cc";
    中断=<0x0 0x169 0x4 0x0 0x16 0x16 0x16 0x16
    0x16 0x16 0x16 0x40、0x3 0xEDMA3;"0xmctram_int";"0xmcr = 0x4 0x4 0xmag3 0xmand";"0xmcr、"0x4 0x4 0xmcand";"0xmcr、"0xmag3 0x4、"
    
    #dma-cells =<0x2>;
    ti、tptcs =<0x8b 0x7 0x8c 0x0>;
    phandle =<0xF>;
    };
    
    tptc@
    
    
    
    
    
    
    
    
    @43400000{compatible ="ti、EDMA3-tptc";ti、hwmonds ="tptc0";reg =<0x43400000;tprinc = 0x00002<0x000";tprintrabout1 = 0x4mag3;t0002 = 0x0000.cn"中断= 0x000";tmagc = 0x0000.000"
    
    
    
    中断=<0x0 0x173 0x4>;
    中断名称="EDMA3_tcertcertcertrint";
    phandle =<0x8c>;
    };
    
    GPIO@4ae10000{
    兼容="ti、OMAP4-GPIO";
    reg =<0x410000 0x200>;
    中断=<0x0 0x18 0x4>;
    ti、hwmods ="GPIO-2"
    
    ;控制器#GPIO1-cells;
    中断控制器#GPIO1-cells
    #interrupt-cells =<0x2>;
    phandle =<0xa7>;
    };
    
    GPIO@48055000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48055000 0x200>;
    interrupts =<0x0 0x19 0x4>;
    ti、hwmods ="GPIO2";
    GPIO-controller;
    #GPIO-cells =<0x2>
    ;interrupt-controller;interrupt-cells = 0x2>
    #interrupt-cells =<0x2>;
    phandle =<0x87>;
    };
    
    GPIO@48057000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48057000 0x200>;
    interrupts =<0x0 0x1A 0x4>;
    ti、hwmonds ="GPIO3";
    GPIO-controller;
    #GPIO-cells =<0x2>
    ;interrupt-controller; interrupt-cells = 0x2-controller;interrupt-controller; interrupt
    #interrupt-cells =<0x2>;
    };
    
    GPIO@48059000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48059000 0x200>;
    interrupts =<0x0 0x1b 0x4>;
    ti、hwmds ="GPIO4";
    GPIO-controller;
    #GPIO-cells =<0x2>;
    中断控制器;
    #interrupt-cells =<0x2>;
    phandle =<0xa9>;
    };
    
    GPIO@4805b000{
    Compatible ="ti、OMAP4-GPIO";
    reg =<0x4805b000 0x200>;
    interrupts =<0x0 0x1c 0x4>;
    ti、hwmods ="GPIO5";
    GPIO 控制器;
    #GPIO-cells = 0x2>
    ;interrupt-cells = 0x2>
    #interrupt-cells =<0x2>;
    };
    
    GPIO@4805d000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x4805d000 0x200>;
    interrupts =<0x0 0x1d 0x4>;
    ti、hwmods ="GPIO6";
    GPIO-controller;
    #GPIO-cells =<0x2>;
    interrupt-controller;interrupt-controller;
    #interrupt-cells =<0x2>;
    phandle =<0xaf>;
    };
    
    GPIO@48051000{
    compatible ="ti、OMAP4-GPIO";
    reg =<0x48051000 0x200>;
    interrupts =<0x0 0x1E 0x4>;
    ti、hwmonds ="GPIO7";
    GPIO-controller;
    #GPIO-cells =<0x2>
    ;interrupt-controller; interrupt-cells = 0x2-controller;interrupt-controller; interrupt
    #interrupt-cells =<0x2>;
    ti、no-reset-on-init;
    ti、no-idle-on-init;
    phandle =<0xAA>;
    };
    
    GPIO@48053000{
    Compatible ="ti、OMAP4-GPIO";
    reg =<0x48053000 0x200>;
    interrupts =<0x0 0x74 0x4>;
    ti、hwmods ="GPIO8";
    GPIO-controller;
    #GPIO-cells =<0x2>;
    interrupt-controller;
    #interrupt-cells =<0x2>;
    }
    
    串行@
    
    
    
    
    
    
    
    
    
    
    @4806a000{compatible ="ti、dra742-UART"、"ti、OMAP4-UART";reg =<0x4806a000 0x100>;interrupts-extended =<0x1 0x0 0x43 0x4c>;ti、hwmonds ="uart1";clock-frequency = 0x4802ti、
    "cc4;"0x480-t"= 0x480d";"0x480-d"= 0x4ctruart1";"0x480d"= 0x4ctrab"= 0x480d";"0x4d"= 0x4d"= 0x4d"
    
    中断=<0x0 0x44 0x4>;
    ti、hwmods ="uart2";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    DMA =<0x8d 0x33 0x8d 0x34>;
    dma-names ="TX"、"Rx";
    }
    
    串行@480ti{
    ="cti、0x20000"
    
    
    
    
    ;UART = 0x4carts = 0x4c00;<0x4carts = 0x4c00;UART = 0x4c00、0x4carts = 0x4c00;<0x4carts = 0x4c00;UART = 0x4cartc00;UART = 0x4c00、0x4cartc00;u.u.uartc4 = 0x4carts = 0x
    DMA =<0x8d 0x35 0x8d 0x36>;
    dma-names ="TX"、"Rx";
    中断扩展=<0x1 0x0 0x45 0x4 0x8e 0x3f8>;
    };
    
    串行@4806e000{
    compatible ="ti、dra742-UART"、"ti、"omag4-ti";
    reg = 0x4e000= 0x4804e000>
    
    
    ;<0x4dx = 0x4d4d";0x4dx 4d" 0x4d";0x4d4d"= 0x4d"
    
    
    dma-names ="TX"、"Rx";
    }
    
    串行@
    
    
    
    
    
    
    
    
    
    
    @48066000{compatible ="ti、dra742-UART"、"ti、OMAP4-UART";reg =<0x48066000 0x100>;interrupts =<0x0 0x64 0x4>;ti、480hwmods ="uart5";clock-frequency =<0x2dc64x>;"0x364c"=
    0x40";"dma-r"= 0x40";"dma-truart"= 0x40";"ctr = 0x40";"ctr = 0x40";"ctr = 0x40";"cc4 μ s = 0x40";"d"
    
    中断=<0x0 0x65 0x4>;
    ti、hwmods ="uart6";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    DMA =<0x8d 0x4f 0x8d 0x50>;
    dma-names ="TX"、"Rx";
    }
    
    ;串行@4820000{
    compatible ="cti、
    hw4d"
    
    
    
    ;UART = 0x4d4、"uarts = 0x4d4、"uart";time-controls = 0x4d4、"uart";UART = 0x4d4、uart"}
    
    
    串行@48422000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48422000 0x100>;
    interrupts =<0x0 0xdb 0x4>;
    ti、hwmods ="uart8";
    时钟频率=<0x2dc6c00>;
    status ="disabled";
    };
    
    串行@48424000{
    兼容="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x48424000 0x100>;
    中断=<0x0 0xdc 0x4>;
    ti、hwmds ="uart9";
    时钟频率=<0x2dc6c00>;
    状态="禁用";
    }
    
    串行@4ae2b000{
    compatible ="ti、dra742-UART"、"ti、OMAP4-UART";
    reg =<0x4ae2b000 0x100>;
    interrupts =<0x0 0xdd 0x4>;
    ti、hwmds ="uart10";
    时钟频率=<0x2dc6c00>;
    status ="disabled"}
    ;
    
    邮箱@4a0f4000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4a0f4000 0x200>;
    中断=<0x0 0x15 0x4 0x87 0x4 0x0 0x86 0x4>;
    ti、hwmds ="mailbox1";
    #mbox-cells =<0x1>;
    
    ti、mbox-mbox-users=<0xnum = 0x8-num;<0xnum = 0xnum = 0xnum = 0xnum
    状态="禁用";
    }
    
    ;邮箱@4883a000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4883a000 0x200>;
    中断=<0x0 0xED 0x4 0x0 0xee 0x4 0xef 0x4 0x0 0xf0 0x4>;
    ti、hwmds ="mailboti";
    #mbox
    = 0xnum、c = 0x4-users;<num = 0x4-cells;<0xnum = 0x4-*** = 0xnum = 0xc-***;<c盒子= 0x4-uss;<0xnum = 0xnum = 0x4-uss
    = 0xnum
    状态="禁用";
    }
    
    ;邮箱@4883c000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4883c000 0x200>;
    中断=<0x0 0xF1 0x4 0x0 0x0 0xf3 0x4 0x0 0xf4 0xf4 0x4>;
    ti、hwmds ="mailbox3";
    #mbox
    = 0xnum、<num = 0x4-users>;<0x4num = 0x4num = 0x4num;<c框<***-*** = 0xnum = 0x4<***-***;<***-***-***;
    <
    状态="禁用";
    }
    
    ;邮箱@4883e000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4883e000 0x200>;
    中断=<0x0 0xf5 0x4 0xf6 0x4 0xf7 0x4 0x0 0xf8 0x4>;
    ti,FIFmds =" mailboos";<hwc-box
    
    
    = 0xmnum = 0x4mnum;<mnum =0x4mcr = 0xmcr = 0xmcum-***-***;<mcr = 0x4mcr = 0x4mcr = 0xmcr;<mcr = 0xm
    状态="禁用";
    }
    
    ;邮箱@48840000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48840000 0x200>;
    中断=<0x0 0xf9 0x4 0xfa 0x4 0xfb 0x4 0x0 0xFC 0x4>;
    ti、FIFmds ="mailboti";
    #muti
    
    、hwc框= 0x4num;<mnum-***-*** = 0x4;<0xnum = 0x4num = 0x4mcum-***-c盒子= 0x4;<0x4num = 0x4mcum-***-***-***;<
    状态="确定";
    相位= 0x93>;
    
    mbox_ipc3x{
    ti、mbox-TX =<0x6 0x2 0x2>;
    ti、mbox-Rx =<0x4 0x2 0x2>;
    状态="确定";
    相位=<0x94>;
    };
    
    mbox_dsp1_ipcbox = 0x2
    
    ;<0x2;<0x2 = 0xmrx 2;
    
    }
    
    
    
    邮箱@48842000{
    Compatible ="ti、OMAP4-mailbox";
    reg =<0x48842000 0x200>;
    interrupts =<0x0 0xFD 0x4 0x0 0xFF 0x4 0x4 0x0 0x100 0x4>;
    ti、hwmds ="mailbox6";
    #mbox-cells =<0x1>;
    ti、mbox>
    = 0xnum = 0x4num;<mnum-users-users-num-users= 0x4num = 0xnum = 0x4num;<mbox-users-num-users-num-users-
    状态="确定";
    相位=<0x9b>;
    
    mbox_ipc3x{
    ti、mbox-TX =<0x6 0x2 0x2>;
    ti、mbox-Rx =<0x4 0x2 0x2>;
    状态="确定";
    相位=<0x9C>;
    };
    
    mbox_dsple = 0x2
    = 0x2;<0x2
    = 0x2;mbox
    = 0x2;<0x2 = 0x2;}
    
    
    
    
    邮箱@48844000{
    compatible ="ti、OMAP4-mailbox";
    reg =<0x48844000 0x200>;
    interrupts =<0x0 0x101 0x4 0x102 0x4 0x103 0x4 0x0 0x104 0x4>;
    ti、hwmds ="mailbox7";
    #mbox-cells =<0x1>;
    <mbox-users=0xnum
    、<0x4mc盒= 0xnum;<mnum-users-users-num-users=0x4mcum-num-users<0x4>;<mbox<mnum-users-
    状态="禁用";
    }
    
    ;邮箱@48846000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48846000 0x200>;
    中断=<0x0 0x105 0x4 0x106 0x4 0x107 0x4 0x0 0x108 0x4>;
    ti、hwmds ="FIFmailboti";
    #mbox-mos
    
    = 0xnum、0x4-cells;<0xnum = 0x4-***;<0xnum = 0x4-*** = 0xx8、mcums;<0x4-*** = 0xnum = 0x4-***;<0xnum = 0x4 <
    状态="禁用";
    }
    
    ;邮箱@4885e000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x4885e000 0x200>;
    中断= 0x0 0x109 0x4 0x10a 0x4 0x10b 0x4 0x0 0x10c 0x4>;
    ti、FIFmds ="mailbox9";<muti-box>
    = 0xmnum>;<0x4musers-box>;<0xmnum = 0x4mnum-c盒子= 0x4mcum-***;<0x4mnum-***-*** = 0x4<0x4<0x4mnum>
    
    
    状态="禁用";
    }
    
    ;邮箱@48860000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48860000 0x200>;
    中断= 0x0 0x10d 0x4 0x10e 0x4 0x10f 0x4 0x0 0x0 0x0 0x110 0x4>;
    ti、hwmds ="mailbox10";
    #mbox
    = 0x4num、users-cells;<0x4num = 0x4num = 0x4-***;<***-*** = 0x4num = 0x4-***;<***-***;<***-cbox = 0x4<***
    
    状态="禁用";
    }
    
    ;邮箱@48862000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48862000 0x200>;
    中断=<0x0 0x111 0x4 0x112 0x4 0x113 0x4 0x0 0x114 0x4>;
    ti、hwmds ="mailbox11";
    #mbox-cells = 0x4num
    ;<0x4num
    = 0x4num;<mbox-uss = 0x4num = 0x4num = 0x4num;<mcum-*** = 0x4num = 0x4num;<0x4num = 0x4n
    状态="禁用";
    }
    
    ;邮箱@48864000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48864000 0x200>;
    中断=<0x0 0x115 0x4 0x0 0x116 0x4 0x117 0x4 0x0 0x118 0x4>;
    ti、hwmds ="FIFmailbox12";
    #mbox-c盒子= 0x4mnum
    
    ;<0xnum = 0x4mcum-cells;<0xnum = 0x4mbox = 0x4muss;<num = 0x4mcum-***;<0x4mcum-*** = 0xnum = 0x
    状态="禁用";
    }
    
    ;邮箱@48802000{
    兼容="ti、OMAP4-mailbox";
    reg =<0x48802000 0x200>;
    中断= 0x0 0x17b 0x4 0x4 0x0 0x17d 0x4 0x0 0x17e 0x4>;
    ti、FIFmonds ="mailbox13";
    #muti
    
    、hwc框= 0x4num;<mnum-users-cells = 0x4<0x4<hc-***;<hums-box>;<hum-***-***-box>
    状态="禁用";
    }
    
    计时器@
    
    
    
    
    
    
    
    
    
    @4hw18000{compatible ="ti、omap5430-timer";reg =<0x4ae18000 0x80>;中断=<0x0 0x20 0x4>;ti、hwmods ="Timer1";ti、timer-alwon;时钟名称="fck ";计时
    器= 0x802";计时器= 0x48021;
    
    计时器= 0x48021;计时器= 0x4802 = 0x4MHz;计时
    器= 0x48021;计时器= 0x4802 = 0x4MHz;计时器= 0x4MHz;计时器= 0x48021;计时器= 0x4MHz
    时钟=<0x57 0x38 0x18>;
    时钟名称="fck";
    }
    
    ;计时器@
    
    
    
    
    
    
    
    
    
    @48034000{兼容="ti、omap5430-timer";reg =<0x48034000 0x80>;中断=<0x0 0x22 0x4>;ti、hwmds ="timer3";
    ti =<0x57 0x40 0x80>;timer
    = 0x36000= 0x36000";timer = 0x36000";timer = 0x36000";timer = 0x36000"
    中断=<0x0 0x23 0x4>;
    ti、hwmds ="timer4";
    时钟=<0x57 0x48 0x18>;
    时钟名称="fck";
    phandle =<0x9e>;
    }
    
    ;计时器@48820000{
    compatible ="ti、omap5430-timer";
    reg =<0x48820000 0x80>
    ;时
    
    
    钟= 0x4e>;"timerhinds
    
    = 0x24";0x4hwmycle= 0x24";"timershocks = 0x24";0x4>shocks = 0x0004 = 0x0004 = 0x0004;"timermycle"
    
    计时器@
    
    
    
    
    
    
    
    
    
    @48822000{compatible ="ti、omap5430-timer";reg =<0x48822000 0x80>;interrupts =<0x0 0x25 0x4>;ti、hwmods ="timer6";Clocks =<0x90 0x20 0x18>;clock-names ="fck ";phandle =<0xd6>
    
    
    
    ;timer = 0x4800"= 0x4800";timer = 0x4800"计时器= 0x4800";timer = 0x4800"计时器= 0x4800";timer = 0x4800"计时器= 0x4800";timer = 0x4800"计时器= 0x4800"= 0x4800";timer =
    时钟=<0x90 0x28 0x18>;
    时钟名称="fck";
    phandle =<0x97>;
    }
    
    ;计时器@
    
    
    
    
    
    
    
    
    
    @48826000{Compatible ="ti、omap5430-timer";reg =<0x48826000 0x80>;interrupts =<0x0 0x27 0x4>;
    ti、monds ="0x3e80";timer
    = 0x4808;clocks = 0x3e80>;clocks = 0x4808;clocks = 0x80>
    中断=<0x0 0x28 0x4>;
    ti、hwmds ="timer9";
    时钟=<0x57 0x50 0x18>;
    时钟名称="fck";
    phandle =<0x9f>;
    }
    
    ;计时器@48086000{
    compatible ="ti、omap5430-timer";
    reg =<0x48086000 = 0x57>
    
    
    
    
    
    ;时钟= 0x29>;"hwems"= 0x29>;"timerds = 0x29"
    
    计时器@
    
    
    
    
    
    
    
    
    
    @48088000{compatible ="ti、omap5430-timer";reg =<0x48088000 0x80>;interrupts =<0x0 0x2a 0x4>;ti、hwmds ="timer11";Clocks =<0x57 0x30 0x18>;clock-names ="fck";phandle =<0x95>;ti、hwmonds ="0x4500";timer
    =
    0x4btimer =
    0x000a;timer = 0x4a 计时器= 0x000a;timer;timer = 0x4a
    
    计时器= 0x000a 计时器= 0x80>
    
    时钟=<0x8F 0x28 0x18>;
    时钟名称="fck";
    }
    
    ;计时器@
    
    
    
    
    
    
    
    
    
    @48828000{兼容="ti、omap5430-timer";reg =<0x48828000 0x80>;中断=<0x0 0x153 0x4>;ti、hwmods ="timer13";
    ti =<0x570x487800";
    reg = 0x480008;timer = 0x480008;timer = 0x4830>
    中断=<0x0 0x154 0x4>;
    ti、hwmds ="timer14";
    时钟=<0x57 0xd0 0x18>;
    时钟名称="fck";
    phandle = 0x96>;
    }
    
    ;计时器@4882c000{
    compatible ="ti、omap5430-timer";
    reg =<0x48cle = 0x18>
    
    
    ;时
    钟= 0x82c00
    ;0x15586>;中断= 0x85"
    
    Timer@
    
    
    
    
    
    
    
    
    
    
    @4882e000{compatible ="ti、omap5430-timer";reg =<0x4882e000 0x80>;interrupts =<0x0 0x156 0x4>;ti、hwmods ="timer16";Clocks =<0x57 0x130 0x18>;clock-names ="faek";assigned ti = 0x57x4dT
    = 0x14000
    
    ;time-clocks = 0x4ds = 0x4ds = 0x4dT = 0x4nocks;time-cluss = 0x4ds = 0x4dT = 0x4nocks;time-nocks = 0x4ds = 0x4nocks = 0x14000>;times = 0x4
    TI、hwmods ="IPU_timer2";
    };
    
    spinlock@4a0f6000{
    compatible ="ti、OMAP4-hwspinlock";
    reg =<0x4a0f6000 0x1000>;
    ti、hwmods ="spinlock";
    #hwlock-cells =<0x1>;
    };
    
    dmm@
    
    
    
    
    
    
    @4e80000 = 0x5800m;reg = 0x4e0004、0x4mr = 0x0001mr;"dr = 0x5am"
    ;"dr = 0x0001m";"dr = 0x000";"dr = 0x5am";"dr = 0x000";"dr = 0x4mc";"0dr = 0x4mc";"0x000";"0x4mcr = 0x4m";"0x4m";"
    
    
    ti、hwmonds ="ipu1";
    iommus =<0x92>;
    ti、rproc-standby-info =<0x4a005520>;
    status ="确定";
    mbox = 0x93 0x94>;
    timers = 0x95 0x96>;
    watchdog-timers =<0x97 0x98>;
    memory-region =<0x99>;
    };
    
    ipc@55020000{
    compatible ="ti、dra7-ipus";
    reg = 0x55020000 0x10000>;
    reg-names ="l22";
    
    
    ipc = 0x009a;iommus = 0x4mus-standby;<us-rts = 0x49a;
    状态="正常";
    mbox =<0x9b 0x9C>;
    计时器=<0x9d>;
    看门狗计时器=<0x9e 0x9f>;
    存储器区域=<0xa0>;
    };
    
    DSP@40800000{
    兼容="ti、dra7-dsp";
    reg =<0x40800000 0x40e00000;
    "lpr1ms"
    ;"1lsprms";"rms" 0x8000、"1ms";"lspr1ms";"ldsp000"
    SYSCON-bootreg =<0x9 0x55c>;
    iommus =<0x1 0xa2>;
    ti、rproc-STANDBY-INFO =<0x4a005420>;
    状态="正常";
    mbox =<0x93 0xa3>;
    计时器=<0xa4>;
    安全装置计时器=<0xA5>;
    存储器区= 0xa6>;
    
    
    I2C@48070000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x48070000 0x100>;
    interrupts =<0x0 0x33 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c1";
    status ="确定";
    时钟频率=<0x61a80>;
    
    tps659038@58{
    兼容="ti、tps659038";
    reg =<0x58>;
    中断父级=<0xa7>;
    中断=<0x0 0x8>;
    #interrupt-cells =<0x2>;
    中断控制器;
    ti、系统电源控制器;
    ti、power-hold;power-mas 覆盖
    phandle =<0xa8>;
    
    tps659038_PMIC{
    compatible ="ti、tps659038-PMIC";
    
    稳压器{
    
    smps12}{
    regulator-name ="smps12";
    regulator-min-microvolt =<0xcf850>;
    regulator-max-microvolt =<0x1312d0>;
    regulator-d随时
    启动;regulator-max-on
    phandle =<0x6>;
    };
    
    smps3{
    reguler-name ="smps3";
    reguler-min-microvolt =<0x149970>;
    reguler-max-microvolt =<0x149970>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xe2>;
    };
    
    smps45{
    reguler-name ="smps45";
    reguler-min-microvolt =<0xcf850>;
    reguler-max-microvolt =<0x1312d0>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    smps6{
    reguler-name ="smps6";
    reguler-min-microvolt =<0xcf850>;
    reguler-max-microvolt =<0x118c30>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    smps8{
    reguler-name ="smps8";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    ldo1{
    reguler-name ="ldo1";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-boot-on;
    reguler-always-on;
    phandle =<bb1>;
    };
    
    ldo2{
    reguler-name ="ldo2";
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    ldo3{
    reguler-name ="ldo3";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    };
    
    ldo4{
    reguler-name ="ldo4";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xcd>;
    };
    
    ldo9{
    reguler-name ="ldo9";
    reguler-min-microvolt =<0x100590>;
    reguler-max-microvolt =<0x100590>;
    reguler-always-on;
    reguler-boot-on;
    };
    
    ldoln{
    reguler-name ="ldoln";
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    reguler-always 开启;
    reguler-boot-on;
    phandle =<0xcc>;
    };
    
    ldousb{
    reguler-name ="ldousb";
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-boot-on;
    phandle =<0xbb>;
    };
    
    regen1{
    reguler-name ="regen1";
    reguler-boot-on;
    reguler-always-on;
    phandle =<0xE1>;
    };
    };
    };
    
    tps659038_RTC{
    Compatible ="ti、Palms-rtc";
    interrupt-parent =<0xa8>;
    interrupts =<0x8 0x2>;
    wake-source;
    };
    
    tps659038_pwr_Button{
    compatible ="ti、Palms-pwrbutton";
    interrupts-parent =<0xa8>
    
    
    
    
    
    
    
    
    ;<pwell-seconds=0x6524>;<pgpio rupts=0x6524>;<pips-ble>;<pover-seconds=<gpov<potrupts
    
    ;<pips=0x6524>;<gpips-ble>;<pips-ble>;<pip-rupts = 0x6524th-rupts;<p
    
    tps659038_usb{
    compatible ="ti、Palms-usb-vid";
    ti、enable-vBus 检测;
    vbus-gpio =<0xa9 0x15 0x0>;
    phandle =<0xc1>;
    }
    ;
    
    tmp102@
    
    
    
    
    
    
    
    
    @48{compatible ="ti、tmp102";
    
    ti =<0x48>;phirt=<0x320a1.4>;<vicle= 0x320a1.4>;<vicle= 0x3a104>;<vicle>热中断= 0x3a104<vicle>;<icle= 0x3a104<vicle>
    
    分配的时钟=<0x4e>;
    分配的时钟父级=<0x6d>;
    状态="正常";
    ADC-SETTLE-ms =<0x28>;
    AVDD 电源=<0xAB>;
    IOVDD 电源=<0xAB>;
    DRVDD 电源=<0xAB>;
    DVDD-SUPPLY =<0xac>;
    phandle =<0xe9>;
    };
    
    EEPROM@50{
    Compatible ="Atmel、24c32";
    reg =<0x50>;
    };
    };
    
    iwf@48072000{
    compatible ="ti、OM2c-ic4";
    reg =<0x48072000 0x100>;
    interrupts =<0x2mc"
    
    
    
    ;<0x34>= 0x4mcCell = 0x4mc";<0x4mc4 = 0x3c";<c4 = 0xcems"大小<0xc4;ic4 = 0xc4;<cemc4 = 0xcems"
    };
    
    i2c@48060000{
    compatible ="ti、omag4-i2c";
    reg =<0x48060000 0x100>;
    interrupts =<0x0 0x38 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c3";
    status ="确定";
    时钟频率=<0x61a80>;
    
    RTC@6F{
    兼容="微芯片、mcp7941x";
    reg =<0x6f>;
    中断扩展=<0x1 0x0 0x2 0x1 0x8e 0x424>;
    中断名称="IRQ"、"WAKEUP";
    VCC-SUPPLY =<0xab>;
    唤醒源;
    };
    };
    
    i2c@4807a000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x4807a000 0x100>;
    interrupts =<0x0 0x39 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c4";
    status ="disabled";
    };
    
    i2c@4807c000{
    compatible ="ti、OMAP4-i2c";
    reg =<0x4807c000 0x100>;
    interrupts =<0x0 0x37 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="i2c5";
    status ="disabled";
    };
    
    MMC@4809c000{
    compatible ="ti、dra7-sdhci";
    reg =<0x4809c000 0x400>;
    interrupts =<0x0 0x4e 0x4>;
    ti、hwmods ="mmc1";
    status ="确定";
    pbias 电源=<0xAD>;
    最大频率=<0xb1b000>;
    MMC-DDR-1_8v;
    MMC-DDR-3_3V;
    pinctrl-names ="默认值"、"hs";
    pinctrl-0 =<0xae>;
    总线宽度=<0x4>;
    CD-GPIO =<0xaf 0x1b 0x1>;
    pinctrl-1 =<b0>;
    VMMC-supply =<b1>;
    NO-1-8-v;
    };
    
    1W@480b2000{
    compatible ="ti、OMAP3-1W";
    reg =<0x480b2000 0x1000>;
    interrupts =<0x0 0x35 0x4>;
    ti、hwmods ="hdq1w";
    };
    
    MMC@480b4000{
    compatible ="ti、b7-sdhci";
    reg =<0x480b4000 = 0x3mctrab-mcus/mctrabs-0x000>
    ;
    
    0x3mcr = 0x3mcr
    
    = 0x3mcr = 0x3mctrabs-mcus/mcr = 0x0001mcr;0x000-2mcr = 0x3mcr;0x3mcr = 0x3mcr = 0x3mcr = 0x000-2mcr;0x3mcr = 0x3mcr = 0xdmmcr;
    
    
    
    pinctrl-names ="default";
    pinctrl-0 =<bb2>;
    VMMC-supply =<0xab>;
    vqmmc-supply =<0xab>;
    总线宽度=<0x8>;
    不可拆卸;
    no-1-8-v;
    };
    
    MMC@
    
    
    
    
    
    
    
    
    
    @480ad000{compatible ="ti、dra7-sdhci";reg =<0x480ad000 0x400>;interrupts =<0x0 0x59 0x4>;ti、hwmods ="mmc3";status ="disabled";max-frequency =<0x480dci
    =<0x1000 0x400dmmc = 0x400"
    
    ;smcr = 0x400ddhcr = 0x400";s_dmcr = 0x400dcr = 0x400mcr = 0x400dcr = 0x400dcr = 0x400dcr;s_dmcr = 0x400dcr = 0x400mcr = 0x400dcr;<0x400dcr = 0x400dcr = 0x400dcr =
    
    0x
    max-frequency =<bbbbb71b000>;
    sdhci-caps-mask =<0x0 0x400000>;
    };
    
    MMU@
    
    
    
    
    
    
    
    
    
    @40d01000{compatible ="ti、dra7-dsp-iommu";reg =<0x40d01000 0x100>;interrupts =<0x40dmu1;<0x40mu1 mu1;<mu0x0xmu1 mu1;<mu1 mu1 mu1}<mu1 mu1;<0x40mu1 mu1 mu1;<0x2000>
    
    
    
    TI、hwmuds ="mu1_dsp1";
    #iommu-cells =<0x0>;
    ti、SYSCON-mumconfig =<bbb3 0x1>;
    phandle =<0xa2>;
    };
    
    mu@58882000{
    compatible ="ti、dra7-iommu";
    reg =<0x58802mu>
    
    
    ;<mu-iphus= 0x100>;<ipumb = 0x100>;<ipumb = 0x100>;<ipum-its = 0x100>
    
    
    };
    
    MMU@55082000{
    compatible ="ti、dra7-iommu";
    reg =<0x55082000 0x100>;
    interrupts =<0x0 0x18c 0x4>;
    ti、hwmids ="MMU_ipu2";
    #iommu-cells =<0x0>;
    ti、iommu-bus-le-back
    = 0x9a;anderr;
    };
    
    pruss-SoC-bus@4b226004{
    兼容="ti、am5728-pruss-SoC-bus";
    reg =<0x4b226004 0x4>;
    ti、hwmds ="pruss1";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="确定";
    
    pruss@4b200000{
    兼容="ti、am5728-pruss";
    reg =<0x4B200000 0x80000>;
    中断=<0x0 0xba 0x4 0xbb 0x4 0xb0 0x4 0xbd 0x4 0x4 0x0 0x0 0x4 0x0 0x4 0x0 hostf 0x4 0x4 0x4 0xc4 0xc4 0x4 0xc4 0x4 0x4 0xc4 0x4 0xc4 0x4 0xc4 0x4、"0x4 0x4 0xc1"
    、"0x4 0x4 0x4 0x4 0xc"、"0x4 0x4 0x4 0x4 0xc" "host6"、"host7"、"host8"、"host9";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="正常";
    
    存储器@4b200000{
    reg =<0x4b200000 0x2000 0x4b202000 0x2000 0x2000 0x4b210000 0x8000 0x4b22e000 0x31c 0x4b230000 0x60>;
    reg -names ="dram0"、"dram1"、"shram1"、"shrep"、"shrep"、"IE2"、"shram2" "ECAP";
    };
    
    cfg@4b226000{
    compatible ="SYSCON";
    reg =<0x4b226000 0x2000>;
    };
    
    MII-RT@4b232000{
    compatible ="SYSCON";
    reg =<0x4b232000 0x58>;
    };
    
    interrupt-controller@4b220000{
    compatible ="0x5760"
    
    
    
    
    ;<cell-cells = 0x4b2b2b2b2b>;<cells = 0x4b2b2b2b2b<cells = 0x2000>;}
    
    PRU@4b234000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b234000 0x3000 0x4b222000 0x400 0x4b222400 0x100>;
    reg 名称="IRAM"、"控制"、"调试";
    固件名称="am57xx-pru1_0-FW";
    interrupt-parent =<bbx4>;
    interrupts =<0x10 0x11>;
    interrupt-names ="vring "、"kind";
    }
    
    ;PRU@4b238000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b238000 0x3000 0x4b224000 0x400 0x4b224400 0x100>;
    reg-debug"
    、"pr-names";"pr-control-names"、"pr-rmware"
    interrupt-parent =<bbx4>;
    interrupts =<0x12 0x13>;
    interrupt-names ="vring "、"kind";
    };
    
    MDIO@4b232400{
    compatible ="ti、Davinci_MDIO";
    reg =<0x4b232400 0x90>;
    #address-cells =<0x1>;
    #size-cells =<0x0>
    
    ;<cock-names =<focks =<0x5>;
    bus_freq =<0xf4240>;
    状态="禁用";
    };
    };
    };
    
    pruss-SoC-bus@4b2a6004{
    兼容="ti、am5728-pruss-so-bus";
    reg =<0x4b2a6004 0x4>;
    ti、hwmds ="pruss2";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="确定";
    
    PRUSS@4b280000{
    兼容="ti、am5728-pruss";
    reg =<0x4b280000 0x80000>;
    中断=<0x0 0xc4 0x0 0xc5 0x4 0x0 0xc6 0x4 0x0 0xc7 0x4 0x4 0xc8 0x4 0x4 0xc4 0xc4 0xc5 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4、
    "hostnames = 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0xc4 0x "host6"、"host7"、"host8"、"host9";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    范围;
    状态="正常";
    
    存储器@4b280000{
    reg =<0x4b280000 0x2000 0x4b282000 0x2000 0x2000 0x4b290000 0x8000 0x4b20000x31c 0x4b2b0000 0x60>;
    reg 名称="shram0"、"shram1"、"shram1"、"shrame2"、"IEP"、"shram2" "ECAP";
    };
    
    cfg@4b2a6000{
    compatible ="SYSCON";
    reg =<0x4b2a6000 0x2000>;
    };
    
    MII-RT@4b2b2000{
    compatible ="SYSCON";
    reg =<0x4b2b2000 0x58>;
    }
    
    ;interrupt-controller@4b2a0000 =
    0x57ble>
    
    
    ;interrupt-cells = 0x4b2b2bt;<cells
    
    = 0xb2b2b0xb2b0sb0sb0sb0xb<cells;<cells;<cell-cells = 0xb2b2b0xb2b
    
    PRU@4b2b4000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b2b4000 0x3000 0x4b2a2000 0x400 0x4b2a2400 0x100>;
    reg-names ="IRAM"、"control"、"debug";
    firmware-name ="am57xx-pru2_0-fw";
    interrupt-parent =<bb6>;
    interrupts =<0x10 0x11>;
    interrupt-names ="vring"、"kind";
    };
    
    PRU@4b2b8000{
    compatible ="ti、am5728-PRU";
    reg =<0x4b2b8000 0x3000 0x4b2a4000 0x400 0x4b2a0x4400 0x100>
    
    ;"debug-names"、"am571";"pr-control-names"、"pr-ry"
    interrupt-parent =<bbb6>;
    interrupts =<0x12 0x13>;
    interrupt-names ="vring "、"kind";
    };
    
    MDIO@4b2b2400{
    compatible ="ti、DaVinci_mdio";
    reg =<0x4b2b2400 0x90>;
    #address-cells =<0x1>;
    #size-cells =<0xb0>
    ;
    clocks =<bcocks =<buck>;
    bus_freq =<0xf4240>;
    状态="禁用";
    };
    };
    };
    
    电脑控制器- ABB - MPU{
    compatible ="ti、ABB - v3";
    电脑控制器名称="ABB_MPU";
    #address-cells =<0x0>;
    #size-cells =<0x0>;
    Clocks =<0x11>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07ddc 0x4 0x4ae07de0 0x4 0x4ae06014 0x4 0x4a003b20 0xc 0x4ae0c158 0x4>;
    reg-names ="setup-address"、"control-address"、"efint-address"、"use"、"efint "LDO-address";
    ti、traxdo-status-mask =<0x80>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x102ca0 0x0 0x0 0x0 0x2000000 0x1f00000 0x11bs-mask = 0x000>
    
    
    
    
    
    
    
    ;0x0000-0x0x0x0x0x1000-1 0x000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x1000-1 bv3-0x000+ 0x0000_bv3-0x000+ 0x0000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0>
    时钟=<0x11>;
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07e34 0x4 0x4ae07e24 0x4 0x4ae06010 0x4 0x4a0025cc 0xc 0x4a002470 0x4>;
    reg-names ="setup-address"、"control-address"、"efine-address"、"use-address"、"efint-address" "LDO-address";
    ti、traxdo-status-mask =<0x40000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10ABB 0x0 0x0 0x0 0x0 0x2000000 0x1f00000 0x1d00
    
    
    ;<0x0000-0x0x0x0x1d0;d1 0x0000-0x0>
    兼容
    
    
    的单位0x0000-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0>;d1个单位0xd1个单位0x0000-0x0x0x0x0x0x0x0x0~0x
    
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07e30 0x4 0x4ae07e20 0x4 0x4ae06010 0x4 0x4a0025e0 0xc 0x4a00246c 0x4>;
    reg-names ="setup-address"、"control-address"、"efine"、"int-address" "LDO-address";
    ti、traxdo-status-mask =<0x20000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10ABB 0x0 0x0 0x0 0x0 0x2000000 0x1f00000 0x1cv3-0x000<0x000>
    
    
    
    
    
    
    ;<GPUb-0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0>;0x1000-1 0x0000_000<GPUb-0x0x0x0x0x0x0 = 0x0000_000<0x0000_000<1 0x000>
    
    TI、稳定时间=<0x32>;
    ti、时钟周期=<0x10>;
    reg =<0x4ae07de4 0x4 0x4ae07de8 0x4 0x4ae06010 0x4 0x4a003b08 0xc 0x4ae0c154 0x4>;
    reg-names ="setup-address"、"control-address"、"efint-address"、"efint 使用" "LDO-address";
    ti、tranxdo-status-mask =<0x10000000>;
    ti、ldovbb-overrid-mask =<0x400>;
    ti、ldovbb-Vset-mask =<0x1f>;
    ti、abb_info =<0x10a1d0 0x0 0x0 0x2000000 0x0001f00000
    
    
    @
    
    ;0x270004
    0x0004 0x0004 0x0001mc4;0x804c4 0x0001mc4 0x0001mc4 0x0001c4 0x804;0x804c4 0x0001c4 0x804 0x000-0x381c4 0x000> 0x0001c4 0x0001m4 0x0001m4 0x0001c4 0x0001c4 0x0001c4;0x0001c4 0x0001c4 0x000-0x804
    
    #size-cells =<0x0>;
    ti、hwmds ="mcspi1";
    ti、spi-num-cs =<0x4>;
    DMA =<0x8d 0x23 0x8d 0x24 0x8d 0x25 0x8d 0x26 0x8d 0x27 0x8d 0x28 0x8d 0x29 0x8d 0x2a>;
    DMA 名称="tx0"、"rx0"、"tx1"、"rx1"、"rx1"、 "tx2"、"rx2"、"TX3"、"rx3";
    status ="disabled";
    };
    
    SPI@4809a000{
    兼容="ti、omap4-mcspi";
    reg =<0x4809a000 0x200>;
    中断=<0x0 0x3D 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="mcspid2";
    ti、spi-cnum = 0x2>;
    DMA =<0x8d 0x2b 0x8d 0x2C 0x8d 0x2D 0x8d 0x2e>;
    dma-names ="tx0"、"rx0"、"tx1"、"rx1";
    状态="禁用";
    }
    
    ;SPI@480b8000{
    兼容="ti、OMAP4-mcspi";
    reg =<0x480b8000 0x200>;
    中断=<0x0 0x56 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、spimds ="mc3";
    <SPI-num = 0x2>;
    DMA =<0x8d 0xF 0x8d 0x10>;
    DMA-名称="tx0"、"rx0";
    状态="禁用";
    };
    
    SPI@480ba000{
    compatible ="ti、OMAP4-mcspi";
    reg =<0x480ba000 0x200>;
    interrupts =<0x0 0x2b 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="mcspi4";
    ti、SPI-num-cs = 0x1>;
    DMA =<0x8d 0x46 0x8d 0x47>;
    dma-names ="tx0"、"rx0";
    status ="禁用";
    };
    
    QSPI@4b300000{
    compatible ="ti、dra7xxx-QSPI";
    reg =<0x4b300000 0x100 0x5c000000 0x4000000>;
    reg 名称="QSPI_base"、"QSPI_mMAP";
    SYSCON-chipsSELECs=<0x9 0x157>;
    #address-cells =<0x1>;<0x138<hocks
    
    
    
    = 0x57>
    
    
    ;<cocks = 0x138<x0>= 0x4hms = 0x138<cocks = 0x4>;<x4nocks = 0x4nocks = 0x138-s
    = 0x4nocks;<xnocks = 0x138nocks = 0x4nocks = 0x4nocks = 0x138
    
    ocp2scp@4a090000{
    compatible ="ti、OMAP-ocp2scp";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ranges;
    reg =<0x4a090000 0x20>;
    ti、hwmonds ="ocp2scp3";
    
    phy@4a096000 = 0x4a80"
    
    
    ;rev = 0x4aQ1sby-cr = 0x4a960080;0x4py
    = 0x4aQ4py = 0x4a80>
    
    时钟名称="SYSCLK"、"REFCLK";
    SYSCON-PLRESET =<0x9 0x3fc>;
    #phy-cells =<0x0>;
    phandle =<0xb9>;
    };
    
    pciephy@4a094000{
    compatible ="ti、phy-pipe3-pce";
    reg = 0x4000-iphy
    = 0x85>
    ;SYSCON-0x4000-by-cPhy = 0x85>;SYSCON_994cy = 0x4000-cy = 0x85>
    
    时钟=<0x3E 0x3f 0xb7 0x90 0x8 0xb7 0x90 0x9 0xb7 0x90 0xA 0xb8 0x11>;
    时钟名称="DPLL_ref"、"DPLL_ref_m2"、"wkupclk"、"REFCLK"、 "div-clk"、"phy-div"、"SYSCLK";
    #phy-cells =<0x0>;
    phandle =<0x84>;
    };
    
    pciephy@4a095000{
    compatible ="ti,phy-pipe3-pce";
    reg =<0x4a095000 0x80 0x4a095400 0x64>;
    reg 名称="phy_Rx"、"bphy_TX";
    SYSCON-phy-power =<0x85 0x20>;
    SYSCON-0x8_0x8_b1bl = 0x78"
    、0x8bl 0x7_clkb 0x7_clkb;"0x8_clr" 0x8_clr" 0x8_clk" 0x8_clk"、0x8_clk" 0x8_clk"
    "div-clk"、"phy-div"、"SYSCLK";
    #phy-cells =<0x0>;
    状态="禁用";
    phandle =<0x89>;
    };
    
    
    SATA@4a141100{
    兼容="SNPS,DWC-AHCI";
    reg =<0x4a140000 0x1100 0x4a141100 0x7>;
    中断=<0x0 0x31 0x4>;
    phys =<bbb9>;
    phy-names ="SATA-ti";
    
    
    
    status = 0x68;sategy = 0x7;phy-ports = 0xb0Xb>;phy = 0xb0b;phy = 0x68;phy-ports = 0xbnh
    ;phy = 0x68;phy-ports = 0xbnh;phy = 0xbn
    
    RTC@48838000{
    compatible ="ti、am3352-rtc";
    reg =<0x48838000 0x100>;
    interrupts =<0x0 0xd9 0x4 0x0 0xd9 0x4>;
    ti、hwmds ="rtcs";
    Clocks =<0x50>;
    };
    
    ocp2scp@
    
    
    
    
    
    
    
    @4a080000 =<v1uamps
    ;"v1uamps ="uamps;"ip-cells = 0x4pb2、ips";"082pr";"v"= 0x4pb2、ip-cells = 0x4b2、"v";"am"= 0xb2、ip-cells = 0x4pb2、"ues";"am"= 0x4pb2、ip-cells = 0xb2、"u";"v"= 0x4b2
    reg =<0x4a084000 0x400>;
    SYSCON-phy-power =<0x9 0x300>;
    时钟=<0xba 0xd0 0x8>;
    时钟名称="wkupclk"、"REFCLK";
    #phy-cells =<0x0>;
    phy-supply =<0xbb>;
    phandle =<bbbbv>;
    };
    
    phy@4a085000{
    compatible ="ti、dra7x-USB2-phy2"、"ti、OMAP-USB2";
    reg =<0x4a085000 0x400>;
    SYSCON-phy-power =<0x9 0xb2-phy74>;
    clock =<clc 7 0x20 0x20 0xb>
    
    ;<by-supply = 0xby-cy<cy<cy<cy<cy<cy<bxbxb<bxb<b<b<b<b<bv<b<b<b<b<bv<b<
    
    phandle =<0xC2>;
    };
    
    phy@4a084400{
    compatible ="ti、OMAP-USB3";
    reg =<0x4a084400 0x80 0x4a084800 0x64 0x4a084c00 0x40>;
    reg-names ="Rx_phy"、"phy_TX"、"PLL_ctrl";SYSCON=0x7nb-0xrk>
    、0xby-cocks
    
    
    = 0xby-clbd = 0xx0xrk>、0xby-cocks = 0xby";0xby-cocks = 0xby-clk#xrs = 0xby-clbd;0xxrk-0xrk-0x0xrbd = 0xbd = 0xb
    phandle =<0xc0>;
    };
    }
    
    ;目标模块@4a0dd000{
    compatible ="ti、sysc-omap4-SR"、"ti、sysc";
    ti、hwmods ="SmartReflex_core";
    reg =<0x4a0dd038 0x4>;
    reg-names ="sysc";
    <0x4a0x1>
    
    
    
    = 0x0000>;0x0000=0x0000<sysmask
    
    = 0x000<0x0000>;0x0000.0x3<0x0000>
    
    
    目标模块@
    
    
    
    
    
    
    
    
    
    
    
    
    
    @4a0d9000{compatible ="ti、sysc-omap4-SR"、"ti、sysc";ti、hwmonds ="SmartReflex_MPU";reg =<0x4a0d9038 0x4>;reg-names ="sysc";ti、dwc-mask =<0x4000000>;reg = 0x48000-1;syscclocks = 0x481<0x0001>;syscclocks = 0x481<0x3>
    
    TI、hwmods ="USB_OTG_SS1";
    reg =<0x48880000 0x10000>;
    中断=<0x0 0x48 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    utmi-mode =<0x2>;
    范围;
    
    USB@48890000{
    compatible ="SNP、dwc3";
    reg =<0x48890000 0x17000>;
    interrupts =<0x0 0x47 0x4 0x47 0x4 0x0 0x48 0x4>;
    interrupt-names ="peripheral"、"host"、"OTG";
    phy =<phy f 0xc0>;
    ddr-names ="USB2"
    、"super-speed"、"USB2"、"super-mode"="phy-b3";b3"
    
    SNP、ds_u3_suspuhy_quirik;
    SNP、ds_u2_suspuhy_quik;
    };
    
    
    OMAP-dwc3_2@488c0000{
    兼容="ti、dwc3";
    ti、hwmds ="USB_OTG_SS2";
    reg =<0x488c00000x10000>;
    <0x57
    
    = 0x1;<out1 = 0x57单元格;<out1 = 0x1;<out1 = 0x1;<out1;<out1;<out1 = 0x1;<out1;<out1;<out1 = 0x1;<out1;<out1;<out1;<out1
    
    
    extcon =<0xc1>;
    
    USB@488d0000{
    兼容="SNPs、dwc3";
    reg =<0x488d0000 0x17000>;
    中断=<0x0 0x49 0x4 0x49 0x4 0x0 0x57 0x4>;
    中断名称="外设"、"主机"、"OTG";
    PHY = 0xC2>;
    PHY-names ="USB2-phy";
    最大速度="高速";
    dr_mode ="外设";
    SNP、ds_u3_suspuhy_quirik;
    SNP、ds_u2_suspuhy_quirik;
    SNP、dis_metastability _quirk;
    }
    ;
    
    OMAP-dwc3_3@48900000{
    兼容="ti、dwc3";
    ti、hwmds ="USB_OTG_SS3";
    reg = 0x48900000 0x10000>;
    中断= 0x0 0x158 0x4>;
    #address-cells =<0x1
    
    ;<utmi-cells = 0x1;<out1 =<utmi-cells = 0x1;<utmikes = 0x1;#-modes =<utmi-cells
    =<0x1;<out
    状态="禁用";
    
    USB@48910000{
    兼容="SNP、dwc3";
    reg =<0x48910000 0x17000>;
    中断=<0x0 0x58 0x4 0x58 0x4 0x4 0x0 0x158 0x4>;
    中断名称="外设"、"主机"、"OTG";
    最大速度="高速";
    DR_MODE ="OTG";
    SNP、ds_u3_suspuhy_quirk;
    SNP、ds_u2_suspuhy_quirk;
    };
    };
    
    Elm@48078000{
    compatible ="ti、am3352-elm";
    reg =<0x48078000 0xfc0>;
    interrupts =<0x0 0x1 0x4>;
    ti、hwmds ="elm";
    status ="disabled";
    };
    
    GPMC@50000000{
    compatible ="ti、am3352-gpMC";<0xmcc
    
    = 0x400c = 0x000>
    ;<0x300mcc = 0x400c = 0x400c =
    
    0x400c;<0xmcr = 0xmcr = 0x400c = 0x400c = 0x000>
    
    GPMC、num-waitpins =<0x2>;
    #address-cells =<0x2>;
    #size-cells =<0x1>;
    中断控制器;
    #interrupt-cells =<0x2>;
    GPIO-controller;
    #GPIO-cells =<0x2>;
    status ="禁用";
    };
    
    ATL@
    
    
    
    
    
    
    
    
    
    @4843c000{compatible ="ti、dra7-atl";reg =<0x4843c000 0x3ff>;ti、hwmods ="atl";ti、provided 时钟=<0xc4 0xc5 0xc6 0xc7>;clocks =<0x10 0x0 0x8001ti>;clock-ams
    ="0x46000";cr = 0x46000" Mcd"= 0x48000";clock-am"= 0x46000" Mcd"
    
    
    reg-names ="MPU"、"dat";
    中断=<0x0 0x68 0x4 0x0 0x67 0x4>;
    中断名称="TX"、"RX";
    DMA =<0xc3 0x81 0x1 0xc3 0x80 0x1>;
    dma-names ="TX"、"RX";
    cl1c =<0x90 0x10 0xkr
    
    = 0x90"、"clks";clkr = 0x90"0x10"0x90";clk"
    };
    
    McASP@48464000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp2";
    reg =<0x48464000 0x2000 0x45c00000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x95 0x4 0x94 0x94 0x0000x000>
    ;"0xcrx
    
    1 = 0x3";"ta-rx 1 = 0xts";"0xta-rx 1 = 0xt";"0xcrx 1 = 0xt";"0xcrx 1 = 0xt";"0xcrx 2 = 0xt";"0xta-r
    时钟=<0x57 0x160 0x16 0x57 0x160 0x18 0x57 0x160 0x1c>;
    时钟名称="fck"、"ahclkx"、"ahclkr";
    状态="禁用";
    };
    
    McASP@48468000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp3";
    reg =<0x48468000 0x2000 0x46000000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x97 0x4 0x96 0x4>;
    "0x85mA-RX"=
    0x85"
    ;"0xctransc";"rx 名称= 0xctrans"= 0xctrans"、"0xctrans";"0xctrans"= 0xctrans";"0xctransc-rx 1 = 0x85";"rx
    时钟=<0x57 0x168 0x16 0x57 0x168 0x18>;
    时钟名称="fck"、"ahclkx";
    状态="正常";
    #sound-di-cells =<0x0>;
    分配时钟= 0x57 0x168 0x18>;
    分配时钟父节点= 0x60>;
    运算模式=<0x0>;
    tdm-slots =<0x2>;
    serial-dir =<0x1 0x2 0x0>;
    TX-num-evt =<0x20>;
    Rx-num-evt =<0x20>;
    <0x8
    };eandle = 0x8;
    
    McASP@4846c000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp4";
    reg =<0x4846c000 0x2000 0x48436000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x99 0x4 0x98 0x98 0x4> 0x87
    
    
    ;0x170x17x 1 = 0x17x
    1;"0xDAM" 0x17" 0x17x 0x17";"0x17x RX-Rx1" 0x17";"0x17" 0x17x 0x17" 0x17"= 0x17x 0x17" 0x17";"0x17" 0x17x 0x17" 0x17" 0x17" 0x17x 0x17x 0x17
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@48470000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp5";
    reg =<0x48470000 0x2000 0x4843a000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9b 0x0 0x9a 0x4 0x9a 0x4>;
    0x57x
    
    0x18x = 0x178178a 0x178;0x178 0x3RX = 0x178 0x27x
    1;"rx r" 0x178-r" 0x17x 1、"rx 1、"rx 名称0x17x"
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@48474000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp6";
    reg =<0x48474000 0x2000 0x4844c000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9d 0x4 0x9C 0x4 0x57 0x4c 0x18>
    ;0x4c
    
    
    = 0x18x 0x4b = 0x4r 0x18";0x4r 0x4c = 0x18x 1 0x4r 0x4r 0x4r = 0x4r = 0x4r 0x4b;0x4r = 0x4r 0x4r 0x4r = 0x4r 0x4r = 0x4r 0x4r = 0x4r 0x4r = 0x
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@48478000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp7";
    reg =<0x48478000 0x2000 0x48450000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x9f 0x4 0x9e 0x4>;reg =
    
    
    
    0x8208 = 0x18";0x3TX = 0xcr = 0x5rx 1;0xcr = 0x3c = 0x5rx 1、0x5rx 1、0x5rx 1;0xcr = 0x5rx 1、0x5rx 1、0xcr = 0x5rx 1、0x5rx 1、0xcr = 0x5r = 0x5r
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    McASP@4847c000{
    compatible ="ti、dra7-McASP-audio";
    ti、hwmods ="mcasp8";
    reg = 0x4847c000 0x2000 0x48454000 0x1000>;
    reg-names ="MPU"、"dat";
    interrupts =<0x0 0x1 0x4 0xa0 0xa0 0x4 0x4> 0x57
    
    
    ;0x3TX = 0x517"
    ;"0x5rx 1" 0x5rx 1 0x3";"0x5rx 1" 0x3" 0xc" 0x5rx 1 0x5r";"0x5rx 1rx 1 0x17";"0x1rx 1rx 1 0x3" 0xta-rx 1 0x17" 0x5rx 1
    时钟名称="Fck、"ahclkx";
    状态="禁用";
    };
    
    crossbar@4a002a48{
    compatible ="ti、irq-crossbar";
    reg =<0x4a002a48 0x130>;
    中断控制器;
    interrupt-parent =<0x8>;
    #interrupt-cells =<0x3>;
    ti、max-IRQ =<0xa0>;
    TI、max-crossbar-sources=<0x190>;
    ti、reg-size =<0x2>;
    ti、IRQs-reserved =<0x0 0x1 0x2 0x3 0x5 0x6 0x83 0x84>;
    ti、IRbs-skip =<0xA 0x85 0x8b 0x8c>;
    ti、IRQs-safe-map =<0x48b"
    
    
    
    @
    
    ;"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";"cts = 0x48b";"cts = 0x48b"、"cts = 0x48b";cs"、"cts = 0x48b"
    ;"cs"、"cts = 0x48b";"cs"、"cs"、"cs"、"cts = 0x48bs";"c
    
    cpdma_channels =<0x8>;
    ale_entries =<0x400>;
    bd_ram_size =<0x2000>;
    mac_control =<0x20>;
    从设备=<0x2>;
    ACTIVE_SLAVE =<0x0>;
    CPT_clock_mult =<0x784cfe14>;
    CPTs_clock_shift =<0x1d>;
    reg =<0x48484000 0x1000 0x48485200 0x2e00>;
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    ti、no-idle;
    中断=<0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4 0x4 0x4 0x4 0x1;
    
    <SYSCON>
    = 0x15;"SYON_STATUS = 0x151";<0x151";"SYSCON_AC"
    
    
    MDIO@48485000{
    兼容="ti、cpsw-mdio"、"ti、Davinci_mdio";
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    ti、hwmods ="Davinci_mdio";
    bus_freq =<0xf4240>;
    reg =<0x48485000 0x100>;
    
    ethernet-phy@1{
    reg =<0x1>;
    phandle =<0xc9>;
    };
    
    ethernet-phy@2{
    reg =<0x2>;
    status ="禁用";
    最大速度=<0x64>;
    phandle =<0xca>
    ;}
    };
    
    从站@48480200{
    mac-address =[00 00 00 00 00 00 00];
    phy-handle =<0xc9>;
    phy-mode ="RGMII";
    dual_EMAC_res_vlan =<0x1>;
    };
    
    从站@48480300{
    mac-address =[00 00 00 00 00 00 00];
    phy-handle =<0xca>;
    phy-mode ="RGMII";
    dual_EMAC_res_vlan =<0x2>;
    };
    
    cpsw-phy-SEL@4a002554{
    compatible ="ti、dra7xx-cpsw-phy-SEL";
    reg =<0x4a002554 0x4>;
    reg-names ="gmii-SEL";
    };
    
    
    CAN@
    
    
    
    
    
    
    
    
    
    @4a3cae000{compatible ="ti、dra7-dCAN ";reg = 0x480000 = 0x487>00;CAN = 0x48d1;CAN = 0x48d1;
    CAN = 0x48d1;CAN = 0x48d1 = 0x48d1;CC3cr = 0x48d= 0x48d1;CAN = 0x48d1;CAN = 0x48d= 0x48d+
    TI、hwmods ="dcan2";
    reg =<0x48480000 0x2000>;
    SYSCON-raminit =<0x9 0x558 0x1>;
    中断=<0x0 0xe1 0x4>;
    时钟=<0x11>;
    状态="禁用";
    }
    
    ;
    
    GPU@56000000{compatible ="ti、7-sgx544;clocks = 0x544"
    
    
    ;"GPU_clus"= 0x544">"
    寄存器= 0x544">"、0x544";"GPU";"0x544";"GPUgcu = 0x544";"0x544cu = 0x544">"
    时钟名称="iclk"、"fclk1"、"fclk2";
    状态="禁用";
    };
    
    bb2d@
    
    
    
    
    
    
    
    
    
    @59000000{compatible ="ti、dra7-bb2d";reg =<0x59000000 0x700>;interrupts =<0x0 0x78 0x4>;ti、hwmods ="bb2d";Clocks =<0xcb 0x10 0x0>;clock-names ="fcc";status ="ok";ti、hwminds ="0x58600";cls
    
    
    
    
    = 0x599x ="dss";cl-core-cells = 0x599x = 0x599";cls = 0x4s ="dss";cls = 0x599x ="dss";cls = 0x5cock-cls = 0x5cock-c
    #size-cells =<0x1>;
    范围;
    reg =<0x58000000 0x80 0x58004054 0x4 0x58004300 0x20 0x58009054 0x4 0x58009300 0x20>;
    reg 名称="DSS"、"pll1_clkctrl"、"pll1"、"pll2_clkctrl"、 "pll2";
    时钟=<0xcb 0x0 0x8 0xcb 0x0 0xc 0xcb 0x0 0xd>;
    时钟名称="fcl"、"video1_clk"、"video2_clk";
    VDDA_VIDEA-SUPPLY =<0xcc>;
    
    dispc@
    
    
    
    
    
    
    
    
    
    @58001000{compatible ="ti、dra7-dispc";reg =<0x58001000 0x1000>;interrupts =<0x0 0x14 0x4>;ti、hwmods ="dss_dispc";Clocks =<0xcb 0x0 0x8>;clock-names ="fpel";SYSCON-534 = 0x600800080
    
    = 0x800080;0x58000200 reg;0x8050000> 0x40000800080 = 0x805800080;0x4000080 HDMI 编码器0x805800080 = 0x4000080 0x800080 = 0x4000080
    reg-names ="wP"、"pll"、"phy"、"core";
    中断=<0x0 0x60 0x4>;
    状态="ok";
    ti、hwmds ="DSS_HDMI";
    时钟=<0xcb 0x0 0x9 0xcb 0x0 0xA>;
    时钟名称="Fck)、"sys_clk";
    DMA =<0x8d 0x4c>;
    
    
    
    
    
    
    端点名称="音频"0xce"
    
    
    
    ;<0xce"= 0xcle>;<0xce-port>;<0xce-port>= 0x5<0xce";<0xce-port>;<0xce-port>= 0xce-port>;<0xce-port>= 0xce-port>= 0xce-port>
    };
    
    epwmss@4843e000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x4843e000 0x30>;
    ti、hwmds ="epwms0";
    #address-cells =<0x1>;
    #size-cells =<0x1>
    ;status ="disabled";
    范围;
    
    PWM@4843e200{
    兼容="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x4843e200 0x80>;
    时钟=<0xcf 0xb>;
    时钟名称="TBCLK"、"fck";
    状态=禁用
    }
    
    eCAP@4843e100{
    兼容="ti、dra746-eCAP"、"ti、am3352-eCAP";
    #PWM-cells =<0x3>;
    reg =<0x4843e100 0x80>;
    时钟=<0xb>;
    时钟名称="Fck";
    状态="禁用";
    };
    };
    
    epwmss@48440000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x48440000 0x30>;
    ti、hwmds ="epwms1";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    status ="disabled";
    范围;
    
    PWM@48440200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x48440200 0x80>;
    时钟=<0xd0 0xb>;
    时钟名称="TBCLK"、"fck";
    状态=禁用
    };
    
    eCAP@48440100{
    兼容="ti、dra746-eCAP"、"ti、am3352-eCAP";
    #pwM-cells =<0x3>;
    reg =<0x48440100 0x80>;
    时钟=<0xb>;
    时钟名称="Fck";
    状态="禁用";
    };
    };
    
    epwmss@48442000{
    compatible ="ti、dra746-pwmss"、"ti、am33xx-pwms";
    reg =<0x48442000 0x30>;
    ti、hwmds ="epwms2";
    #address-cells =<0x1>;
    #size-cells =<0x1>;
    status ="disabled";
    范围;
    
    PWM@48442200{
    compatible ="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
    #PWM-cells =<0x3>;
    reg =<0x48442200 0x80>;
    时钟=<0xD1 0xb>;
    时钟名称="TBCLK"、"Fck ";
    status = disabled
    ;}
    
    ECAP@48442100{
    compatible ="ti、dra746-ECAP"、"ti、am3352-ECAP";
    #PWM-cells =<0x3>;
    reg =<0x48442100 0x80>;
    时钟=<0xb>;
    时钟名称="fck";
    状态="禁用";
    };
    };
    
    AES@4b50000{
    兼容="ti、OMAP4-AES";
    ti、hwmods ="aes1";
    reg =<0x4b500000 0xa0>;
    中断=<0x0 0x50 0x4>;
    DMA =<0xc3 0x6f 0x0 0xc3 0x6e 0x0>;
    dma-names =
    0xfck;"rx clocks";"rx fclocks"="r"
    
    };
    
    AES@4b700000{
    兼容="ti、OMAP4-AES";
    ti、hwmods ="aes2";
    reg =<0x4b700000 0xa0>;
    中断=<0x0 0x3b 0x4>;
    DMA =<0xc3 0x72 0x0 0xc3 0x71 0x0>;
    dma-names ="TX Clocks"
    
    ;"rx-fclock"
    };
    
    DES@480a5000{
    兼容="ti、OMAP4-DES";
    ti、hwmods ="DES";
    reg =<0x480a5000 0xa0>;
    中断=<0x0 0x4d 0x4>;
    DMA =<0x8d 0x75 0x8d 0x74>;
    dma-names ="TX"、"Rx";
    时钟= 0xfck
    ;时钟= 0xfck-names = 0xfck;
    };
    
    sham@53100000{
    compatible ="ti、omap5-sham";
    ti、hwmds ="sham";
    reg =<0x4b101000 0x300>;
    interrupts =<0x0 0x2e 0x4>;
    DMA =<0xc3 0x77 0x0>;
    dma-names ="rx";
    times= 0xfck);
    时钟名称="fclock"
    ;时钟="fam"
    
    RNG@48090000{
    compatible ="ti、omap4-rng";
    ti、hwmods ="rng";
    reg =<0x48090000 0x2000>;
    interrupts =<0x0 0x2F 0x4>;
    Clocks = 0xA>;
    clock-names ="fck";
    };
    
    opp-supply@4a003b20{<0x3vp
    
    = 0x3bvp;rev
    
    = 0x3bvp;rev = 0x3bvp = 0x3bt
    
    
    ;rev = 0x3bvp;rev = 0x3bt、rev = 0x3bvp;rev = 0x3bt;rev = 0x3bvp = 0x3bt;rev = 0x3bvp;rev = 0x3bvbvp = 0x3bt;rev =
    
    TI、hwmods ="VPE";
    时钟=<0x56>;
    时钟名称="Fck";
    reg =<0x489d0000 0x120 0x489d0700 0x80 0x489dCSC 0x18 0x489dd000 0x400>;
    reg-names ="VPE_TOP"、"SC"、"vpdma";
    中断=<0x0 0x162 0x4>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    };
    
    VIP@0x48970000{
    compatible ="ti、vip1";
    reg =<0x48970000 0x114 0x48975500 0xd8 0x48975700 0x18 0x4897800 0x80 0x48a00
    ;parc97400 "0x48d"、0x4897400 "v"、"x48cr 0" "parser1"、"csc1"、"sc1"、"vpdma";
    ti、hwmds ="vip1";
    中断=<0x0 0x15f 0x4 0x0 0x188 0x4>;
    SYSCON-POL =<0x9 0x534>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    状态="禁用";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@= 0x2
    
    
    
    
    
    
    
    
    ;端口= 0xreg
    ;}= 0x2 = 0x2;端口= 0x1@@reg;= 0x1 = 0x1 =寄存器
    
    port@3{
    reg =<0x3>;
    };
    
    };};
    
    DSP_SYSTEM@41500000{
    compatible ="SYSCON";
    reg =<0x41500000 0x100>;
    phandle =<0xd2>;
    };
    
    OMAP-dwc3_4@48940000{
    compatible ="mi, dwc3";
    ti、hwmods = 0x4800>
    
    
    ;<0x4ds-cries= 0x000>
    ;<0x48ds-cells = 0x4>b = 0x000>;<0x48ds-cries= 0x4<0x4<rebegcries<0x000>;<0x4<0x000>;<0x48ds-cells = 0x000<0x4<0x000>
    
    
    状态="禁用";
    
    USB@48950000{
    兼容="SNP、dwc3";
    reg =<0x48950000 0x17000>;
    中断=<0x0 0x159 0x4 0x159 0x4 0x0 0x15a 0x4>;
    中断名称="外设"、"主机"、"OTG";
    最大速度="高速";
    DR_MODE ="OTG";
    };
    
    
    MMU@
    
    
    
    
    
    
    
    
    
    @41501000{兼容="ti、dra7-DSP-iommu";reg =<0x41501000 0x100>;中断=<0x0 0x92 0x4>;ti、hwmods ="mu0_dsp2";#iommu-cells =<0x150mu2>
    
    ;<0x150mu2<mu0xmu2>;<mu2mu0xmu0xmu2mu0<0x2000>
    ;<murom2<mu0<mu0<mu1<mu0<mu0<mu0<mu0<xmu0<mu0<mu0<mu0>;<mu0xmu0xmu0<mu0<mu0<mu0<mu
    
    #iommu-cells =<0x0>;
    ti、SYSCON-muconfig =<0xd2 0x1>;
    phandle =<0xd4>;
    };
    
    dsp@41000000{
    compatible ="ti、dra7-dsp";
    reg =<0x41000000 0x48000 0x41600000 0x8000 0x41700000 0x8000>;
    
    "lpram"、lsp2、lpram";"lspmands"、"ldam"
    SYSCON-bootreg =<0x9 0x560>;
    IMOMUS =<0xd3 0xd4>;
    ti、rproc-STANDBY-INFO =<0x4a005620>;
    状态="正常";
    mbox =<0x9b 0xd5>;
    计时器=<0xd6>;
    安全装置计时器=<0xd7>;
    存储器区
    = 0xd8>;
    
    VIP@0x48990000{
    compatible ="ti、vip2";
    reg =<0x48990000 0x114 0x48995500 0xd8 0x48995700 0x18 0x48995800 0x80 0x48995a00 0xd8 0x48995c00 0x18 0x48995d00 0x80 0x4899d000 0x400>;
    reg-names ="parsc0"、"vIP"、"0"、"vIP" "parser1"、"csc1"、"sc1"、"vpdma";
    ti、hwmds ="vip2";
    中断=<0x0 0x160 0x4 0x0 0x189 0x4>;
    SYSCON-POL =<0x9 0x534>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    状态="禁用";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@0 = 0x2
    
    ;
    
    
    
    
    
    端口@@reg = 0x2;= 0x1 = 0x2;端口= 0xreg;
    
    
    
    port@3{
    reg =<0x3>;
    };
    
    };};
    
    VIP@0x489b0000{
    compatible ="ti、vip3";
    reg =<0x489b0000 0x114 0x489b5500 0xd8 0x489b5700 0x18 0x489b5800 0x80 0x489b5a00 0xd8 0x489b5b5500 0xd00、0x489b5000 0x48d00
    、"0x489b0"、"vip 0"、"0x489b0"、"vip 0" "parser1"、"csc1"、"sc1"、"vpdma";
    ti、hwmds ="vip3";
    中断=<0x0 0x161 0x4 0x0 0x18a 0x4>;
    SYSCON-POL =<0x9 0x534>;
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    状态="禁用";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@
    
    
    
    @= 0x0;}= 0x1;}寄存器= 0x1;
    
    
    
    
    
    
    热区{
    
    CPU_Thermal{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x0>;
    系数=<0x0 0x7d0>;
    
    TRIPS{
    
    CPU_ALERT{
    TEMPERATURE =<0x13880>;
    迟滞=<0x7d0>;
    type ="
    
    }="无源;}= 0xdle;
    
    cpu_crit{
    temperature =<0x15f90>;
    迟滞=<0x7d0>;
    type ="严重";
    };
    
    cpu_alert1{
    temperature =<0xc350>;
    迟滞=<0x7d0>;
    type ="有效";
    phandle =<0xdc>;
    };
    };
    
    冷却映射{
    
    map0{
    trip =<0xda>;
    冷却设备=<0xdb 0xffffffff 0xffffFFF>;
    };
    
    map1{
    trip =<0xdc>;
    冷却设备=<0xdd 0xffff 0xffFFF>;
    }
    ;
    };
    
    GPU 热
    
    
    
    系数{polling-delay-passive =<0xfa>;polling-delay = 0xd1pensors = 0xd0xd90>;
    
    
    
    }热系数0xd1 = 0xd1;GPU 温度传感器= 0xd0xd10nF = 0xd10nF = 0xd10nF;0xd1;}
    
    迟滞=<0x7d0>;
    类型="严重";
    };
    };
    };
    
    core_thermal{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x2>;
    系数=<0x0 0x7d0>;
    
    TRIPS{
    
    CORE_Crit{
    TEMPERATURE =<0x15f90>;
    迟滞=<0x7d0>;
    TYPE ="临界"}
    
    ;};
    };
    
    dspive_thermal{
    POLLINGE-DELAY_PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x3>
    ;系数=<0x0 0x7d0>;
    
    TRIPS{
    
    dspive_crit}
    温度=<0x15f90>;
    迟滞=<0x7d0>;
    类型="临界"
    ;}
    
    };
    
    IVA_热力{
    POLLINGE-DELAGE-PASSIVE =<0xfa>;
    POLLINGE-DELAY =<0x1F4>;
    热传感器=<0xd9 0x4>;
    系数=<0x0 0x7d0>;
    
    TRIPS{
    
    IVA_Crit}
    温度=<0x15f90>;
    迟滞=<0x7d0>;
    类型="临界";
    };
    };
    };
    
    board_thermal{
    POLLINGE-DELAGE-PASSIVE =<0x4e2>;
    POLLINGE-DELAY =<0x5dc>;
    热传感器=<0xDE 0x0>;
    
    TRIPS{
    
    board_ALERT{
    TEMPERATURE =<0x9c40>;
    迟滞=<0x7d0>;
    type ="有效";
    phandle =<0xdf>;
    };
    
    Board_crit {
    温度=<0x19a28>;
    迟滞=<0x0>;
    类型="严重";
    };
    };
    
    冷却映射{
    
    map0{
    trip =<0xdf>;
    冷却设备=<0xdd 0xffffffffffffff>;
    };
    
    };
    };};};
    
    PMU{
    compatible ="arm、cortex-a15-PMU";
    interrupt-parent =<0x8>;
    interrupts =<0x0 0x83 0x4 0x0 0x84 0x4>;
    };
    
    memory@
    
    
    
    
    
    
    
    
    
    @0{device_type ="memory";reg =<0x0 0x8000000 0x0 0x80000000>;reserved memory{#0x58000= 0x58000>
    ;shared cells-cells = 0x5800000;<reus-cells = 0x58000>
    
    
    状态="确定";
    相位=<0xa0>;
    };
    
    dsp1-memory@99000000{
    compatible ="shared-dma-pool";
    reg =<0x0 0x99000000 0x0 0x4000000>;
    可重复使用;
    status ="确定";
    phandle =<0xa6>;
    };
    
    ipu1-memory@9d000000{
    compatible ="shared-dma-pool";
    reg =<0x0 0x9d000000 0x0 0x2000000>;
    可重用;
    status ="确定";
    phandle =<0x99>;
    };
    
    dsp2-memory@9f000000{
    compatible ="shared-dma-pool";
    reg =<0x0 0x9f000000 0x0 0x800000>;
    可重复使用;
    status ="确定";
    phandle =<0xd8>;
    };
    
    cmem_block_mem@a0000000{
    reg =<0x0 0xa0000000 0x0 0xc000000>;
    无映射;
    状态="确定";
    phandle =<0xeb>;
    };
    
    cmem_block_mem@40500000{
    reg =<0x0 0x40500000 0x0 0x100000>;
    无映射;
    状态="确定";
    phandle =<0xec>;
    };
    };
    
    fixedreguler-main_12v0{
    compatible ="reguler-fixed";
    reguler-name ="main_12v0";
    reguler-min-microvolt =<bb71b00>;
    reguler-max-microvolt =<b71b00>;
    reguler-always 开启;
    电脑控制器启动开启;
    相位=<0xe0>;
    };
    
    fixedreguler-EVM_5v0{
    兼容="固定稳压器";
    电脑控制器名称="EVM_5v0";
    电脑控制器最小值-微伏=<0x4c4b40>;
    电脑控制器最大值-微伏=<0x4c4b40>;
    VIN-电源=<e0>;
    稳压器常开;
    稳压器启动;
    };
    
    固定稳压器 VDD_3V3{
    兼容="稳压器固定";
    稳压器名称="VDD_3V3";
    VIN-电源=<0xe1>;
    稳压器最小值微伏=<0x325aa0>;
    稳压器最大值微伏=<0x325aa0>;
    phandle =<0xab>;
    };
    
    fixedreguler-AIC_DVDD{
    compatible ="reguler-fixed";
    reguler-name ="ACC_DVDD_fixed";
    VIN-supply =<0xab>;
    reguler-min-microvolt =<0x1b7740>;
    reguler-max-microvolt =<0x1b7740>;
    phandle =<0xac>;
    };
    
    fixedreguler-VTT{
    compatible ="reguler-fixed";
    reguler-name ="VTT_fixed";
    VIN-supply =<0xe2>;
    reguler-min-microvolt =<0x325aa0>;
    reguler-max-microvolt =<0x325aa0>;
    reguler-always-on;
    reguler-boot-on;
    enable-active-high;
    gpio =<0xAA 0xb 0x0>;
    }
    
    ;LED{
    compatible ="gpi-LEDs";
    
    led0{
    label ="beagle-x15:usr0";
    gpio=<0xAA 0x9 0x0>;
    linux、default-trigger ="heart";
    
    
    
    默认
    
    
    值= 0xgpix-out";"0xgpulo-off"= 0xr1";"gpulo-off"= 0xr1 ="nault-off";"noff"= 0xr1 = 0xr1 ="noff";"gpul-state
    
    = 0xr1 = 0xr1 ="noff";
    
    LED2{
    标签="bagle-x15:usr2";
    GPIOs =<0xAA 0xe 0x0>;
    Linux、default-trigger ="mmc0";
    default-state ="off";
    };
    
    LED3{
    标签="beagle-x15:usr3";
    GPIOs =<0xAA 0xF 0x0>;
    linux、default-state ="
    
    
    ;default-state ="}
    
    GPIO_FAN{
    compatible ="GPIO-FAN";
    GPIO =<0xe3 0x2 0x0>;
    GPIO-FAN、SPEEDE-MAP =<0x0 0x0 0x32c8 0x1>;
    #Cooling-cells =<0x2>;
    phandle =<0xdd>;
    };
    
    连接器{
    compatible ="HDMI-connector";
    label ="HDMI"
    = 0x61"
    
    
    
    
    ;[eport]= 0x61>};[phandle = 0x6风 口= 0x6风 扇= 0xdd>;}
    
    
    
    
    
    编码器{
    compatible ="ti、tpd12s015";
    status ="disabled";
    
    端口{
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    
    端口@0{
    reg = 0x0>;
    
    端点{
    remote -endpoint =<0xe5>;
    phandle =<0xce>;
    };
    }
    
    
    
    
    
    端点;端口@1{reg = 0xe6>
    
    };}
    
    
    };
    
    sound0{
    compatible ="简单音频卡";
    简单音频卡、name ="BeagleBoard-X15";
    简单音频卡、小工具="线路"、"线路输出"、"线路"、 "线路输入";
    简单音频卡、路由="线路输出"、"LLOUT"、"线路输出"、"RLOUT"、"MIC2L"、 "线路输入"、"MIC2R"、"线路输入";
    简单音频卡、格式="DSP_b";
    简单音频卡、位时钟主设备=<0xe7>;
    simple-audio-card、frame-master =<0xe7>;
    simple-audio-card、位时钟反转;
    
    simple-audio-card、CPU{
    sound-dai =<0xe8>;
    };
    
    simple-audio-card、codec{
    sound-dai =<0xe9>;
    时钟=<0xEA>;
    phandle =<0xe7>;
    };
    };
    
    cmem{
    compatible ="ti、cmem";
    #address-cells =<0x1>;
    #size-cells =<0x0>;
    #pool-size-cells =<0x2>;
    status ="确定";
    
    cmem_block@0{
    reg =<0x0>;
    memory-region =<0xeb>;
    cmem-buf-pools =<0x1 0x0 0xc000000>;
    };
    
    cmem_block@1{
    reg =<0x1>;
    memory-region =<0xec>;
    };
    
    };};}; 

     

     

     

     

     

     

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    请参阅 此主题。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    大家好、Kemal、感谢您发帖、但是、

    您能否提供一些说明来解决问题?

    我不n´t 我现在应该关注您提出的主题。  

    GPIO3块与 AM5726中不存在的 GPU 有什么关系?

    此致

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    是否可以从 ra7.dtsi 中删除 GPU 节点,并从 rootfs 中删除 SGX 模块,然后重试?

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    感谢 Kemal、

    我在 DTS 中删除了具有以下内容的节点"GPU":

    /{

        OCP{
          TI、hwmonds ="L3_main_1"、"L3_main_2"、"L3_main_3";
          //ti,hwmonds ="";
          /删除节点/ GPU@56000000;
       };
    };

     

    在从 DTB 转换回来的 DTS 中、现在没有 GPU@56000000条目

     

    我在 MMC.rootfs 分区上找到了一个名称类似 SGX 的东西,并使用 mv ./opt/ltp/runtest/ddt/sgx /opt/ltp/runtest/ddt/sgx~~~~~~重命名


    我已将更改后的 DTB 复制到引导引导分区,并以以下方式启动它:

    setenv bootargs console=ttyS2,115200 debug verbose panel=0 ellyprintk loglevel=3 mem=0x40000000 loglevel=7
    加载 MMC 0:1 0x88000000 sec4.dtb
    加载 MMC 0:1 0x82000000 zImage
    bootz 0x82000000 - 0x88000000

     

    此时会显示以下消息:

    正在从 FAT 加载环境... ***警告- CRC 错误,使用默认环境

    正在从 MMC 加载环境... 未找到 MMC 设备1
    ***警告-未找到 MMC 卡,使用默认环境

    MMC 设备无效
    NET:  找不到以太网。
    按任意键停止自动引导: 0
    => setenv bootargs console=ttyS2、115200 debug verbose panel=0 ellyprintk loglevel=3 mem=0x40000000 loglevel=7
    =>加载 MMC 0:1 0x88000000 sec4.dtb
    在6ms 内读取90228个字节(14.3MiB/s)
    =>加载 MMC 0:1 0x82000000 zImage
    4223488字节在188ms (21.4 MIB/s)内读取
    => bootz 0x82000000 - 0x88000000
    ###展开的设备树 blob、88000000
      使用0x88000000处的 FDT blob 进行引导
      正在将设备树加载到8ffe6000,结束8ff0773... 好的

    正在启动内核...

    正在解压缩 Linux... 已完成、正在引导内核。
    [0.000000]   在物理 CPU 0x0上引导 Linux
    [0.000000]   Linux 版本4.19.38-rt19 (Rene@Ubuntu)(gcc 版本8.3.0 (A 配置文件架构8.3-2019.03 (ARM-rel-8.36)的 GNU 工具链) 9.
    [0.000000]   CPU:ARMv7处理器[412fc0f2]修订版2 (ARMv7)、CR=30c5387d
    [0.000000]   CPU:可用的 div 指令:修补分部代码
    [0.000000]   CPU:PIPT/VIPT 非混叠数据高速缓存、PIPT 指令高速缓存
    [0.000000]   、共个:FDT:机器模型:TI AM5728 BeagleBoard-X15
    [   0.000000]、共个:FDT:忽略存储器范围0x40000000 - 0x8000000000
    [0.000000]   引导控制台[earlycon0]已启用
    [0.000000]   内存策略:数据高速缓存 writealloc
    [0.000000]   EFI:从 FDT 获取 EFI 参数:
    [0.000000]   EFI:未找到 UEFI。
    [0.000000]   保留存储器:创建了0x000095800000 (大小为56 MIB)的 CMA 存储器池
    [   0.000000]、共:保留内存:已初始化节点 ipu2-memory@95800000、兼容 id shared-dma-pool
    [0.000000]   保留的存储器:创建了0x000099000000的 CMA 存储器池、大小为64 MiB
    [   0.0000]、共:保留内存:已初始化节点 dsp1-memory@99000000、兼容 id shared-dma-pool
    [0.000000]   保留内存:创建了0x00009d000000的 CMA 内存池,大小为32 mib
    [   0.00000]、共:保留内存:已初始化节点 ipu1-memory@9d000000、兼容 id sharedma-dma-pool
    [0.000000]   保留的存储器:创建了0x00009f000000的 CMA 存储器池、大小为8 mib
    [   0.00000]、共:保留内存:已初始化节点 dsp2-memory@9f000000、兼容 id sharedma-dma-pool
    [0.000000]   CMA:保留0x00000000be400000处的24 MIB
    [0.000000]   OMAP4:将0x00000000bfd00000映射到 DRAM 隔离层的(ptrval)
    [0.000000]   DRA752 ES2.0
    [0.000000]   random:从 start_kernel+b0/0x480调用 get_random_bytes、crng_init=0
    [0.000000]% pu   :嵌入式15页/CPU s32480 r8192 d20768 u61440
    [0.000000]   在上构建了1个区域列表、移动分组。  总页数:210496
    [0.000000]   内核命令行:console=ttyS2,115200 debug verbose panel=0 ellyprintk loglevel=3 mem=0x40000000 loglevel=7
    [0.000000]   条目高速缓存散列表条目:131072 (顺序:8、1048576字节)
    [0.000000]   inode 高速缓存散列表条目:65536 (顺序:6、262144字节)
    [0.000000]   内存:635880K/848896K 可用(8192K 内核代码、356K rwdata、2656K rodata、2048K init、275K BSS、 24600K 保留、188416K CMA-r)
    [0.000000]   虚拟内核内存布局:
    [0.000000]       矢量 :0xff0000-0xff1000  (4KB)   
    [0.000000]       fixmap :0xc00000 - 0xc00000  (3072 KB)
    [0.000000]       vmalloc:0xf0800000 - 0x800000  (240 MB)
    [0.000000]       低内存 :0xC0000000 - 0xf0000000  (768 MB)
    [0.000000]       pkmap  :bbfe00000 - 0xC0000000  (  2 MB)
    [0.000000]       模块:bbf000000 - bbbfe00000  ( 14 MB)
    [0.000000]         .text:0x (ptrval)-0x (ptrval)  (10208 KB)
    [0.000000]         .init:0x (ptrval)-0x (ptrval)  (2048KB)
    [0.000000]         .data:0x (ptrval)-0x (ptrval)  (357 KB)
    [0.000000]          .bss:0x (ptrval)-0x (ptrval)  (276 KB)
    [0.000000]   slub:HWalign=64、order=0-3、MinObjects=0、CPU=2、Nodes=1
    [0.000000]   RCU:可抢占的分层 RCU 实现。
    [0.000000]   RCU:    RCU 优先级提升:优先级1延迟500毫秒。
    [0.000000]    无加速宽限期(RCU_NORMAL、After _boot)。
    [0.000000]    启用了 RCU 任务。
    [0.000000]   NR_IRQ:16、nr_IRQ:16、预分配 IRQ:16
    [0.000000]   GIC:使用分离 EOI/Deactivate 模式
    [0.000000]   OMAP 时钟事件源:Timer1为32786Hz
    [0.000000]   arch_timer:以6.14MHz (phys)运行的 cp15计时器。
    [0.000000]   时钟源:arch_sys_counter:mask:0xffffffffffffffffffffffffff max_cycles:0x16af5adb9、max_idle_ns:440795202250 ns
    [0.000005]   sched_clock:6MHz 时为56位、分辨率为162ns、每4398046511023ns 换行一次
    [0.000012]   切换到基于计时器的延迟环路、分辨率为162ns
    [0.000284]   时钟源:32K_COUNTER:MASK:0xFFFFFFFF max_cycles:0xFFFFFFFF、max_idle_ns:58327039986419 ns
    [0.000287]   OMAP 时钟源:32768Hz 时为32K_COUNTER
    [0.000721]   控制台:彩色虚拟设备80x30
    [0.3233555]   校准延迟环路(跳过)、使用计时器频率计算的值。 12.29茂物剪(lpj=61475)
    [0.32364]   pid_max:默认值:32768最小值:301
    [0.32363]   安装高速缓存散列表条目:2048 (顺序:1、8192字节)
    [0.323513]   mountpoint-cache 哈希表条目:2048 (顺序:1、8192字节)
    [0.324243]   CPU:测试写入缓冲区一致性:好
    [0.324273]   CPU0:sp幽灵 v2:使用 ICIALLU 变通办法
    [0.324522]   CPU0:更新 CPU_Capacity 1024
    [0.368214]   CPU0:线程-1、CPU 0、套接字0、mpidr 8000000
    [0.430227]   为0x80200000 - 0x80200060设置静态标识映射
    [0.450201]   RCU:分层 SRCU 实现。
    [0.510714]   EFI 服务将不可用。
    [0.540353]   SMP:启动辅助 CPU ...
    [0.660781]   CPU1:更新 CPU_Capacity 1024
    [0.660786]   CPU1:线程-1、CPU 1、插座0、mpidr 8000000001
    [0.660790]   CPU1:sp幽灵 v2:使用 ICIALLU 变通办法
    [0.660925]   SMP:带来1个节点、2个 CPU
    [0.680372]   SMP:总共激活2个处理器(24.59个 BogoMips)。
    [0.686716]   CPU:所有 CPU 均在 HYP 模式下启动。
    [0.691485]   CPU:提供虚拟化扩展。
    [0.697297]   devtmpfs:已初始化
    [0.729488]   VFP 支持 v0.3:实施者41架构4第30部分变体 f rev 0
    [0.737686]   时钟源:Jiffies:MASK:0xFFFFFFFF max_cycles:0xFFFFFFFF、max_idle_ns:19112604462750000 ns
    [0.747776]   futex 散列表条目:512 (顺序:3、32768字节)
    [0.757243]   pinctrl 内核:已初始化 pinctrl 子系统
    [0.763457]   DMI not present or invalid (DMI 不存在或无效)。
    [0.767857]   NET:注册协议系列16.
    [0.775170]   DMA:为原子相干分配预分配256 K2B 池
    [0.783146]   OMAP-hwmod:L3_main_2、使用来自 OCP 的断开 dt 数据
    [0.821446]   omap_hwmod:GPU:无 dt 节点
    [0.825382]   ------ [在此处剪切]-----
    [0.830126]   警告:CPU:0 PID:1在 arch/arm/mach-omap2/omap_hwmod.c:2409 _init.constprop.22+0x1b0/0x4dc
    [0.840029]   OMAP-hwmod:GPU:没有 MPU 寄存器目标基址
    [0.846365]   链接的模块:
    [0.849506]   CPU:0 PID:1 Comm:swapper/0未被污染4.19.38-rt19 #15
    [0.849509]   硬件名称:通用 DRA74X (平展器件树)
    [0.849511]   背迹:
    [0.849525][    ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [0.849532]    r7:c0bb73f4 r6:60000013 r5:00000000 r4:c1050a24
    [0.849544]   [ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [0.849552]   [ ](dump_stack)从[ ](_WARN+0xdc/0xf8)
    [0.849556]    r7:c0bb73f4 R6:00000009 R5:00000000 R4:ef0a1ddc
    [0.849568]   [ ](__warn)从[ ](warn_slowpath_fmt+0x50/0x6c)
    [0.849574]    R9:c0e49824 R8:00000000 r7:c10142bc R6:00000000 R5:c0bb79dc R4:c1007488
    [0.849583]   [ ](warn_slowpath_fmt)、来自[ ](_init.constprop.22+0x1b0/0x4dc)
    [0.849587]    r3:c0bb9afc r2:c0bb79dc
    [0.849590]    R5:00000000 R4:c1014284
    [0.849597][    ](_init.constprop.22)从[ ](_omap_hwmod_setup_All+0x48/0x134)
    [0.849603]    R10:c0e5935c R9:c0e49824 R8:00000000 r7:c0e0cefc R6:ffe000 R5:c100c768
    [0.849606]    R4:c1014284
    [0.849614][    ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [0.849617]    R5:c1007488 R4:c10591c0
    [0.849626]   [ ](多个_initcall)、来自[ ](kernel_init_freeable + 0x218/0x2ac)
    [0.849631]    R8:c0e49844 r7:c0e004f0 R6:c10591c0 R5:c10591c0 R4:00000003
    [0.849651][    ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [0.849646]    R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b96c0
    [0.849649]    R4:00000000
    [0.849656]   [ ](kernel_init)、来自[ ](RET_FANK_F叉+0x14/0x34)
    [0.849659]   异常堆栈(0xef0a1fb0至0xef0a1ff8)
    [0.849664]   1fa0:                                    00000000 00000000 00000000
    [0.849668]   1fc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [0.849673]   1fe0:00000000 00000000 00000000 00000013 00000000
    [0.849676]    R5:c09b96c0 R4:00000000
    [0.849679]   --[结束跟踪0000000000000001 ]--
    [1.203225]   未处理故障:异步外部中止(0x1211)、0x00000000
    [1.203229]   PgD =(ptrval)
    [1.203232]   [000000000000]* PgD=80000080004003,* PMD=00000000
    [1.203243]   内部错误::1211 [#1]抢占 SMP ARM
    [1.203246]   模块链接于:
    [1.203253]   CPU:0 PID:1 Comm:swapper/0被污染:G       W        4.19.38-rt19 #15
    [1.203256]   硬件名称:通用 DRA74X (平展器件树)
    [1.203264]   PC 位于_enable_sysc+0x5c/0x25c
    [1.203269]   LR 位于_enable_sysc+0x48/0x25c
    [1.203273]   PC:[ ]   LR:[ ]   PSR:40000013
    [1.203276]   sp:ef0a1e38 IP:ef0a1e38 FP:ef0a1e64
    [1.203279]   R10:c0e5935c R9:c0e49824 R8:00000000
    [1.203282]   r7:c1012940 r6:00000000 r5:c1007488 r4:c1012428
    [1.203285]   r3:c10124ac r2:c10124cc r1:00000078 r0:c1012428
    [1.203290]   标志:   模式 SVC_32 ISA ARM 段用户上 FIQ 上的 nZcv IRQ
    [1.203294]   控制:30c5387d 表:80003000 DAC:fffffffffd
    [1.203297]   Process swapper/0 (pid:1、stack limit = 0x (ptrval))
    [1.203301]   堆栈:(0xef0a1e38至0xef0a2000)
    [1.203305]   1e20:                                                      c0224e70 c09be858
    [1.203310   ) 1e40:ef0a1e64 8f3d4d61 c1012428 c1059810 00000000 c1012940 ef0a1e8c ef0a1e68
    [1.203315]   1e60:c021dc40 c021d898 c1012428 c100ffb0 c1012428 c101244c c1007488 c1012460
    [1.203320]   1e80:ef0a1ebc ef0a1e90 c021e164 c021daf4 ef0a1ebc ef0a1ea0 00000008 8f3d4d61
    [1.203325]   1ea0:c1012428 c100c768 ffe000 c0e0cefc ef0a1ed4 ef0a1ec0 c0e0d01c c021dfb0
    [1.203330]   1ec0:c10591c0 c1007488 ef0a1f4c ef0a1ed8 c02023fc c0e0cf08 000004f0 c0bbc598
    [1.203335]   1ee0:c0bbc578 c0bbc500 c0bc81a0 c1007488 00000000 c0bbc550 00000002 00000002
    [1.203340]   1f00:00000000 c0bb1e44 c0e004f0 c0c966e0 c1018b60 ef6646d1 ef6646da 8f3d4d61
    [1.203345]   1f20:c02803c0 8f3d4d61 c10591c0 00000003 c10591c0 c10591c0 c0e004f0 c0e49844
    [1.203350]   1f40:ef0a1f94 ef0a1f50 c0e0104c c0202384 00000002 00000002 00000000 c0e004f0
    [1.203355]   1f60:c0c966e0 000000d2 c09be8ac 00000000 c09b96c0 00000000 00000000 00000000
    [1.203359]   1f80:00000000 00000000 ef0a1fx ef0a1f98 c09b96d0 c0e00e40 00000000 c09b96c0
    [1.203364]   1fa0:00000000 ef0a1fb0 c02010e0 c09b96cc 00000000 00000000 00000000 00000000
    [1.203368]   1fc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.203373]   1fe0:00000000 00000000 00000000 000000000013 00000000 00000000 00000000 00000000 00000000
    [1.20334]   背迹:
    [1.203383][    ](_enable_sysc)从[ ](_enable+0x158/0x284)
    [1.203389]    r7:c1012940 R6:00000000 R5:c1059810 R4:c1012428
    [1.203396]   [ ](_enable)从[ ](_setup.part.16+0x1c0/0x4e0)
    [1.203400]    r7:c1012460 r6:c1007488 r5:c101244c r4:c1012428
    [1.203408][    ](_setup.part.16)、来自[ ](_omap_hwmod_setup_All+0x120/0x134)
    [1.203412]    r7:c0e0cefc r6:ffe000 r5:c100c768 r4:c1012428
    [1.203419][    ](__omap_hwmod_setup_all)从[ ](do_one _initcall+0x84/0x1b0)
    [1.203422]    R5:c1007488 R4:c10591c0
    [1.203430][    ](多个_initcall)、来自[ ](kernel_init_freeable + 0x218/0x2ac)
    [1.203435]    R8:c0e49844 r7:c0e004f0 R6:c10591c0 R5:c10591c0 R4:00000003
    [1.203444]   [ ](kernel_init_freable)从[ ](kernel_init+0x10/0x118)
    [1.203449]    R10:00000000 R9:00000000 R8:00000000 r7:00000000 R6:00000000 R5:c09b96c0
    [1.203452]    R4:00000000
    [1.203459][    ](kernel_init)、来自[ ](RET_FANK_F叉+0x14/0x34)
    [1.203462]   异常堆栈(0xef0a1fb0至0xef0a1ff8)
    [1.203466]   1fa0:                                    00000000 00000000 00000000
    [1.203471]   1fc0:00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [1.203475]   1fe0:00000000 00000000 00000000 000000000013 00000000
    [1.203478]    R5:c09b96c0 R4:00000000
    [1.203485]   代码:e3130080 1a000067 e5943004 e1a00004 (e5942044)
    [1.568531]   --[结束线迹0000000000000002 ]--
    [1.568535]   内核严重错误-未同步:致命异常
    [1.568545]   CPU1:停止
    [1.568551]   CPU:1 PID:0 Comm:swapper/1被污染:G     D W        4.19.38-rt19 #15
    [1.568553]   硬件名称:通用 DRA74X (平展器件树)
    [1.568555]   回扫:
    [1.568567][    ](dump_backtrace)从[ ](show_stack+0x18/0x1c)
    [1.568572]    r7:fa212000 r6:60000193 r5:00000000 r4:c1050a24
    [1.568580]   [ ](show_stack)从[ ](dump_stack+0x90/0xa4)
    [1.568589][    ](dump_stack)从[ ](handle_ipi+0x1bc/0x22c)
    [1.568594]    r7:fa212000 r6:00000001 r5:00000000 r4:c1059440
    [1.568607][    ](handle_ipi)从[ ](GIC_Handle_IRQ+0x94/0x98)
    [1.568611]    R6:fa21200c R5:c10272bc R4:c10079bc
    [1.568619][    ](GIC_Handle_IRQ)、来自[ ](_IRQ_Svc+0x58/0xa0)
    [1.568622]   异常堆栈(0xef0d9f28至0xef0d9f70)
    [1.568627]   9f20:                  00000000 0000022c 00000000 c021a120 ffe000 c10074bc
    [1.568632]   9f40:c1007504 00000002 00000001 c1052656 c0bbce38 ef0d9f84 ef0d9f88 ef0d9f78
    [1.568636]   9f60:c0208bf8 c0208bfc 60000013 ffffff
    [1.568641]    R9:ef0d8000 R8:00000001 r7:ef0d9f5c R6:ffff R5:60000013 R4:c0208bfc
    [1.568652][    ](arch_cpu_idle)从[ ](DEFAULT_IDLE_CALL + 0x34/0x40)
    [1.568663]   [ ](DEFAULT_IDLE_CALL)从[ ](do_idle+0x110/0x180)
    [1.568671][    ](DO 空闲)从[ ](CPU_STARTUP_END+0x20/0x24)
    [1.568676]    R10:00000000 R9:412fc0R8:80007000 r7:c1059448 R6:00000001 R5:ef0d8000
    [1.568679]    R4:00000086 R3:ef0d8000
    [1.568687][    ](CPU_STARTUP_INPUK)、来自[ ](secondary _start_kernel+0x178/0x180)
    [1.568693][    ](secondary _start_kernel)从[<8020210c>](0x8020210c)
    [1.568697]    r7:c1059448 R6:30c0387d R5:00000000 R4:af0771c0

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Kemal、

    是否可能缺少 L3_MAIN_2时钟?

    GPU 消息可能仅是 conseqence 错误。

    [0.714940] OMAP-hwmod:L3_main_2、使用来自 OCP 的断开 dt 数据
    [0.843866] omap_hwmod:GPU:_wait_target_ready 失败:-16
    [0.849586] OMAP_hwmod:GPU:无法为复位启用(3)

    我的定制硬件的一个细节与参考设计不同。 在参考设计中、连接了第二个频率为22.5792MHz 的时钟源。

    正确启动 Linux 可能需要这个时钟? 我在这个论坛中问是否真的需要可选的第二个时钟以及原因。

    答案是否定的、不需要组件... 以下是主题: e2e.ti.com/.../743176

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好!

    我认为问题与 GPU 无关、我想知道您是否可以分享您在 DTS/DTSI 文件中所做的更改。 如果您可以突出显示已删除的行、请将更改作为文本文件的一部分附加。 我们可以更轻松地从文本文件中解析信息。

    此致、
    Krunal

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好 Kemal 和 Krunal、感谢您的帮助、


    我现在关闭此主题、但我已经在 https://e2e.ti.com/support/processors/f/791/t/850757上创建了一个