REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0AB4)= 0x00040000+0x1;// vout1_fid_mux1 *
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B2C)= 0x00040000+0x1;// vout1_clk *
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B30)= 0x00040000+0x1;// vout1_HSYNC *
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B34)= 0x00040000+0x1;// vout1_vsync *
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B38)= 0x00040000+0x1;// vout1_avid *
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0AB0)= 0x00060000;// vout1_b_CB_c[0]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0AAC)= 0x00040000;// vout1_b_CB_c[1]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B98)= 0x00060000+0x1;// vout1_b_CB_c[2]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B3C)= 0x00040000+0x1;// vout1_b_CB_c[3]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B40)= 0x00040000+0x1;// vout1_b_CB_c[4]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B44)= 0x00040000+0x1;// vout1_b_CB_c[5]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B48)= 0x00040000+0x1;// vout1_b_CB_c[6]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B4C)= 0x00040000+0x1;// vout1_b_CB_c[7]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B50)= 0x00040000+0x1;// vout1_b_CB_c[8]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B54)= 0x00040000+0x1;// vout1_b_CB_c[9]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0AA0)= 0x00040000;// vout1_g_y_YC[0]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0A9C)= 0x00060000;/* Vout1_g_y_YC[1]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B8C)= 0x00060000+0x1;// vout1_g_y_YC[2]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B58)= 0x00040000+0x1;// vout1_g_y_YC[3]*/
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B5C)= 0x00040000+0x1;// vout1_g_y_YC[4]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B60)= 0x00040000+0x1;// vout1_g_y_YC[5]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B64)= 0x00040000+0x1;// vout1_g_y_YC[6]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B68)= 0x00040000+0x1;// vout1_g_y_YC[7]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B6C)= 0x00040000+0x1;// vout1_g_y_YC[8]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B70)= 0x00040000+0x1;// vout1_g_y_YC[9]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0AA8)= 0x00040000;// vout1_r_cr[0]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0AA4)= 0x00040000;// vout1_r_cr[1]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B94)= 0x00040000+0x1;// vout1_r_cr[2]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B90)= 0x00060000+0x1;// vout1_r_cr[3]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B74)= 0x00040000+0x1;// vout1_r_cr[4]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B78)= 0x00040000+0x1;// vout1_r_cr[5]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B7C)= 0x00040000+0x1;// vout1_r_cr[6]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B80)= 0x00040000+0x1;// vout1_r_cr[7]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B84)= 0x00040000+0x1;// vout1_r_cr[8]*
REG32_DK (CSL_TI814x_CTRL_MODULE_BASE_DK + 0x0B88)= 0x00040000+0x1;// vout1_r_cr[9]*

