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[参考译文] Linux/AM5708:AM5708定制 SPI

Guru**** 2782615 points

Other Parts Discussed in Thread: AM5708, DRA722, DRA718, PCF8575, TLV320AIC3106, LP8733, TPD12S015

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/733513/linux-am5708-am5708-custom-spi

器件型号:AM5708
主题中讨论的其他器件: DRA718DRA72DRA722PCF8575TLV320AIC3106LP8733TPD12S015CSD

工具/软件:Linux

您好:

我有一个基于 AM5708的定制板和 SDK Linux 05.00.00.15。
附加的是器件树和 defconfig 文件。
除了 QSPI、我还有4个 SPI 接口、希望管理不同的器件
从 u-boot 命令"spi"中删除。
我查看我的 QSPI
>SSPI 0:0.0 16 FFFF
但是、如果我尝试一下
>SSPI 1:0.0 16 FFFF
我得到"无效总线1 (err=-19)
我检查了 pinmux、看起来不错。
欢迎提出任何想法。

此致
新罗

/DTS-v1/;

/{
   #address-cells =<0x2>;
   大小单元格=<0x2>;
   兼容="ti、dra718-evm"、"ti、dra718"、"ti、dra722"、"ti、dra72"、"ti、dra7";
   中断父级=<0x1>;
   型号="TI DRA718 EVM";

   选择{
      stdout-path ="/ocp/serial@48020000";
      tick-timer ="/ocp/timer@48032000";
   };

   别名{
      i2c0 ="/ocp/i2c@48070000";
      i2c1 ="/ocp/i2c@48072000";
      i2c2 ="/ocp/i2c@48060000";
      i2c3 ="/ocp/i2c@4807a000";
      i2c4 ="/ocp/i2c@4807c000";
      Serial0 ="/ocp/serial@4806a000";
      SERIAL1 ="/ocp/serial@4806c000";
      SERIAL2 ="/ocp/serial@48020000";
      serial3 ="/ocp/serial@4806e000";
      serial4 ="/ocp/serial@48066000";
      serial5 ="/ocp/serial@48068000";
      serial6 ="/ocp/serial@4842000";
      serial7 ="/ocp/serial@48422000";
      serial8 ="/ocp/serial@48424000";
      serial9 ="/ocp/serial@4ae2b000";
      Ethernet0 ="/ocp/ethernet@48484000/从器件@48480200";
      Ethernet1 ="/ocp/ethernet@48484000/从器件@48480300";
      D_CAN0 ="/ocp/can@481cc000";
      D_CAN1 ="/ocp/can@481d0000";
      spi0 ="/ocp/qspi@4b300000";
      display0 ="/connector";
   };

   计时器{
      兼容="arm、armv7-timer";
      中断=<0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xA 0x308>;
      中断父级=<0x2>;
   };

   中断控制器@48211000{
      兼容="arm、cortex-a15-GIC";
      中断控制器;
      #interrupt-cells =<0x3>;
      寄存器=<0x0 0x48211000 0x0 0x1000 0x0 0x48212000 0x0 0x2000 0x0 0x48214000 0x0 0x2000 0x0 0x48216000 0x0 0x2000>;
      中断=<0x1 0x9 0x304>;
      中断父级=<0x2>;
      phandle =<0x2>;
   };

   中断控制器@48281000{
      兼容="ti、omap5-wugen-MPU"、"ti、omap4-wugen-MPU";
      中断控制器;
      #interrupt-cells =<0x3>;
      REG =<0x0 0x48281000 0x0 0x1000>;
      中断父级=<0x2>;
      相位=<0x6>;
   };

   CPU{
      #address-cells =<0x1>;
      大小单元格=<0x0>;

      CPU@0{
         DEVICE_TYPE ="CPU";
         兼容="arm、cortex-a15";
         reg =<0x0>;
         运行点-v2 =<0x3>;
         时钟=<0x4>;
         时钟名称="cpu";
         时钟延迟=<0x493e0>;
         冷却-最小-级别=<0x0>;
         冷却-最大-级别=<0x2>;
         #Cooling cell-cells =<0x2>;
         相位=<0x103>;
      };
   };

   opp-table{
      兼容="操作点 v2-ti-cpu";
      SYSCON =<0x5>;
      相位=<0x3>;

      opp_nom-1000000000{
         opp-Hz =<0x0 0x3b9aca00>;
         op-microvolt =<0x102ca0 0xcf850 0x118c30>;
         opp-supported-HW =<0xff 0x1>;
         opp-suspend;
      };

      opp_od-1176000000{
         opp-Hz =<0x0 0x46185600>;
         op-microvolt =<0x11b340 0xd8108 0x11b340>;
         opp-supported-HW =<0xff 0x2>;
      };
   };

   SoC{
      兼容="ti、omap-infra";

      MPU{
         兼容="ti、omap5-MPU";
         ti、hwmods ="mpu";
      };
   };

   OCP{
      兼容="ti、dra7-L3-NOC"、"简单总线";
      #address-cells =<0x1>;
      大小单元格=<0x1>;
      范围=<0x0 0x0 0x0 0xC0000000>;
      TI、hwmonds ="L3_main_1"、"L3_main_2";
      REG =<0x0 0x44000000 0x0 0x1000000 0x0 0x45000000 0x0 0x1000>;
      中断扩展=<0x1 0x0 0x4 0x4 0x6 0x0 0xA 0x4>;
      u-boot、dm-spl;

      L4@4a000000{
         兼容="ti、dra7-l4-cfg"、"简单总线";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         范围=<0x0 0x4a000000 0x22c000>;
         u-boot、dm-spl;

         SCM@2000{
            兼容="ti、dra7-SCM-core"、"simple-bus";
            reg =<0x2000 0x2000>;
            #address-cells =<0x1>;
            大小单元格=<0x1>;
            范围=<0x0 0x2000 0x2000>;
            u-boot、dm-spl;

            SCM_conf@0{
               兼容="SYSCON"、"简单总线";
               reg =<0x0 0x1400>;
               #address-cells =<0x1>;
               大小单元格=<0x1>;
               范围=<0x0 0x0 0x1400>;
               u-boot、dm-spl;
               相位=<0x7>;

               pbias _regulator@e00{
                  兼容="ti、pbias - dra7"、"ti、pbias - omap";
                  reg =<0xe00 0x4>;
                  SYSCON =<0x7>;

                  PBIAS_MMC_omap5{
                     电脑控制器名称="pbias _mmc_omap5";
                     稳压器最小微伏=<0x1b7740>;
                     稳压器最大值微伏=<0x2dc6c0>;
                     phandle =<bb5>;
                  };
               };

               时钟{
                  #address-cells =<0x1>;
                  大小单元格=<0x0>;

                  dss_dcdcp_clk@558{
                     #clock-cells =<0x0>;
                     兼容="ti、栅极时钟";
                     时钟=<0x8>;
                     TI、bit-shift =<0x0>;
                     reg =<0x558>;
                  };

                  ehrpwm0_TBCLK@558{
                     #clock-cells =<0x0>;
                     兼容="ti、栅极时钟";
                     时钟=<0x9>;
                     TI、bit-shift =<0x14>;
                     reg =<0x558>;
                     phandle =<0xFE>;
                  };

                  ehrpwm1_TBCLK@558{
                     #clock-cells =<0x0>;
                     兼容="ti、栅极时钟";
                     时钟=<0x9>;
                     TI、bit-shift =<0x15>;
                     reg =<0x558>;
                     phandle =<0xff>;
                  };

                  ehrpwm2_TBCLK@558{
                     #clock-cells =<0x0>;
                     兼容="ti、栅极时钟";
                     时钟=<0x9>;
                     TI、bit-shift =<0x16>;
                     reg =<0x558>;
                     相位=<0x100>;
                  };

                  SYS_32k_ck{
                     #clock-cells =<0x0>;
                     兼容="ti、mux-clock";
                     时钟=<0xA 0xb 0xb 0xb>;
                     TI、bit-shift =<0x8>;
                     reg =<0x6c4>;
                     相位=<0x4f>;
                  };
               };
            };

            pinmux@1400{
               兼容="ti、dra7-padconf"、"pinctrl-single";
               REG =<0x1400 0x468>;
               #address-cells =<0x1>;
               大小单元格=<0x0>;
               #pinctrl-cells =<0x1>;
               #interrupt-cells =<0x1>;
               中断控制器;
               pinctrl-single、寄存器宽度=<0x20>;
               pinctrl-single、function-mask =<0x3fffffff>;
               相位=<0xaE>;

               mmc1_PINs_default{
                  pinctrl-single、pins =<0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>;
                  phandle =<bb6 >;
               };

               mmc2_PINs_default{
                  pinctrl-single、pins =<0x9C 0x60001 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
                  u-boot、dm-spl;
                  相位=<0xC2>;
               };

               Dcan1_PINS_DEFAULT{
                  pinctrl-single、pins =<0x3d0 0x20000 0x418 0x20001>;
                  phandle =<0xf6>;
               };

               Dcan1_PINS_SLEEP{
                  pinctrl-single、pins =<0x3d0 0x2000f 0x418 0x2000f>;
                  phandle =<0xf5>;
               };

               mmc1_PINs_sdr12{
                  pinctrl-single、pins =<0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>;
                  phandle =<0xBA>;
               };

               mmc1_PINs_hs{
                  pinctrl-single、pins =<0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>;
                  phandle =<bbb9>;
               };

               mmc1_PINs_sdr25{
                  pinctrl-single、pins =<0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>;
                  phandle =<0xbb>;
               };

               mmc1_PINs_sdr50{
                  pinctrl-single、pins =<0x354 0x601f0 0x358 0x601f0 0x35c 0x601f0 0x360 0x601f0 0x364 0x601f0 0x368 0x601f0>;
                  phandle =<bbbc>;
               };

               mmc1_PINs_ddr50_rev10{
                  pinctrl-single、pins =<0x354 0x601e0 0x358 0x601e0 0x35c 0x601e0 0x360 0x601e0 0x364 0x601e0 0x368 0x601e0>;
               };

               mmc1_PINs_ddr50_rev20{
                  pinctrl-single、pins =<0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>;
                  phandle =<0xbd>;
               };

               mmc1_PINs_sdr104{
                  pinctrl-single、pins =<0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>;
                  phandle =<bbbf>;
               };

               mmc2_PINs_hs{
                  pinctrl-single、pins =<0x9C 0x60001 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
                  u-boot、dm-spl;
                  phandle =<0xc3>;
               };

               mmc2_PINs_DDR_rev10{
                  pinctrl-single、pins =<0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001 0x9C 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0xbb0 0x60001>;
               };

               mmc2_PINs_DDR_rev20{
                  pinctrl-single、pins =<0x9C 0x60101 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>;
                  u-boot、dm-spl;
                  phandle =<0xc4>;
               };

               mmc2_PINs_HS200{
                  pinctrl-single、pins =<0x9C 0x60101 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>;
                  u-boot、dm-spl;
               };
            };

            SCM_conf@1c04{
               兼容="SYSCON";
               reg =<0x1c04 0x20>;
               #SYSCON-Cells =<0x2>;
               phandle =<0xa9>;
            };

            scm_conf@1c24{
               兼容="SYSCON";
               reg =<0x1c24 0x24>;
               phandle =<0xc9>;
            };

            dma-router@b78{
               兼容="ti、dra7-dma-crossbar";
               reg =<bb78 0xFC>;
               dma-cells =<0x1>;
               dma-requests =<0xcd>;
               TI、dma-safe-map =<0x0>;
               dma-masters =<0xc>;
               相位=<0xaf>;
            };

            dma-router@C78{
               兼容="ti、dra7-dma-crossbar";
               reg =<0xc78 0x7c>;
               dma-cells =<0x2>;
               DMA 请求=<0xcc>;
               TI、dma-safe-map =<0x0>;
               dma-masters =<0xd>;
               相位=<0xdc>;
            };
         };

         CM_CORE_AON@5000{
            兼容="ti、dra7-cm-core-aon";
            reg =<0x5000 0x2000>;

            时钟{
               #address-cells =<0x1>;
               大小单元格=<0x0>;

               atl_clkin0_ck{
                  #clock-cells =<0x0>;
                  兼容="ti、dra7-atl-clock";
                  时钟=<0xe>;
                  相位=<0x42>;
               };

               atl_clkin1_ck{
                  #clock-cells =<0x0>;
                  兼容="ti、dra7-atl-clock";
                  时钟=<0xe>;
                  相位=<0x41>;
               };

               atl_clkin2_ck{
                  #clock-cells =<0x0>;
                  兼容="ti、dra7-atl-clock";
                  时钟=<0xe>;
                  相位=<0x40>;
               };

               atl_clkin3_ck{
                  #clock-cells =<0x0>;
                  兼容="ti、dra7-atl-clock";
                  时钟=<0xe>;
                  相位=<0x3f>;
               };

               HDMI_CLKIN_CK{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  phandle =<0x2e>;
               };

               MLB_CLKIN_CK{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  phandle =<0xa4>;
               };

               mlbp_CLKIN_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0xA5>;
               };

               pciesref_acs_clk_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x5f5e100>;
                  相位=<0x59>;
               };

               Ref_clkin0_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x44>;
               };

               Ref_clkin1_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x45>;
               };

               Ref_clkin2_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x46>;
               };

               Ref_clkin3_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x47>;
               };

               RMII_clk_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x70>;
               };

               sdvenc_CLKIN_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
               };

               SECURE_32k_clk_src_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x8000>;
                  phandle =<0x8e>;
               };

               SYS_clk32_crystal_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x8000>;
                  相位=<0xA>;
               };

               SYS_clk32_pseude_ck{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0xF>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x262>;
                  phandle =<0xb>;
               };

               virt_12000000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<bbbbb71b00>;
                  相位=<0x7E>;
               };

               virt_13000000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0xc65d40>;
               };

               virt_16800000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x1005900>;
                  相位=<0x80>;
               };

               virt_19200000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x124f800>;
                  相位=<0x81>;
               };

               virt_20000000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x1312d00>;
                  相位=<0x7f>;
               };

               virt_26000000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x18cba80>;
                  相位=<0x82>;
               };

               virt_27000000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x19bfcc0>;
                  相位=<0x83>;
               };

               virt_38400000_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x249f000>;
                  相位=<0x84>;
               };

               SYS_clkin2{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x1588800>;
                  相位=<0x43>;
               };

               USB_OTG_CLKIN_CK{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  phandle =<0x8b>;
               };

               video_CLKIN_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x38>;
               };

               video_m2_CLKIN_ck{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x2D>;
               };

               VIDEO2_CLKIN_CK{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  相位=<0x39>;
               };

               VIDEO2_M2_CLKIN_CK{
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
                  phandle =<0x2C>;
               };

               DPLL_AE_CK@1e0{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-m4xen-clock";
                  时钟=<0x10 0x11>;
                  REG =<0x1e0 0x1e4 0x1ec 0x1e8>;
                  相位=<0x12>;
               };

               DPLL_AE_x2_ck{
                  #clock-cells =<0x0>;
                  兼容="TI、OMAP4-DPLL-x2-clock";
                  时钟=<0x12>;
                  相位=<0x13>;
               };

               DPLL_AEM2x2_CK@1f0{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x13>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x1f0>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x14>;
               };

               Abe_clk@108{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x14>;
                  ti、max-div =<0x4>;
                  reg =<0x108>;
                  TI、二进制索引功率;
                  相位=<0x86>;
               };

               DPLL_AAB_M2_CK@1f0{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x12>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x1f0>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  phandle =<0x6e>;
               };

               DPLL_AAB_m3x2_ck@1f4{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x13>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x1F4>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x15>;
               };

               DPLL_CORE_BYP_MUx@12c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x15>;
                  TI、bit-shift =<0x17>;
                  reg =<0x12c>;
                  phandle =<0x16>;
               };

               DPLL_CORE_CK@120{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-内核时钟";
                  时钟=<0xF 0x16>;
                  REG =<0x120 0x124 0x12c 0x128>;
                  相位=<0x17>;
               };

               DPLL_CORE_x2_CK{
                  #clock-cells =<0x0>;
                  兼容="TI、OMAP4-DPLL-x2-clock";
                  时钟=<0x17>;
                  相位=<0x18>;
               };

               DPLL_CORE_h12x2_ck@13c{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x18>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x13c>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x19>;
               };

               MPU_DPLL_hs_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x19>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x1a>;
               };

               DPLL_MPU_CK@160{
                  #clock-cells =<0x0>;
                  兼容="ti、omap5-MPU-DPLL-clock";
                  时钟=<0xF 0x1a>;
                  REG =<0x160 0x164 0x16c 0x168>;
                  相位=<0x4>;
               };

               DPLL_MPU_m2_ck@170{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x4>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x170>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x1b>;
               };

               MPU_dclk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x1b>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x92>;
               };

               DSP_DPLL_hs_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x19>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x1c>;
               };

               DPLL_DSP_BYP_MUX@240{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x1c>;
                  TI、bit-shift =<0x17>;
                  reg =<0x240>;
                  相位=<0x1d>;
               };

               DPLL_DSP_CK@234{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x1d>;
                  reg =<0x234 0x238 0x240 0x23c>;
                  分配的时钟=<0x1E>;
                  分配的时钟速率=<0x23c34600>;
                  相位=<0x1E>;
               };

               DPLL_DSP_m2_ck@244{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x1E>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x244>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  分配的时钟=<0x1f>;
                  分配的时钟速率=<0x23c34600>;
                  相位=<0x1f>;
               };

               IVA_DPLL_hs_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x19>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x20>;
               };

               DPLL_IVA_BYP_mux@1AC{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x20>;
                  TI、bit-shift =<0x17>;
                  reg =<0x1ac>;
                  相位=<0x21>;
               };

               DPLL_IVA_CK@1a0{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x21>;
                  reg =<0x1a0 0x1a4 0x1ac 0x1a8>;
                  分配的时钟=<0x22>;
                  分配的时钟速率=<0x45707d40>;
                  相位=<0x22>;
               };

               DPLL_IVA_m2@1b0{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x22>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x1b0>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  分配的时钟=<0x23>;
                  分配的时钟速率=<0x17257f16>;
                  相位=<0x23>;
               };

               IVA_dclk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x23>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x94>;
               };

               DPLL_GPU_BYP_mux@2e4{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x15>;
                  TI、bit-shift =<0x17>;
                  reg =<0x2e4>;
                  相位=<0x24>;
               };

               DPLL_GPU_CK@2d8{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x24>;
                  reg =<0x2d8 0x2dc 0x2e4 0x2e0>;
                  分配的时钟=<0x25>;
                  分配的时钟速率=<0x4c1d7940>;
                  相位=<0x25>;
               };

               DPLL_GPU_m2_CK@2e8{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x25>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2e8>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  分配的时钟=<0x26>;
                  分配的时钟速率=<0x195f286b>;
                  相位=<0x26>;
               };

               DPLL_CORE_M2_CK@130{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x17>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x130>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x27>;
               };

               core_DPLL_out_dclk_ddiv{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x27>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x96>;
               };

               DPLL_DDR_BYP_mux@21c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x15>;
                  TI、bit-shift =<0x17>;
                  reg =<0x21c>;
                  相位=<0x28>;
               };

               DPLL_DDR_CK@210{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x28>;
                  寄存器=<0x210 0x214 0x21c 0x218>;
                  相位=<0x29>;
               };

               DPLL_DDR_m2@220{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x29>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x220>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x88>;
               };

               DPLL_GMAC_BYP_MUX@2B4{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x15>;
                  TI、bit-shift =<0x17>;
                  reg =<0x2b4>;
                  相位=<0x2a>;
               };

               DPLL_GMAC_CK@2a8{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x2a>;
                  reg =<0x2a8 0x2ac 0x2b4 0x2b0>;
                  相位=<0x2b>;
               };

               DPLL_GMAC_m2@2B8{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x2b>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2b8>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x89>;
               };

               VIDEO2_dclk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x2C>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x98>;
               };

               video_dclk_ddiv{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x2D>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x99>;
               };

               hdmi dclk_ddiv{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x2e>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x9a>;
               };

               per_DPLL_hs_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x15>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
                  phandle =<0x5d>;
               };

               USB_DPLL_hs_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x15>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x3>;
                  相位=<0x61>;
               };

               EVE_DPLL_hs_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x19>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x2F>;
               };

               DPLL_eve@BYP_mux 290{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x2F>;
                  TI、bit-shift =<0x17>;
                  reg =<0x290>;
                  相位=<0x30>;
               };

               DPLL_eve_ck@284{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x30>;
                  REG =<0x284 0x288 0x290 0x28c>;
                  相位=<0x31>;
               };

               DPLL_eve_m2_ck@294{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x31>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x294>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  phandle =<0x32>;
               };

               EVE_dlk_ddiv{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x32>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  phandle =<0xa3>;
               };

               DPLL_CORE_h13x2_CK@140{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x18>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x140>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
               };

               DPLL_CORE_h14x2_CK@144{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x18>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x144>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x71>;
               };

               DPLL_CORE_h22x2_ck@154{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x18>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x154>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x3a>;
               };

               DPLL_CORE_h23x2_ck@158{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x18>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x158>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  phandle =<0x7d>;
               };

               DPLL_CORE_h24x2_ck@15c{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x18>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x15c>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
               };

               DPLL_DDR_x2_CK{
                  #clock-cells =<0x0>;
                  兼容="TI、OMAP4-DPLL-x2-clock";
                  时钟=<0x29>;
                  相位=<0x33>;
               };

               DPLL_DDR_h11x2_ck@228{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x33>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2228>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
               };

               DPLL_DSP_x2_CK{
                  #clock-cells =<0x0>;
                  兼容="TI、OMAP4-DPLL-x2-clock";
                  时钟=<0x1E>;
                  相位=<0x34>;
               };

               DPLL_DSP_m3x2_ck@248{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x34>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x248>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  分配的时钟=<0x35>;
                  分配的时钟速率=<0x17d78400>;
                  相位=<0x35>;
               };

               DPLL_GMAC_x2_CK{
                  #clock-cells =<0x0>;
                  兼容="TI、OMAP4-DPLL-x2-clock";
                  时钟=<0x2b>;
                  相位=<0x36>;
               };

               DPLL_GMAC_h11x2_ck@2c0{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x36>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2c0>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x37>;
               };

               DPLL_GMAC_h12x2_ck@2c4{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x36>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2c4>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
               };

               DPLL_GMAC_h13x2_ck@2c8{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x36>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2c8>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
               };

               DPLL_GMAC_m3x2_ck@2bc{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x36>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x2bc>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
               };

               gmII_m_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x37>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
               };

               hdmi clk2_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x2e>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x4d>;
               };

               HDMI_div_clk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x2e>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x53>;
               };

               L3_iclk_div@100{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  ti、max-div =<0x2>;
                  TI、bit-shift =<0x4>;
                  reg =<0x100>;
                  时钟=<0x19>;
                  TI、二进制索引功率;
                  phandle =<0x8>;
               };

               L4_ROOT_clk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x8>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
                  相位=<0x9>;
               };

               video_clk2_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x38>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  phandle =<0x4b>;
               };

               video_div_clk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x38>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x51>;
               };

               VIDEO2_clk2_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x39>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  phandle =<0x4c>;
               };

               VIDEO2_DIV_clk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x39>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x52>;
               };

               ipu1_gfclk_mux@520{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x14 0x3a>;
                  TI、bit-shift =<0x18>;
                  reg =<0x520>;
                  分配的时钟=<0x3b>;
                  分配的时钟父级=<0x3a>;
                  相位=<0x3b>;
               };

               McASP1_ahclkr_mux@550{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x1c>;
                  reg =<0x550>;
                  相位=<0xE1>;
               };

               McASP1_ahclkx_mux@550{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x550>;
                  phandle =<0xe0>;
               };

               McASP1辅助 gfclk_mux@550{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x550>;
                  phandle =<0xdf>;
               };

               timer5_gfclk_mux@558{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53 0x54>;
                  TI、bit-shift =<0x18>;
                  reg =<0x558>;
               };

               timer6_gfclk_mux@560{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53 0x54>;
                  TI、bit-shift =<0x18>;
                  reg =<0x560>;
               };

               timer7_gfclk_mux@568{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53 0x54>;
                  TI、bit-shift =<0x18>;
                  reg =<0x568>;
               };

               timer8_gfclk_mux@570{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53 0x54>;
                  TI、bit-shift =<0x18>;
                  reg =<0x570>;
               };

               uart6_gfclk_mux@580{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x580>;
               };

               {dummy_ck}
                  #clock-cells =<0x0>;
                  兼容="固定时钟";
                  时钟频率=<0x0>;
               };
            };

            时钟域{
            };
         };

         CM_CORE@8000{
            compatible ="ti、dra7-cm-core";
            reg =<0x8000 0x3000>;

            时钟{
               #address-cells =<0x1>;
               大小单元格=<0x0>;

               DPLL_PCIe_ref_ck@200{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0xF>;
                  REG =<0x200 0x204 0x20c 0x208>;
                  相位=<0x57>;
               };

               DPLL_PCIe_ref_m2ldo_ck@210{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x57>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x210>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x58>;
               };

               apll_PCIe_in_clk_mux@4ae06118{
                  兼容="ti、mux-clock";
                  时钟=<0x58 0x59>;
                  #clock-cells =<0x0>;
                  reg =<0x21c 0x4>;
                  TI、bit-shift =<0x7>;
                  相位=<0x5a>;
               };

               apll_PCIe_ck@21c{
                  #clock-cells =<0x0>;
                  兼容="ti、dra7-apll-clock";
                  时钟=<0x5a 0x57>;
                  reg =<0x21c 0x220>;
                  phandle =<0x5b>;
               };

               optfclk_pciephy1_32kHz@4a0093b0{
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  #clock-cells =<0x0>;
                  reg =<0x13b0>;
                  TI、bit-shift =<0x8>;
                  phandle =<0xca>;
               };

               optfclk_pciephy2_32kHz@4a0093b8{
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  #clock-cells =<0x0>;
                  reg =<0x13b8>;
                  TI、bit-shift =<0x8>;
                  phandle =<0xcd>;
               };

               optfclk_pciephy_div@4a00821c{
                  兼容="ti、分频器时钟";
                  时钟=<0x5b>;
                  #clock-cells =<0x0>;
                  reg =<0x21c>;
                  TI、分频器=<0x2 0x1>;
                  TI、bit-shift =<0x8>;
                  ti、max-div =<0x2>;
                  相位=<0x5c>;
               };

               optfclk_pciephy1_clk@4a0093b0{
                  兼容="ti、栅极时钟";
                  时钟=<0x5b>;
                  #clock-cells =<0x0>;
                  reg =<0x13b0>;
                  TI、bit-shift =<0x9>;
                  phandle =<0xcb>;
               };

               optfclk_pciephy2_clk@4a0093b8{
                  兼容="ti、栅极时钟";
                  时钟=<0x5b>;
                  #clock-cells =<0x0>;
                  reg =<0x13b8>;
                  TI、bit-shift =<0x9>;
                  phandle =<0xce>;
               };

               optfclk_pciephy1_div_clk@4a0093b0{
                  兼容="ti、栅极时钟";
                  时钟=<0x5c>;
                  #clock-cells =<0x0>;
                  reg =<0x13b0>;
                  TI、bit-shift =<0xA>;
                  相位=<0xcc>;
               };

               optfclk_pciephy2_div_clk@4a0093b8{
                  兼容="ti、栅极时钟";
                  时钟=<0x5c>;
                  #clock-cells =<0x0>;
                  reg =<0x13b8>;
                  TI、bit-shift =<0xA>;
                  相位=<0xCF>;
               };

               apll_pcie_clkvcoldo{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x5b>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
               };

               apll_pcie_clkvcoldo_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x5b>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
               };

               Apll_PCIe_m2_ck{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x5b>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  phandle =<0x8d>;
               };

               DPLL_PER_BYP_MUX@14c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x5d>;
                  TI、bit-shift =<0x17>;
                  reg =<0x14c>;
                  phandle =<0x5E>;
               };

               DPLL_PER_CK@140{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-时钟";
                  时钟=<0xF 0x5E>;
                  寄存器=<0x140 0x144 0x14c 0x148>;
                  相位=<0x5f>;
               };

               DPLL_PER_M2_CK@150{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x5f>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x150>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x60>;
               };

               func_96m_ain_dclk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x60>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  phandle =<0x9b>;
               };

               DPLL_USB_BYP_mux@18c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x61>;
                  TI、bit-shift =<0x17>;
                  reg =<0x18c>;
                  相位=<0x62>;
               };

               DPLL_USB_CK@180{
                  #clock-cells =<0x0>;
                  兼容="ti、OMAP4-DPLL-j-类型时钟";
                  时钟=<0xF 0x62>;
                  寄存器=<0x180 0x184 0x18c 0x188>;
                  相位=<0x63>;
               };

               DPLL_USB_m2_ck@190{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x63>;
                  ti、max-div =<0x7f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x190>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x66>;
               };

               DPLL_PCIe_ref_m2_ck@210{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x57>;
                  ti、max-div =<0x7f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x210>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  phandle =<0x8c>;
               };

               DPLL_PER_x2_CK{
                  #clock-cells =<0x0>;
                  兼容="TI、OMAP4-DPLL-x2-clock";
                  时钟=<0x5f>;
                  相位=<0x64>;
               };

               DPLL_PER_h11x2_CK@158{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x64>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x158>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x65>;
               };

               DPLL_PER_h12x2_CK@15c{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x64>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x15c>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x69>;
               };

               DPLL_PER_h13x2_CK@160{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x64>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x160>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x7B>;
               };

               DPLL_PER_h14x2_CK@164{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x64>;
                  ti、max-div =<0x3f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x164>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x72>;
               };

               DPLL_PER_M2x2_CK@150{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x64>;
                  ti、max-div =<0x1f>;
                  ti、自动空闲移位=<0x8>;
                  reg =<0x150>;
                  TI、index-starts-at-one;
                  ti、反转自动空闲位;
                  相位=<0x56>;
               };

               DPLL_USB_clkdcoldo{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x63>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x1>;
                  相位=<0x68>;
               };

               func_128m_clk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x65>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
                  相位=<0x76>;
               };

               func_12m_fclk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x56>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x10>;
               };

               func_24m_clk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x60>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x4>;
                  相位=<0x3E>;
               };

               func_48m_fclk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x56>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x4>;
                  相位=<0x55>;
               };

               func_96m_fclk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x56>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
               };

               l3init_60m_fclk@104{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x66>;
                  reg =<0x104>;
                  TI、分频器=<0x1 0x8>;
               };

               clkout2_clk@6b0{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x67>;
                  TI、bit-shift =<0x8>;
                  reg =<0x6b0>;
               };

               l3init_960m_gfclk@6c0{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x68>;
                  TI、bit-shift =<0x8>;
                  reg =<0x6c0>;
                  phandle =<0x6d>;
               };

               DSS_32kHz_clk@1120{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0xb>;
                  reg =<0x1120>;
               };

               DSS_48MHz_clk@1120{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x55>;
                  TI、bit-shift =<0x9>;
                  reg =<0x1120>;
                  相位=<0xfa>;
               };

               DSS_DSS_clk@1120{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x69>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1120>;
                  TI, set-rate-parent;
                  phandle =<0xf7>;
               };

               DSS_HDMI_clk@1120{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x6a>;
                  TI、bit-shift =<0xA>;
                  reg =<0x1120>;
                  phandle =<0xfb>;
               };

               dss_video1_clk@1120{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x6b>;
                  TI、bit-shift =<0xc>;
                  reg =<0x1120>;
                  phandle =<0xf8>;
               };

               dss_video2_clk@1120{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x6c>;
                  TI、bit-shift =<0xd>;
                  reg =<0x1120>;
               };

               GPIO2_dbclk@1760{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1760>;
               };

               GPIO3_dbclk@1768{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1768>;
               };

               GPIO4_dbclk@1770{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1770>;
               };

               GPIO5_dbclk@1778{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1778>;
               };

               GPIO6_dbclk@1780{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1780>;
               };

               GPIO7_dbclk@1810{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1810>;
               };

               GPIO8_dbclk@1818{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1818>;
               };

               mmc1_clk32k@1328{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1328>;
               };

               mmc2_clk32k@1330{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1330>;
               };

               mmc3_clk32k@1820{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1820(2008);
               };

               MMC4_clk32k@1828{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1828>;
               };

               SATA_ref_clk@1388{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0xF>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1388>;
                  phandle =<0xc8>;
               };

               USB_OTG_SS1_refclk960m@13f0{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x6d>;
                  TI、bit-shift =<0x8>;
                  reg =<0x13f0>;
                  phandle =<0xd2>;
               };

               USB_OTG_SS2_refclk960m@1340{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x6d>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1340>;
                  phandle =<0xd5>;
               };

               USB_phy1_always_ON_clk32k@640{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x640>;
                  相位=<0xD1>;
               };

               USB_phy2_always_ON_clk32k@688{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x688>;
                  phandle =<0xd4>;
               };

               USB_phy3_always_ON_clk32k@698{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x698>;
                  phandle =<0xd6>;
               };

               atl_DPLL_clk_mux@c00{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4f 0x38 0x39 0x2e>;
                  TI、bit-shift =<0x18>;
                  reg =<0xc00>;
                  相位=<0x6f>;
               };

               atl_gfclk_mux@c00{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8 0x6e 0x6f>;
                  TI、bit-shift =<0x1a>;
                  reg =<0xc00>;
                  phandle =<0xe>;
               };

               RMII_50MHz_clk_mux@13d0{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x37 0x70>;
                  TI、bit-shift =<0x18>;
                  reg =<0x13d0>;
               };

               GMAC_RFT_clk_mux@13d0{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x38 0x39 0x6e 0x2e 0x8>;
                  TI、bit-shift =<0x19>;
                  reg =<0x13d0>;
                  相位=<0xf2>;
               };

               GPU_CORE_gclk_mux@1220{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x71 0x72 0x26>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1220>;
                  分配的时钟=<0x73>;
                  分配的时钟父级=<0x26>;
                  相位=<0x73>;
               };

               GPU_hyd_gclk_mux@1220{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x71 0x72 0x26>;
                  TI、bit-shift =<0x1a>;
                  reg =<0x1220>;
                  分配的时钟=<0x74>;
                  分配的时钟父级=<0x26>;
                  相位=<0x74>;
               };

               l3instr_ts_gclk_div@E50{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x75>;
                  TI、bit-shift =<0x18>;
                  reg =<0xe50>;
                  TI、分频器=<0x8 0x10 0x20>;
               };

               mcasp2_ahclkr_mux@1860{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x1c>;
                  reg =<0x1860>;
                  phandle =<0xe4>;
               };

               mcasp2_ahclkx_mux@1860{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1860>;
                  phandle =<0xe3>;
               };

               mcasp2_aux_gfclk_mux@1860{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1860>;
                  相位=<0xe2>;
               };

               mcasp3_ahclkx_mux@1868{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1868>;
                  相位=<0xe6>;
               };

               mcasp3_aux_gfclk_mux@1868{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1868>;
                  相位=<0xe5>;
               };

               mcasp4_ahclkx_mux@1898{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1898>;
                  phandle =<0xe8>;
               };

               mcasp4_aux_gfclk_mux@1898{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1898>;
                  phandle =<0xe7>;
               };

               mcasp5_ahclkx_mux@1878{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1878>;
                  相位=<0xEA>;
               };

               mcasp5_aux_gfclk_mux@1878{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1878>;
                  phandle =<0xe9>;
               };

               mcasp6_ahclkx_mux@1904{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1904>;
                  相位=<0xec>;
               };

               mcasp6_aux_gfclk_mux@1904{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1904>;
                  相位=<0xeb>;
               };

               mcasp7_ahclkx_mux@1908{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1908>;
                  相位=<0xe>;
               };

               mcasp7_aux_gfclk_mux@1908{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1908>;
                  phandle =<0xED>;
               };

               mcasp8_ahclkx_mux@1890{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x3c 0x3D 0x3E 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
                  TI、bit-shift =<0x16>;
                  reg =<0x1890>;
                  phandle =<0xf0>;
               };

               mcasp8_aux_gfclk_mux@1890{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4a 0x4b 0x4c 0x4d>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1890>;
                  相位=<0xef>;
               };

               mmc1_fclk_mux@1328{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x76 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1328>;
                  相位=<0x77>;
               };

               mmc1_fclk_div@1328{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x77>;
                  TI、bit-shift =<0x19>;
                  ti、max-div =<0x4>;
                  reg =<0x1328>;
                  TI、二进制索引功率;
               };

               mmc2_fclk_mux@1330{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x76 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1330>;
                  相位=<0x78>;
               };

               mmc2_fclk_div@1330{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x78>;
                  TI、bit-shift =<0x19>;
                  ti、max-div =<0x4>;
                  reg =<0x1330>;
                  TI、二进制索引功率;
               };

               mmc3_gfclk_mux@1820{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1820(2008);
                  相位=<0x79>;
               };

               mmc3_gfclk_div@1820{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x79>;
                  TI、bit-shift =<0x19>;
                  ti、max-div =<0x4>;
                  reg =<0x1820(2008);
                  TI、二进制索引功率;
               };

               MMC4_gfclk_mux@1828{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1828>;
                  phandle =<0x7a>;
               };

               MMC4_gfclk_div@1828{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x7a>;
                  TI、bit-shift =<0x19>;
                  ti、max-div =<0x4>;
                  reg =<0x1828>;
                  TI、二进制索引功率;
               };

               QSPI_gfclk_mux@1838{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x76 0x7B>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1838>;
                  phandle =<0x7c>;
               };

               QSPI_gfclk_div@1838{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x7c>;
                  TI、bit-shift =<0x19>;
                  ti、max-div =<0x4>;
                  reg =<0x1838>;
                  TI、二进制索引功率;
                  phandle =<0xc7>;
               };

               timer10_gfclk_mux@1728{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1728>;
               };

               timer11_gfclk_mux@1730{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1730>;
               };

               timer13_gfclk_mux@17c8{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x17c8>;
               };

               timer14_gfclk_mux@17d0{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x17d0>;
               };

               timer15_gfclk_mux@17d8{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x17d8>;
               };

               timer16_gfclk_mux@1830{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1830>;
               };

               timer2_gfclk_mux@1738{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1738>;
               };

               timer3_gfclk_mux@1740{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1740>;
               };

               timer4_gfclk_mux@1748{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1748>;
               };

               timer9_gfclk_mux@1750{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1750>;
               };

               uart1_gfclk_mux@1840{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1840>;
               };

               uart2_gfclk_mux@1848{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1848>;
               };

               uart3_gfclk_mux@1850{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1850>;
               };

               uart4_gfclk_mux@1858{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1858>;
               };

               uart5_gfclk_mux@1870{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1870>;
               };

               uart7_gfclk_mux@18d0{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x18d0>;
               };

               uart8_gfclk_mux@18e0{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x18e0>;
               };

               uart9_gfclk_mux@18e8{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x18e8>;
               };

               vip1_gclk_mux@1020{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8 0x7d>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1020>;
               };

               vip2_gclk_mux@1028{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8 0x7d>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1028>;
               };

               vip3_gclk_mux@1030{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8 0x7d>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1030>;
               };
            };

            时钟域{

               coreain_clkdm{
                  兼容="ti、clockdomain";
                  时钟=<0x63>;
               };
            };
         };
      };

      L4@4ae00000{
         兼容="ti、dra7-l4-wkup"、"简单总线";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         范围=<0x0 0x4ae00000 0x3f000>;

         计数器@4000{
            兼容="ti、omap-counter32k";
            reg =<0x4000 0x40>;
            ti、hwmds ="counter_32k";
         };

         PRM@6000{
            兼容="ti,dra7-prM";
            reg =<0x6000 0x3000>;
            中断=<0x0 0x6 0x4>;

            时钟{
               #address-cells =<0x1>;
               大小单元格=<0x0>;

               SYS_clkin1@110{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x7E 0x7f 0x80 0x81 0x82 0x83 0x84>;
                  reg =<0x110>;
                  TI、index-starts-at-one;
                  相位=<0xF>;
               };

               AAB_DPLL_SYS_clk_mux@118{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x43>;
                  reg =<0x118>;
                  相位=<0x85>;
               };

               Abe_DPLL_BYPASS_clk_mux@114{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x85 0x4f>;
                  reg =<0x114>;
                  相位=<0x11>;
               };

               Abe_DPLL_clk_mux@10c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x85 0x4f>;
                  reg =<0x10c>;
                  相位=<0x10>;
               };

               Abe_24m_fclk@11c{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x14>;
                  reg =<0x11c>;
                  TI、分频器=<0x8 0x10>;
                  相位=<0x3c>;
               };

               aess_fclk@178{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x86>;
                  reg =<0x178>;
                  ti、max-div =<0x2>;
                  相位=<0x87>;
               };

               Abe_giclk_div@174{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x87>;
                  reg =<0x174>;
                  ti、max-div =<0x2>;
                  相位=<0x50>;
               };

               Abe_LP_clk_div@1d8{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x14>;
                  reg =<0x1d8>;
                  TI、分频器=<0x10 0x20>;
                  phandle =<0xa6>;
               };

               Abe_sys_clk_div@120{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xF>;
                  reg =<0x120>;
                  ti、max-div =<0x2>;
                  相位=<0x3D>;
               };

               adc_gfclk_mux@1dc{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x43 0x4f>;
                  reg =<0x1dc>;
               };

               SYS_clk1_dclk_ddiv@1c8{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xF>;
                  ti、max-div =<0x40>;
                  reg =<0x1c8>;
                  TI、二进制索引功率;
                  相位=<0x8F>;
               };

               SYS_clk2_dclk_ddiv@1cc{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x43>;
                  ti、max-div =<0x40>;
                  reg =<0x1cc>;
                  TI、二进制索引功率;
                  相位=<0x90>;
               };

               per_Abe_x1_dclk_div@1bc{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x6e>;
                  ti、max-div =<0x40>;
                  reg =<0x1bc>;
                  TI、二进制索引功率;
                  相位=<0x91>;
               };

               dsp_gclk_div@18c{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x1f>;
                  ti、max-div =<0x40>;
                  reg =<0x18c>;
                  TI、二进制索引功率;
                  相位=<0x93>;
               };

               GPU dclk@1a0{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x26>;
                  ti、max-div =<0x40>;
                  reg =<0x1a0>;
                  TI、二进制索引功率;
                  相位=<0x95>;
               };

               EMIF_phy_dclk_div@190{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x88>;
                  ti、max-div =<0x40>;
                  reg =<0x190>;
                  TI、二进制索引功率;
                  相位=<0x97>;
               };

               GMAC_250m_dclk_div@19c{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x89>;
                  ti、max-div =<0x40>;
                  reg =<0x19c>;
                  TI、二进制索引功率;
                  phandle =<0x8a>;
               };

               GMAC_MAIN_clk{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0x8a>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
                  相位=<0xF1>;
               };

               l3init_480m_dlk_ddiv@1ac{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x66>;
                  ti、max-div =<0x40>;
                  reg =<0x1ac>;
                  TI、二进制索引功率;
                  相位=<0x9C>;
               };

               USB_OTG_dclk_div@184{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x8b>;
                  ti、max-div =<0x40>;
                  reg =<0x184>;
                  TI、二进制索引功率;
                  phandle =<0x9d>;
               };

               SATA_dclk_div@1C0{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xF>;
                  ti、max-div =<0x40>;
                  reg =<0x1c0>;
                  TI、二进制索引功率;
                  phandle =<0x9e>;
               };

               PCIe2_dclk_div@1b8{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x8c>;
                  ti、max-div =<0x40>;
                  reg =<0x1b8>;
                  TI、二进制索引功率;
                  相位=<0x9f>;
               };

               pcie dclk_ddiv@1B4{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x8d>;
                  ti、max-div =<0x40>;
                  reg =<0x1b4>;
                  TI、二进制索引功率;
                  phandle =<0xa0>;
               };

               EMU_dclk_div@194{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xF>;
                  ti、max-div =<0x40>;
                  reg =<0x194>;
                  TI、二进制索引功率;
                  phandle =<0xa1>;
               };

               SECURE_32k_dclk_div@1c4{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x8e>;
                  ti、max-div =<0x40>;
                  reg =<0x1c4>;
                  TI、二进制索引功率;
                  phandle =<0xa2>;
               };

               clkoutmux0_clk_mux@158{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8F 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x8a 0x98 0x99 0x9a 0x9b 0x9C 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3>;
                  reg =<0x158>;
                  相位=<0x54>;
               };

               clkoutmux1_clk_mux@15c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8F 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x8a 0x98 0x99 0x9a 0x9b 0x9C 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3>;
                  reg =<0x15c>;
               };

               clkoutmux2_clk_mux@160{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x8F 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x8a 0x98 0x99 0x9a 0x9b 0x9C 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3>;
                  reg =<0x160>;
                  相位=<0x67>;
               };

               custefuse sys_gfclk_div{
                  #clock-cells =<0x0>;
                  兼容="固定因子时钟";
                  时钟=<0xF>;
                  时钟多路复用=<0x1>;
                  clock-div =<0x2>;
               };

               EVE_CLK@180{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x32 0x35>;
                  reg =<0x180>;
               };

               HDMI_DPLL_clk_mux@164{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x43>;
                  reg =<0x164>;
                  相位=<0x6a>;
               };

               MLB_clk@134{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xa4>;
                  ti、max-div =<0x40>;
                  reg =<0x134>;
                  TI、二进制索引功率;
                  相位=<0x48>;
               };

               mlbp_clk@130{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xA5>;
                  ti、max-div =<0x40>;
                  reg =<0x130>;
                  TI、二进制索引功率;
                  相位=<0x49>;
               };

               per_Abe_x1_gfclk2_div@138{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0x6e>;
                  ti、max-div =<0x40>;
                  reg =<0x138>;
                  TI、二进制索引功率;
                  相位=<0x4a>;
               };

               Timer_sys_clk_div@144{
                  #clock-cells =<0x0>;
                  兼容="ti、分频器时钟";
                  时钟=<0xF>;
                  reg =<0x144>;
                  ti、max-div =<0x2>;
                  phandle =<0x4e>;
               };

               video_DPLL_clk_mux@168{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x43>;
                  reg =<0x168>;
                  phandle =<0x6b>;
               };

               VIDEO2_DPLL_clk_mux@16c{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x43>;
                  reg =<0x16c>;
                  phandle =<0x6c>;
               };

               wkupaON_iclk_mux@108{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0xa6>;
                  reg =<0x108>;
                  相位=<0x75>;
               };

               GPIO1_dbclk@1838{
                  #clock-cells =<0x0>;
                  兼容="ti、栅极时钟";
                  时钟=<0x4f>;
                  TI、bit-shift =<0x8>;
                  reg =<0x1838>;
               };

               Dcan1_sys_clk_mux@1888{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0xF 0x43>;
                  TI、bit-shift =<0x18>;
                  reg =<0x188>;
                  phandle =<0xf4>;
               };

               Timer1_gfclk_mux@1840{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x4e 0x4f 0x43 0x44 0x45 0x46 0x47 0x50 0x51 0x52 0x53>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1840>;
               };

               uart10_gfclk_mux@1880{
                  #clock-cells =<0x0>;
                  兼容="ti、mux-clock";
                  时钟=<0x55 0x56>;
                  TI、bit-shift =<0x18>;
                  reg =<0x1880>;
               };
            };

            时钟域{
            };
         };

         scm_conf@c000{
            兼容="SYSCON";
            reg =<0xc000 0x1000>;
            相位=<0x5>;
         };
      };

      AXI@0{
         兼容="简单总线";
         大小单元格=<0x1>;
         #address-cells =<0x1>;
         范围=<0x51000000 0x51000000 0x3000 0x0 0x20000000 0x10000000>;

         PCIe@51000000{
            兼容="ti、dra7-pcie";
            REG =<0x51000000 0x2000 0x51002000 0x14c 0x1000 0x2000>;
            reg-names ="RC_dbics"、"ti_conf"、"config";
            中断=<0x0 0xe8 0x4 0x0 0xe9 0x4>;
            #address-cells =<0x3>;
            大小单元格=<0x2>;
            DEVICE_TYPE ="PCI";
            范围=<0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x20013000 0x13000 0x0 0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x
            总线范围=<0x0 0xff>;
            #interrupt-cells =<0x1>;
            通道数=<0x1>;
            Linux、PCI 域=<0x0>;
            ti、hwmds ="pcie1";
            PHY =<0xa7>;
            PHY-names ="PCIe-phy0";
            中断映射屏蔽=<0x0 0x0 0x0 0x7>;
            中断映射=<0x0 0x0 0x0 0x0 0x1 0xa8 0x0 0x0 0x0 0x2 0xa8 0x2 0x0 0x0 0x3 0xa8 0x3 0x0 0x0 0x0 0x4 0xa8 0x4>;
            STATUS ="禁用";

            中断控制器{
               中断控制器;
               #address-cells =<0x0>;
               #interrupt-cells =<0x1>;
               phandle =<0xa8>;
            };
         };

         PCIe_EP@51000000{
            兼容="ti、dra7-pcie-ep";
            REG =<0x51000000 0x28 0x51002000 0x14c 0x51001000 0x28 0x1000 0x10000000>;
            reg-names ="ep_dbics"、"ti_conf"、"ep_dbics2"、"addr_space";
            中断=<0x0 0xe8 0x4>;
            通道数=<0x1>;
            Num-IB-windows =<0x4>;
            num-ob-windows =<0x10>;
            ti、hwmds ="pcie1";
            PHY =<0xa7>;
            PHY-names ="PCIe-phy0";
            TI、SYSCON-未对齐访问=<0xa9 0x14 0x2>;
            STATUS ="禁用";
         };
      };

      AXI@1{
         兼容="简单总线";
         大小单元格=<0x1>;
         #address-cells =<0x1>;
         范围=<0x51800000 0x51800000 0x3000 0x0 0x30000000 0x10000000>;
         STATUS ="禁用";

         PCIe@5180000{
            兼容="ti、dra7-pcie";
            REG =<0x51800000 0x2000 0x51802000 0x14c 0x1000 0x2000>;
            reg-names ="RC_dbics"、"ti_conf"、"config";
            中断=<0x0 0x163 0x4 0x0 0x164 0x4>;
            #address-cells =<0x3>;
            大小单元格=<0x2>;
            DEVICE_TYPE ="PCI";
            范围=<0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x30013000 0x13000 0x0 0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x
            总线范围=<0x0 0xff>;
            #interrupt-cells =<0x1>;
            通道数=<0x1>;
            Linux、PCI 域=<0x1>;
            ti、hwmds ="PCIe2";
            PHY =<0xAA>;
            PHY-names ="PCIe-phy0";
            中断映射屏蔽=<0x0 0x0 0x0 0x7>;
            中断映射=<0x0 0x0 0x0 0x0 0x1 0xAB 0x1 0x0 0x0 0x0 0x2 0xAB 0x2 0x0 0x0 0x3 0xAB 0x3 0x0 0x0 0x0 0x4 0xAB 0x4>;

            中断控制器{
               中断控制器;
               #address-cells =<0x0>;
               #interrupt-cells =<0x1>;
               phandle =<0xab>;
            };
         };
      };

      ocmcram@40300000{
         兼容="MMIO-SRAM";
         REG =<0x40300000 0x80000>;
         范围=<0x0 0x40300000 0x80000>;
         #address-cells =<0x1>;
         大小单元格=<0x1>;

         SRAM-hs@0{
            兼容="ti、secure-ram";
            reg =<0x0 0x0>;
         };
      };

      ocmcram@40400000{
         STATUS ="禁用";
         兼容="MMIO-SRAM";
         REG =<0x40400000 0x100000 >;
         范围=<0x0 0x40400000 0x100000 >;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
      };

      ocmcram@4050000{
         STATUS ="禁用";
         兼容="MMIO-SRAM";
         REG =<0x40500000 0x100000>;
         范围=<0x0 0x40500000 0x100000 >;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
      };

      带隙@4a0021e0{
         REG =<0x4a0021e0 0xc 0x4a00232c 0xc 0x4a002380 0x2C 0x4a0023c0 0x3c 0x4a002564 0x8 0x4a002574 0x50>;
         compatible ="ti,dra752-banddgap";
         中断=<0x0 0x79 0x4>;
         #thermo-sensor-cells =<0x1>;
         u-boot、dm-spl;
         相位=<0x101>;
      };

      DSP_SYSTEM@40d00000{
         兼容="SYSCON";
         reg =<0x40d00000 0x100>;
         phandle =<0xc6>;
      };

      padconf@4844a000{
         compatible ="ti,dra7-iodelay";
         reg =<0x4844a000 0xd1c>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         #pinctrl-cells =<0x2>;

         mmc1_iodelay_ddr50_conf{
            pinctrl-PIN-array =<0x618 0x24c 0x0 0x624 0x3e8 0x630 0x55f 0x63c 0x3e8 0x648 0x3e8 0x654 0x3e8 0x620 0x4ce 0x0 0x62c 0x0 0x644 0x38 0x0 0x628 0x4c 0x0 0x650 0x650 0x63c 0x0x0x0x0x0 0x650 0x6380 0x63c 0x0x0x0x0 0x63c 0x0x0x0x0 0x6380 0x0x0x0x0x0x0x0x0x0 0x650 0x63c 0x0x0x0 0x63c 0x0x0x0x0x0x0x0 0x6380 0x0 0x6380 0x658 0x0 0x0>;
            phandle =<0xbe>;
         };

         mmc1_iodelay_sdr104_rev10_conf{
            pinctrl-PIN-array =<0x620 0x230 0x16d 0x62c 0x0 0x0 0x638 0x1d 0x0 0x644 0x0 0x650 0x2F 0x0 0x65c 0x1E 0x0 0x628 0x7d 0x0 0x634 0x2b 0x0 0x640 0x1b1 0x0 0x64c 0x11f 0x0 0x658 0x15f>;
         };

         mmc1_iodelay_sdr104_rev20_conf{
            pinctrl-PIN-array =<0x620 0x208 0x140 0x62c 0x0 0x638 0x28 0x0 0x644 0x53 0x0 0x650 0x62 0x6A 0x65c 0x0 0x658 0x33 0x0 0x634 0x0 0x640 0x16b 0x0 0x64c 0xc7 0x0 0x628 0x111 0x0>;
            phandle =<0xc0>;
         };

         mmc2_iodelay_DDR_conf{
            pinctrl-PIN-ARRAY = 0x18c 0x0 0x0 0x1a4 0x77 0x0 0x1b0 0x0 0x1bc 0x12 0x0 0x1c8 0x37e 0x0 0x1d4 0x1E 0x0 0x1e0 0x0 0x1194 0x17 0x0 0x0 0x1f8 0x0 0x0 0x1c0 0x0x0x0x0x0x1d0 0x10x0x0x0x0x1d0 0x0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1d0 0x1e8 0x0 0x0 0x1F4 0x2b 0x0 0x200 0x0 0x368 0x0 0x0 0x190 0x0 0x0 0x1a8 0x0 0x0 0x1b4 0x0 0x0 0x1c0 0x0 0x0 0x1d8 0x0 0x0 0x0 0x0 0x1e4 0x0 0x0 0x0 0x1f0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x
            u-boot、dm-spl;
            phandle =<0xc5>;
         };

         mmc2_iodelay_hs200_rev10_conf{
            pinctrl-PIN-array =<0x194 0x96 0x5f 0x1ac 0xfa 0x0 0x1b8 0x7d 0x0 0x1c4 0x64 0x0 0x1d0 0x366 0x19f 0x1dc 0x1E 0x0 0x1e8 0xc8 0x1F4 0xc8 0x200 0x0 0x0 0x0 0x368 0x1d0 0x1c0 0x10x0x1d0 0x1c0 0x10x1c0 0x10x0x0x0x0x0x0x1d0 0x1d0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x1c0 0x 0x1f0 0x34f 0x0 0x1fc 0x24A 0x0 0x364 0x40f 0x0>;
         };

         mmc2_iodelay_hs200_rev20_conf{
            pinctrl-PIN-ARRAY = 0x194 0x11d 0x0 0x1ac 0xbd 0x0 0x1b8 0x0 0x78 0x1c4 0x46 0x1d0 0x2da 0x168 0x1dc 0x0 0x1e8 0x0 0x1F4 0x46 0x0 0x200 0x0 0x368 0x0 0x368 0x0x0x0x1d0 0x0x0x1d0 0x0x0x1d0 0x0x0x0x0x1d0 0x0x0x0x1d0 0x0x0x0x1e0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x1d0 0x1d0 0x1d0 0x1d0 0x1f0 0x65 0x0 0x1fc 0x0 0x0 0x364 0x168 0x0>;
            u-boot、dm-spl;
         };
      };

      DMA 控制器@4a056000{
         兼容="ti、omap4430-sdma";
         reg =<0x4a056000 0x1000>;
         中断=<0x0 0x7 0x4 0x0 0x8 0x4 0x0 0x9 0x4 0x0 0xA 0x4>;
         dma-cells =<0x1>;
         DMA 通道=<0x20>;
         DMA 请求=<0x7f>;
         phandle =<0xc>;
      };

      EDMA@43300000{
         兼容="ti、edma3-tpcc";
         ti、hwmds ="tpcc";
         REG =<0x43300000 0x100000>;
         reg-names ="EDMA3_cc";
         中断=<0x0 0x169 0x4 0x0 0x168 0x4 0x0 0x167 0x4>;
         中断名称="EDMA3_ccint"、"EDMA3_mperr"、"EDMA3_cerrint";
         DMA 请求=<0x40>;
         dma-cells =<0x2>;
         TI、tptcs =<0xac 0x7 0xAD 0x0>;
         phandle =<0xd>;
      };

      tptc@43400000{
         兼容="ti、edma3-tptc";
         ti、hwmonds ="tptc0";
         REG =<0x43400000 0x100000 >;
         中断=<0x0 0x172 0x4>;
         中断名称="EDMA3_tcertrint";
         相位=<0xac>;
      };

      tptc@43500000{
         兼容="ti、edma3-tptc";
         ti、hwmonds ="tptc1";
         REG =<0x43500000 0x100000>;
         中断=<0x0 0x173 0x4>;
         中断名称="EDMA3_tcertrint";
         phandle =<0xAD>;
      };

      GPIO@4ae10000{
         兼容="ti、OMAP4-GPIO";
         reg =<0x4ae10000 0x200>;
         中断=<0x0 0x18 0x4>;
         ti、hwmods ="gpio1";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
      };

      GPIO@48055000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x48055000 0x200>;
         中断=<0x0 0x19 0x4>;
         ti、hwmods ="gpio2";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
      };

      GPIO@48057000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x48057000 0x200>;
         中断=<0x0 0x1a 0x4>;
         ti、hwmds ="gpio3";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
      };

      GPIO@48059000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x48059000 0x200>;
         中断=<0x0 0x1b 0x4>;
         ti、hwmods ="gpio4";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
      };

      GPIO@4805b000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x4805b000 0x200>;
         中断=<0x0 0x1c 0x4>;
         ti、hwmds ="gpio5";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
      };

      GPIO@4805d000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x4805d000 0x200>;
         中断=<0x0 0x1d 0x4>;
         ti、hwmods ="gpio6";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
         phandle =<bbb8>;
      };

      GPIO@48051000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x48051000 0x200>;
         中断=<0x0 0x1E 0x4>;
         ti、hwmods ="gpio7";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
         u-boot、dm-spl;
         phandle =<b0>;
      };

      GPIO@48053000{
         兼容="ti、OMAP4-GPIO";
         REG =<0x48053000 0x200>;
         中断=<0x0 0x74 0x4>;
         ti、hwmods ="gpio8";
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         中断控制器;
         #interrupt-cells =<0x2>;
      };

      串行@4806a000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x4806a000 0x100>;
         中断扩展=<0x1 0x0 0x43 0x4 0xae 0x3e0>;
         ti、hwmods ="uart1";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
         DMA =<0xaf 0x31 0xaf 0x32>;
         dma-names ="TX"、"Rx";
         u-boot、dm-spl;
         REG-SHIFT =<0x2>;
      };

      序列号@4806c000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x4806c000 0x100>;
         中断=<0x0 0x44 0x4>;
         ti、hwmods ="uart2";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
         DMA =<0xaf 0x33 0xaf 0x34>;
         dma-names ="TX"、"Rx";
      };

      序列号@48020000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x48020000 0x100>;
         中断=<0x0 0x45 0x4>;
         ti、hwmods ="uart3";
         时钟频率=<0x2dc6c00>;
         状态="正常";
         DMA =<0xaf 0x35 0xaf 0x36>;
         dma-names ="TX"、"Rx";
         u-boot、dm-spl;
         REG-SHIFT =<0x2>;
      };

      串行@4806e000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x4806e000 0x100>;
         中断=<0x0 0x41 0x4>;
         ti、hwmods ="uart4";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
         DMA =<0xaf 0x37 0xaf 0x38>;
         dma-names ="TX"、"Rx";
      };

      序列号@48066000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x48066000 0x100>;
         中断=<0x0 0x64 0x4>;
         ti、hwmods ="uart5";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
         DMA =<0xaf 0x3f 0xaf 0x40>;
         dma-names ="TX"、"Rx";
      };

      序列号@48068000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x48068000 0x100>;
         中断=<0x0 0x65 0x4>;
         ti、hwmods ="uart6";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
         DMA =<0xaf 0x4f 0xaf 0x50>;
         dma-names ="TX"、"Rx";
      };

      串行@48420000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x48420000 0x100>;
         中断=<0x0 0xda 0x4>;
         ti、hwmods ="uart7";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
      };

      串行@48422000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x48422000 0x100>;
         中断=<0x0 0xdb 0x4>;
         ti、hwmods ="uart8";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
      };

      串行@48424000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         REG =<0x48424000 0x100>;
         中断=<0x0 0xdc 0x4>;
         ti、hwmods ="uart9";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
      };

      串行@4ae2b000{
         兼容="ti、dra742-UART"、"ti、OMAP4-UART";
         reg =<0x4ae2b000 0x100>;
         中断=<0x0 0xdd 0x4>;
         ti、hwmods ="uart10";
         时钟频率=<0x2dc6c00>;
         STATUS ="禁用";
      };

      邮箱@4a0f4000{
         兼容="ti、OMAP4-mailbox";
         reg =<0x4a0f4000 0x200>;
         中断=<0x0 0x15 0x4 0x0 0x87 0x4 0x0 0x86 0x4>;
         ti、hwmds ="mailbox1";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x3>;
         TI、mbox-num-FIFOs =<0x8>;
         STATUS ="禁用";
      };

      邮箱@4883a000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x4883a000 0x200>;
         中断=<0x0 0xED 0x4 0x0 0xee 0x4 0x0 0xef 0x4 0x0 0xf0 0x4>;
         ti、hwmods ="mailbox2";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@4883c000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x4883c000 0x200>;
         中断=<0x0 0xF1 0x4 0x0 0xF2 0x4 0x0 0xF3 0x4 0x0 0xf4 0x4>;
         ti、hwmods ="mailbox3";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@4883e000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x4883e000 0x200>;
         中断=<0x0 0xf5 0x4 0x0 0xf6 0x4 0x0 0xf7 0x4 0x0 0xf8 0x4>;
         ti、hwmods ="mailbox4";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@48840000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48840000 0x200>;
         中断=<0x0 0xf9 0x4 0x0 0xfa 0x4 0x0 0xfb 0x4 0x0 0xFC 0x4>;
         ti、hwmds ="mailbox5";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         状态="正常";

         mbox_ipu1_ipc3x{
            TI、mbox-TX =<0x6 0x2 0x2>;
            TI、mbox-Rx =<0x4 0x2 0x2>;
            状态="正常";
         };

         mbox_dsp1_ipc3x{
            TI、mbox-TX =<0x5 0x2 0x2>;
            TI、mbox-Rx =<0x1 0x2 0x2>;
            状态="正常";
         };
      };

      邮箱@48842000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48842000 0x200>;
         中断=<0x0 0xFD 0x4 0x0 0xFE 0x4 0x0 0xff 0x4 0x0 0x100 0x4>;
         ti、hwmonds ="mailbox6";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         状态="正常";

         mbox_ipu2_ipc3x{
            TI、mbox-TX =<0x6 0x2 0x2>;
            TI、mbox-Rx =<0x4 0x2 0x2>;
            状态="正常";
         };
      };

      邮箱@48844000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48844000 0x200>;
         中断=<0x0 0x101 0x4 0x0 0x102 0x4 0x0 0x103 0x4 0x0 0x104 0x4>;
         ti、hwmonds ="mailbox7";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@48846000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48846000 0x200>;
         中断=<0x0 0x105 0x4 0x0 0x106 0x4 0x0 0x107 0x4 0x0 0x108 0x4>;
         ti、hwmds ="mailbox8";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@4885e000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x4885e000 0x200>;
         中断=<0x0 0x109 0x4 0x0 0x10a 0x4 0x0 0x10b 0x4 0x0 0x10c 0x4>;
         ti、hwmonds ="mailbox9";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@48860000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48860000 0x200>;
         中断=<0x0 0x10d 0x4 0x0 0x10e 0x4 0x0 0x10f 0x4 0x0 0x110 0x4>;
         ti、hwmonds ="mailbox10";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@48862000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48862000 0x200>;
         中断=<0x0 0x111 0x4 0x0 0x112 0x4 0x0 0x113 0x4 0x0 0x114 0x4>;
         ti、hwmonds ="mailbox11";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@48864000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48864000 0x200>;
         中断=<0x0 0x115 0x4 0x0 0x116 0x4 0x0 0x117 0x4 0x0 0x118 0x4>;
         ti、hwmonds ="mailbox12";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      邮箱@48802000{
         兼容="ti、OMAP4-mailbox";
         REG =<0x48802000 0x200>;
         中断=<0x0 0x17b 0x4 0x0 0x17c 0x4 0x0 0x17d 0x4 0x0 0x17e 0x4>;
         ti、hwmonds ="mailbox13";
         mbox-cells =<0x1>;
         TI、mbox-num-users =<0x4>;
         TI、mbox-num-FIFOs =<0xc>;
         STATUS ="禁用";
      };

      计时器@4ae18000{
         兼容="ti、omap5430-timer";
         reg =<0x4ae18000 0x80>;
         中断=<0x0 0x20 0x4>;
         ti、hwmds ="Timer1";
         TI、计时器- alwon;
      };

      计时器@48032000{
         兼容="ti、omap5430-timer";
         REG =<0x48032000 0x80>;
         中断=<0x0 0x21 0x4>;
         ti、hwmds ="timer2";
      };

      计时器@48034000{
         兼容="ti、omap5430-timer";
         REG =<0x48034000 0x80>;
         中断=<0x0 0x22 0x4>;
         ti、hwmds ="timer3";
      };

      计时器@48036000{
         兼容="ti、omap5430-timer";
         REG =<0x48036000 0x80>;
         中断=<0x0 0x23 0x4>;
         ti、hwmds ="timer4";
      };

      计时器@48820000{
         兼容="ti、omap5430-timer";
         REG =<0x48820000 0x80>;
         中断=<0x0 0x24 0x4>;
         ti、hwmds ="timer5";
      };

      计时器@48822000{
         兼容="ti、omap5430-timer";
         REG =<0x48822000 0x80>;
         中断=<0x0 0x25 0x4>;
         ti、hwmds ="timer6";
      };

      计时器@48824000{
         兼容="ti、omap5430-timer";
         REG =<0x48824000 0x80>;
         中断=<0x0 0x26 0x4>;
         ti、hwmds ="timer7";
      };

      计时器@48826000{
         兼容="ti、omap5430-timer";
         REG =<0x48826000 0x80>;
         中断=<0x0 0x27 0x4>;
         ti、hwmds ="timer8";
      };

      计时器@4803e000{
         兼容="ti、omap5430-timer";
         REG =<0x4803e000 0x80>;
         中断=<0x0 0x28 0x4>;
         ti、hwmds ="timer9";
      };

      计时器@48086000{
         兼容="ti、omap5430-timer";
         REG =<0x48086000 0x80>;
         中断=<0x0 0x29 0x4>;
         ti、hwmds ="timer10";
      };

      计时器@48088000{
         兼容="ti、omap5430-timer";
         REG =<0x48088000 0x80>;
         中断=<0x0 0x2a 0x4>;
         ti、hwmds ="timer11";
      };

      计时器@4ae20000{
         兼容="ti、omap5430-timer";
         reg =<0x4ae20000 0x80>;
         中断=<0x0 0x5a 0x4>;
         ti、hwmds ="timer12";
         TI、计时器- alwon;
         TI,定时器安全;
      };

      计时器@48828000{
         兼容="ti、omap5430-timer";
         reg =<0x48828000 0x80>;
         中断=<0x0 0x153 0x4>;
         ti、hwmds ="timer13";
      };

      计时器@4882a000{
         兼容="ti、omap5430-timer";
         reg =<0x4882a000 0x80>;
         中断=<0x0 0x154 0x4>;
         ti、hwmds ="timer14";
      };

      计时器@4882c000{
         兼容="ti、omap5430-timer";
         reg =<0x4882c000 0x80>;
         中断=<0x0 0x155 0x4>;
         ti、hwmds ="timer15";
      };

      计时器@4882e000{
         兼容="ti、omap5430-timer";
         REG =<0x4882e000 0x80>;
         中断=<0x0 0x156 0x4>;
         ti、hwmds ="timer16";
      };

      WDT@4ae14000{
         兼容="ti、OMAP3-WDT";
         reg =<0x4ae14000 0x80>;
         中断=<0x0 0x4b 0x4>;
         ti、hwmods ="wd_timer2";
      };

      自旋锁@4a0f6000{
         兼容="ti,omAP4-hwspinlock";
         reg =<0x4a0f6000 0x1000>;
         ti、hwmods ="自旋锁";
         #hwlock-cells =<0x1>;
      };

      DMM@4e000000{
         兼容="ti、omap5-DMM";
         reg =<0x4e000000 0x800>;
         中断=<0x0 0x6c 0x4>;
         ti、hwmds ="DMM";
      };

      I2C@48070000{
         兼容="ti、OMAP4-i2c";
         REG =<0x48070000 0x100>;
         中断=<0x0 0x33 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmods ="i2c1";
         STATUS ="禁用";
         时钟频率=<0x61a80>;

         GPIO@20{
            兼容="NXP、pcf8575";
            reg =<0x20>;
            GPIO 控制器;
            #GPIO-cells =<0x2>;
            中断控制器;
            #interrupt-cells =<0x2>;
            interrupt-parent =<b0>;
            中断=<0x1f 0x2>;
         };

         GPIO@21{
            兼容="ti、pcf8575"、"NXP、pcf8575";
            reg =<0x21>;
            线路初始状态=<0x1408>;
            GPIO 控制器;
            #GPIO-cells =<0x2>;
            中断控制器;
            #interrupt-cells =<0x2>;
            interrupt-parent =<b0>;
            中断=<0x1f 0x2>;
            u-boot、i2c-offset-len =<0x0>;
            相位=<0x105>;
         };

         tlv320aic3106@19{
            #sound-di-cells =<0x0>;
            兼容="ti、tlv320aic3106";
            reg =<0x19>;
            ADC-SETTLE-ms =<0x28>;
            ai3x-micbias vg =<0x1>;
            状态="正常";
            AVDD-SUPPLY =<b1>;
            IOVdd-supply =<bb1>;
            DRVDD-SUPPLY =<b1>;
            DVDD-SUPPLY =<b2>;
            phandle =<0x10c>;
         };

         lp8733@60{
            兼容="ti、lp8733";
            reg =<0x60>;
            buck0-in-supply =<bbb3 >;
            buck1-in-supply =<bbb3 >;
            ldo0-in-supply =<bb4>;
            ldo1-in-supply =<bb4>;

            调节器{

               buck0{
                  电脑控制器名称="lp8733-buck0";
                  电脑控制器最小值微伏=<0xcf850>;
                  稳压器最大值微伏=<0x1312d0>;
                  稳压器常开;
                  稳压器启动;
               };

               buck1{
                  电脑控制器名称="lp8733-buck1";
                  电脑控制器最小值微伏=<0xcf850>;
                  稳压器最大值微伏=<0x1312d0>;
                  稳压器启动;
                  稳压器常开;
               };

               ldo0{
                  电脑控制器名称="lp8733-ldo0";
                  稳压器最小值微伏=<0x325aa0>;
                  稳压器最大值微伏=<0x325aa0>;
               };

               ldo1{
                  电脑控制器名称="lp8733-ldo1";
                  稳压器最小值微伏=<0x325aa0>;
                  稳压器最大值微伏=<0x325aa0>;
                  稳压器常开;
                  稳压器启动;
                  phandle =<0xd3>;
               };
            };
         };

         lp8732@61{
            兼容="ti、lp8732";
            reg =<0x61>;
            buck0-in-supply =<bbb3 >;
            buck1-in-supply =<bbb3 >;
            ldo0-in-supply =<bb3>;
            ldo1-in-supply=<bb3>;

            调节器{

               buck0{
                  电脑控制器名称="lp8732-buck0";
                  稳压器最小微伏=<0x1b7740>;
                  稳压器最大值微伏=<0x1b7740>;
                  稳压器常开;
                  稳压器启动;
                  相位=<0x10d>;
               };

               buck1{
                  电脑控制器名称="lp8732-buck1";
                  电脑控制器最小值微伏=<0x149970>;
                  电脑控制器最大值微伏=<0x149970>;
                  稳压器启动;
                  稳压器常开;
               };

               ldo0{
                  电脑控制器名称="lp8732-ldo0";
                  稳压器最小微伏=<0x1b7740>;
                  稳压器最大值微伏=<0x1b7740>;
                  稳压器启动;
                  稳压器常开;
                  phandle =<0xf9>;
               };

               ldo1{
                  电脑控制器名称="lp8732-ldo1";
                  稳压器最小微伏=<0x1b7740>;
                  稳压器最大值微伏=<0x1b7740>;
                  稳压器常开;
                  稳压器启动;
                  相位=<0xFC>;
               };
            };
         };
      };

      I2C@48072000{
         兼容="ti、OMAP4-i2c";
         REG =<0x48072000 0x100>;
         中断=<0x0 0x34 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmods ="i2c2";
         STATUS ="禁用";
      };

      I2C@48060000{
         兼容="ti、OMAP4-i2c";
         REG =<0x48060000 0x100>;
         中断=<0x0 0x38 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmods ="i2c3";
         STATUS ="禁用";
      };

      I2C@4807a000{
         兼容="ti、OMAP4-i2c";
         REG =<0x4807a000 0x100>;
         中断=<0x0 0x39 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmods ="i2c4";
         STATUS ="禁用";
      };

      I2C@4807c000{
         兼容="ti、OMAP4-i2c";
         REG =<0x4807c000 0x100>;
         中断=<0x0 0x37 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmods ="i2c5";
         STATUS ="禁用";
         时钟频率=<0x61a80>;

         pcf8575@26{
            兼容="ti、pcf8575"、"NXP、pcf8575";
            reg =<0x26>;
            GPIO 控制器;
            #GPIO-cells =<0x2>;
            线路初始状态=<0xfbb>;
            u-boot、i2c-offset-len =<0x0>;
            相位=<0x107>;

            P1{
               GPIO-hog;
               GPIO =<0x1 0x0>;
               输出低电平;
               line-name ="vin6_SEL_s0";
            };

            P0{
               GPIO-hog;
               GPIO =<0x0 0x1>;
               输出高电平;
               线路名称="PM_OE_n";
            };
         };
      };

      MMC@4809c000{
         兼容="ti、dra7-hsmmc"、"ti、omAP4-hsmmc";
         REG =<0x4809c000 0x400>;
         中断=<0x0 0x4e 0x4>;
         ti、hwmds ="mmc1";
         TI、双电压;
         TI,需要特殊重置;
         DMA =<0xaf 0x3D 0xaf 0x3E>;
         dma-names ="TX"、"Rx";
         STATUS ="禁用";
         pbias-supply =<bbb5>;
         最大频率=<bbbb71b000>;
         SD-UHS-SDDR104;
         SD-UHS-SDDR50;
         SD-UHS-ddr50;
         SD-UHS-SDDR25;
         SD-UHS-SDDR12;
         pinctrl-names ="默认值"、"hs"、"sdr12"、"sdr25"、"sdr50"、 "ddr50"、"sdr104";
         pinctrl-0 =<bb6>;
         VMMC-SUPPLY =<bb7>;
         总线宽度=<0x4>;
         CD-GPIOs=<bb8 0x1b 0x1>;
         pinctrl-1 =<bb9>;
         pinctrl-2 =<0xba>;
         pinctrl-3 =<0xbb>;
         pinctrl-4 =<bbc>;
         pinctrl-5 =<0xbd 0xbE>;
         pinctrl-6 =<bbf 0xc0>;
         vqmmc-supply =<0xc1>;
         u-boot、dm-spl;
      };

      MMC@480b4000{
         兼容="ti、dra7-hsmmc"、"ti、omAP4-hsmmc";
         REG =<0x480b4000 0x400>;
         中断=<0x0 0x51 0x4>;
         ti、hwmds ="mmc2";
         TI,需要特殊重置;
         DMA =<0xaf 0x2F 0xaf 0x30>;
         dma-names ="TX"、"Rx";
         状态="正常";
         最大频率=<0x5b8d800>;
         SD-UHS-SDDR25;
         SD-UHS-SDDR12;
         MMC-DDR-1_8v;
         总线宽度=<0x8>;
         TI、不可拆卸;
         NO-1-8-v;
         pinctrl-names ="默认值"、"hs"、"DDR_1_8v";
         pinctrl-0 =<0xC2>;
         pinctrl-1 =<0xc3>;
         pinctrl-2 =<0xc4 0xc5>;
         VMMC-SUPPLY =<b1>;
         vqmmc-supply =<bb1>;
         u-boot、dm-spl;
      };

      MMC@480ad000{
         兼容="ti、dra7-hsmmc"、"ti、omAP4-hsmmc";
         REG =<0x480ad000 0x400>;
         中断=<0x0 0x59 0x4>;
         ti、hwmds ="mmc3";
         TI,需要特殊重置;
         DMA =<0xaf 0x4d 0xaf 0x4e>;
         dma-names ="TX"、"Rx";
         STATUS ="禁用";
         最大频率=<0x3d09000>;
         SD-UHS-SDDR12;
         SD-UHS-SDDR25;
         SD-UHS-SDDR50;
      };

      MMC@480d1000{
         兼容="ti、dra7-hsmmc"、"ti、omAP4-hsmmc";
         REG =<0x480d1000 0x400>;
         中断=<0x0 0x5b 0x4>;
         ti、hwmds ="MMC4";
         TI,需要特殊重置;
         DMA =<0xaf 0x39 0xaf 0x3a>;
         dma-names ="TX"、"Rx";
         STATUS ="禁用";
         最大频率=<bbbb71b000>;
         SD-UHS-SDDR12;
         SD-UHS-SDDR25;
      };

      MMU@40d01000{
         兼容="ti、dra7-ds-iommu";
         reg =<0x40d01000 0x100>;
         中断=<0x0 0x17 0x4>;
         ti、hwmods ="mu0_dsp1";
         iommu-cells =<0x0>;
         TI、SYSCON-mutconfig =<0xc6 0x0>;
         STATUS ="禁用";
      };

      MMU@40d02000{
         兼容="ti、dra7-ds-iommu";
         reg =<0x40d02000 0x100>;
         中断=<0x0 0x91 0x4>;
         ti、hwmods ="mu1_dsp1";
         iommu-cells =<0x0>;
         TI、SYSCON-mutconfig =<0xc6 0x1>;
         STATUS ="禁用";
      };

      MMU@58882000{
         兼容="ti,dra7-iommu";
         REG =<0x58882000 0x100>;
         中断=<0x0 0x18b 0x4>;
         ti、hwmods ="MMU_ipu1";
         iommu-cells =<0x0>;
         ti、iommu-bus-err-back;
         STATUS ="禁用";
      };

      MMU@55082000{
         兼容="ti,dra7-iommu";
         REG =<0x55082000 0x100>;
         中断=<0x0 0x18c 0x4>;
         ti、hwmods ="MMU_ipu2";
         iommu-cells =<0x0>;
         ti、iommu-bus-err-back;
         STATUS ="禁用";
      };

      电脑控制器- ABB - MPU{
         兼容="ti、abb v3";
         电脑控制器名称="ABB_MPU";
         #address-cells =<0x0>;
         大小单元格=<0x0>;
         时钟=<0xF>;
         TI、稳定时间=<0x32>;
         TI、时钟周期=<0x10>;
         reg =<0x4ae07ddc 0x4 0x4ae07de0 0x4 0x4ae06014 0x4 0x4a003b20 0xc 0x4ae0c158 0x4>;
         reg-names ="setup-address"、"control-address"、"int-address"、"efuse-address"、"LDO-address";
         TI、tranxdo-status-mask =<0x80>;
         ti、ldovbb-overrid-mask =<0x400>;
         ti、ldovbb-Vset-mask =<0x1f>;
         TI、ABB_INFO =<0x102CA0 0x0 0x0 0x0 0x2000000 0x1f00000 0x11b340 0x0 0x4 0x0 0x2000000 0x1f00000 0x127690 0x0 0x0 0x0 0x2000000 0x1f00000>;
      };

      电脑控制器- ABB - ivahd{
         兼容="ti、abb v3";
         电脑控制器名称="ABB_ivahd";
         #address-cells =<0x0>;
         大小单元格=<0x0>;
         时钟=<0xF>;
         TI、稳定时间=<0x32>;
         TI、时钟周期=<0x10>;
         REG =<0x4ae07e34 0x4 0x4ae07e24 0x4 0x4ae06010 0x4 0x4a0025cc 0xc 0x4a002470 0x4>;
         reg-names ="setup-address"、"control-address"、"int-address"、"efuse-address"、"LDO-address";
         TI、tranxdo-status-mask =<0x40000000>;
         ti、ldovbb-overrid-mask =<0x400>;
         ti、ldovbb-Vset-mask =<0x1f>;
         TI、ABB_INFO =<0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x118c30 0x0 0x4 0x0 0x2000000 0x1f00000 0x1312d0 0x8 0x0 0x2000000 0x1f00000>;
      };

      电脑控制器- ABB -速度{
         兼容="ti、abb v3";
         电脑控制器名称="aba_dspeve";
         #address-cells =<0x0>;
         大小单元格=<0x0>;
         时钟=<0xF>;
         TI、稳定时间=<0x32>;
         TI、时钟周期=<0x10>;
         reg =<0x4ae07e30 0x4 0x4ae07e20 0x4 0x4ae06010 0x4 0x4a0025e0 0xc 0x4a00246c 0x4>;
         reg-names ="setup-address"、"control-address"、"int-address"、"efuse-address"、"LDO-address";
         TI、tranxdo-status-mask =<0x20000000>;
         ti、ldovbb-overrid-mask =<0x400>;
         ti、ldovbb-Vset-mask =<0x1f>;
         TI、ABB_INFO =<0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x118c30 0x0 0x4 0x0 0x2000000 0x1f00000 0x1312d0 0x8 0x0 0x2000000 0x1f00000>;
      };

      电脑控制器- ABB - GPU{
         兼容="ti、abb v3";
         电脑控制器名称="ABB_GPU";
         #address-cells =<0x0>;
         大小单元格=<0x0>;
         时钟=<0xF>;
         TI、稳定时间=<0x32>;
         TI、时钟周期=<0x10>;
         reg =<0x4ae07de4 0x4 0x4ae07de8 0x4 0x4ae06010 0x4 0x4a003b08 0xc 0x4ae0c154 0x4>;
         reg-names ="setup-address"、"control-address"、"int-address"、"efuse-address"、"LDO-address";
         TI、tranxdo-status-mask =<0x10000000>;
         ti、ldovbb-overrid-mask =<0x400>;
         ti、ldovbb-Vset-mask =<0x1f>;
         TI、ABB_INFO =<0x10a1d0 0x0 0x0 0x0 0x2000000 0x1f00000 0x127690 0x0 0x4 0x0 0x2000000 0x1f00000 0x138800 0x0 0x8 0x0 0x2000000 0x1f00000>;
      };

      SPI@48098000{
         兼容="ti、omAP4-mcspi";
         REG =<0x48098000 0x200>;
         中断=<0x0 0x3c 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmids ="mcspi1";
         TI、SPI-num-cs =<0x4>;
         DMA =<0xaf 0x23 0xaf 0x24 0xaf 0x25 0xaf 0x26 0xaf 0x27 0xaf 0x28 0xaf 0x29 0xaf 0x2a>;
         dma-names ="tx0"、"rx0"、"tx1"、"rx1"、"tx2"、 "rx2"、"TX3"、"rx3";
         状态="正常";
         TI、pidd-d0-out-d1-in;
      };

      SPI@4809a000{
         兼容="ti、omAP4-mcspi";
         REG =<0x4809a000 0x200>;
         中断=<0x0 0x3D 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmids ="mcspi2";
         TI、SPI-num-cs =<0x2>;
         DMA =<0xaf 0x2b 0xaf 0x2C 0xaf 0x2D 0xaf 0x2e>;
         dma-names ="tx0"、"rx0"、"tx1"、"rx1";
         状态="正常";
      };

      SPI@480b8000{
         兼容="ti、omAP4-mcspi";
         reg =<0x480b8000 0x200>;
         中断=<0x0 0x56 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmids ="mcspi3";
         TI、SPI-num-cs =<0x2>;
         DMA =<0xaf 0xF 0xaf 0x10>;
         dma-names ="tx0"、"rx0";
         状态="正常";
      };

      SPI@480ba000{
         兼容="ti、omAP4-mcspi";
         reg =<0x480ba000 0x200>;
         中断=<0x0 0x2b 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmids ="mcspi4";
         TI、SPI-num-cs =<0x1>;
         DMA =<0xaf 0x46 0xaf 0x47>;
         dma-names ="tx0"、"rx0";
         状态="正常";
      };

      QSPI@4b300000{
         兼容="ti、dra7xxx-QSPI";
         REG =<0x4b300000 0x100 0x5c000000 0x4000000>;
         reg-names ="QSPI_base"、"QSPI_mmap";
         SYSCON-芯 片选择=<0x7 0x558>;
         #address-cells =<0x1>;
         大小单元格=<0x0>;
         ti、hwmds ="qspi";
         时钟=<0xc7>;
         时钟名称="Fck";
         Num-cs =<0x4>;
         中断=<0x0 0x157 0x4>;
         状态="正常";
         SPI-max-frequency =<0xe4e1c0>;
         u-boot、dm-spl;

         m25p80@0{
            兼容="SPI-FLASH";
            SPI-max-frequency =<0xe4e1c0>;
            reg =<0x0>;
            SPI-TX-bus-width =<0x1>;
            SPI-Rx-bus 宽度=<0x4>;
            #address-cells =<0x1>;
            大小单元格=<0x1>;
            u-boot、dm-spl;

            分区@0{
               标签="QSPI.SPL";
               reg =<0x0 0x10000>;
            };

            分区@1{
               标签="QSPI.SPL.Backup1";
               寄存器=<0x10000 0x10000>;
            };

            分区@2{
               标签="QSPI.SPL.Backup2";
               寄存器=<0x20000 0x10000>;
            };

            分区@3{
               标签="qspi.SPL.backup3";
               reg =<0x30000 0x10000>;
            };

            分区@4{
               标签="qspi.u-boot";
               REG =<0x40000 0x100000 >;
            };

            分区@5{
               label ="qspi.u-boot-spl-os";
               reg =<0x140000 0x80000>;
            };

            分区@6{
               label ="qspi.u-boot-env";
               reg =<0x1c0000 0x10000>;
            };

            分区@7{
               label ="qspi.u-boot-env.Backup1";
               reg =<0x1d0000 0x10000>;
            };

            分区@8{
               标签="qspi.kernel";
               REG =<0x1e0000 0x800000>;
            };

            分区@9{
               label ="qspi.file-system";
               reg =<0x9e0000 0x1620000>;
            };
         };
      };

      ocp2scp@4a090000{
         兼容="ti、omap-ocp2scp"、"简单总线";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         范围;
         reg =<0x4a090000 0x20>;
         ti、hwmonds ="ocp2scp3";

         PHY@4A096000{
            兼容="ti、phy-pipe3-SATA";
            REG =<0x4a096000 0x80 0x4a096400 0x64 0x4a096800 0x40>;
            寄存器名称="phy_Rx"、"phy_TX"、"PLL_Ctrl";
            SYSCON-phy-power =<0x7 0x374>;
            时钟=<0xF 0xc8>;
            时钟名称="SYSCLK"、"REFCLK";
            SYSCON-PLLRESET =<0x7 0x3fc>;
            #phy-cells =<0x0>;
            STATUS ="禁用";
            phandle =<0xd0>;
         };

         pciephy@4a094000{
            兼容="ti、phy-pipe3-PCIe";
            REG =<0x4a094000 0x80 0x4a094400 0x64>;
            reg-names ="phy_rx"、"phy_TX";
            SYSCON-phy-power =<0xc9 0x1c>;
            SYSCON-PCS =<0xc9 0x10>;
            时钟=<0x57 0x58 0xca 0xcb 0xcc 0x5c 0xF>;
            时钟名称="DPLL_ref"、"DPLL_ref_m2"、"wkupclk"、"REFCLK"、"div-clk"、 "PHY-DIV"、"SYSCLK";
            #phy-cells =<0x0>;
            phandle =<0xa7>;
         };

         pciephy@4a095000{
            兼容="ti、phy-pipe3-PCIe";
            REG =<0x4a095000 0x80 0x4a095400 0x64>;
            reg-names ="phy_rx"、"phy_TX";
            SYSCON-phy-power =<0xc9 0x20>;
            SYSCON-PCS =<0xc9 0x10>;
            时钟=<0x57 0x58 0xcd 0xce 0xCF 0x5c 0xF>;
            时钟名称="DPLL_ref"、"DPLL_ref_m2"、"wkupclk"、"REFCLK"、"div-clk"、 "PHY-DIV"、"SYSCLK";
            #phy-cells =<0x0>;
            STATUS ="禁用";
            相位=<0xAA>;
         };
      };

      SATA@4a141100{
         兼容="SNP、DWC-AHCI";
         REG =<0x4a140000 0x1100 0x4a141100 0x7>;
         中断=<0x0 0x31 0x4>;
         PHY =<0xd0>;
         PHY-names ="SATA-phy";
         时钟=<0xc8>;
         ti、hwmods ="SATA";
         端口实现=<0x1>;
         STATUS ="禁用";
      };

      RTC@48838000{
         兼容="ti、am3352-rtc";
         REG =<0x48838000 0x100>;
         中断=<0x0 0xd9 0x4 0x0 0xd9 0x4>;
         ti、hwmds ="rtcss";
         时钟=<0x4f>;
         STATUS ="禁用";
      };

      ocp2scp@4a080000{
         兼容="ti、omap-ocp2scp"、"简单总线";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         范围;
         reg =<0x4a080000 0x20>;
         ti、hwmonds ="ocp2scp1";

         PHY@4a084000{
            兼容="ti、dra7x-USB2"、"ti、OMAP-USB2";
            reg =<0x4a084000 0x400>;
            SYSCON-phy-power =<0x7 0x300>;
            时钟=<0xD1 0xd2>;
            时钟名称="wkupclk"、"REFCLK";
            #phy-cells =<0x0>;
            STATUS ="禁用";
            PHY-SUPPLY =<0xd3>;
            phandle =<0xd8>;
         };

         PHY@4a085000{
            兼容="ti、dra7x-USB2-phy2"、"ti、OMAP-USB2";
            reg =<0x4a085000 0x400>;
            SYSCON-phy-power =<0x7 0xe74>;
            时钟=<0xd4 0xd5>;
            时钟名称="wkupclk"、"REFCLK";
            #phy-cells =<0x0>;
            STATUS ="禁用";
            PHY-SUPPLY =<0xd3>;
            相位=<0xdb>;
         };

         PHY@4a084400{
            兼容="ti、OMAP-USB3";
            REG =<0x4a084400 0x80 0x4a084800 0x64 0x4a084c00 0x40>;
            寄存器名称="phy_Rx"、"phy_TX"、"PLL_Ctrl";
            SYSCON-phy-power =<0x7 0x370>;
            时钟=<0xd6 0xF 0xd2>;
            时钟名称="wkupclk"、"SYSCLK"、"REFCLK";
            #phy-cells =<0x0>;
            phandle =<0xd9>;
         };
      };

      omap_dwc3_1@48880000{
         兼容="ti、dwc3";
         TI、hwmonds ="USB_OTG_SS1";
         REG =<0x48880000 0x10000>;
         中断=<0x0 0x48 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         utmi-mode =<0x2>;
         范围;
         extcon =<0xd7>;
         STATUS ="禁用";

         USB@48890000{
            兼容="SNP、dwc3";
            REG =<0x48890000 0x17000>;
            中断=<0x0 0x47 0x4 0x0 0x47 0x4 0x0 0x48 0x4>;
            中断名称="外设"、"主机"、"OTG";
            PHY =<0xd8 0xd9>;
            PHY-names ="USB2-phy"、"USB3-phy";
            最大速度="超速";
            DR_MODE ="OTG";
            SNP、ds_u3_suspuhy_quirk;
            SNP、ds_u2_suspahy_quirk;
            extcon =<0xd7>;
            STATUS ="禁用";
         };
      };

      omap_dwc3_2@488c0000{
         兼容="ti、dwc3";
         TI、hwmonds ="USB_OTG_SS2";
         reg =<0x488c0000 0x10000>;
         中断=<0x0 0x57 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         utmi-mode =<0x2>;
         范围;
         extcon =<0xda>;

         USB@488d0000{
            兼容="SNP、dwc3";
            reg =<0x488d0000 0x17000>;
            中断=<0x0 0x49 0x4 0x0 0x49 0x4 0x0 0x57 0x4>;
            中断名称="外设"、"主机"、"OTG";
            PHY =<0xdb>;
            PHY-names ="USB2-phy";
            最大速度="高速";
            DR_MODE ="主机";
            SNP、ds_u3_suspuhy_quirk;
            SNP、ds_u2_suspahy_quirk;
            STATUS ="禁用";
         };
      };

      omap_dwc3_3@48900000{
         兼容="ti、dwc3";
         TI、hwmonds ="USB_OTG_SS3";
         REG =<0x48900000 0x10000>;
         中断=<0x0 0x158 0x4>;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         utmi-mode =<0x2>;
         范围;
         STATUS ="禁用";

         USB@48910000{
            兼容="SNP、dwc3";
            REG =<0x48910000 0x17000>;
            中断=<0x0 0x58 0x4 0x0 0x58 0x4 0x0 0x158 0x4>;
            中断名称="外设"、"主机"、"OTG";
            最大速度="高速";
            DR_MODE ="OTG";
            SNP、ds_u3_suspuhy_quirk;
            SNP、ds_u2_suspahy_quirk;
         };
      };

      Elm@48078000{
         兼容="ti、am3352-elm";
         REG =<0x48078000 0xfc0>;
         中断=<0x0 0x1 0x4>;
         ti、hwmds ="elm";
         STATUS ="禁用";
         phandle =<0xDE>;
      };

      GPMC@50000000{
         兼容="ti、am3352-gpmC";
         ti、hwmds ="gpmC";
         REG =<0x50000000 0x37c>;
         中断=<0x0 0xF 0x4>;
         DMA =<0xdc 0x4 0x0>;
         dma-names ="rxtx";
         GPMC、num-cs =<0x8>;
         GPMC、num-waitpins =<0x2>;
         #address-cells =<0x2>;
         大小单元格=<0x1>;
         中断控制器;
         #interrupt-cells =<0x2>;
         GPIO 控制器;
         #GPIO-cells =<0x2>;
         STATUS ="禁用";
         范围=<0x0 0x0 0x80000 0x1000000>;
         phandle =<0xdd>;

         NAND@0、0{
            兼容="ti、OMAP2-nand";
            reg =<0x0 0x0 0x4>;
            中断父级=<0xdd>;
            中断=<0x0 0x0 0x1 0x0>;
            RB-GPIO =<0xdd 0x0 0x0>;
            TI、nand-xfer-type ="预取 DMA ";
            TI、nand-ecc-opt ="bch8";
            TI、elm-id =<0xde>;
            NAND-BUS 宽度=<0x10>;
            GPMC、器件宽度=<0x2>;
            GPMC、SYNC-clk-ps =<0x0>;
            GPMC、cs-on-ns =<0x0>;
            GPMC、cs-rd -关闭-ns =<0x50>;
            GPMC、cs-wr-off-ns =<0x50>;
            GPMC、Adv-on-ns =<0x0>;
            GPMC、Ad-rd -关闭-ns =<0x3c>;
            GPMC、Adv-wr-off-ns =<0x3c>;
            GPMC、WE-ON-ns =<0xA>;
            GPMC、WE-OFF-ns =<0x32>;
            GPMC、OE-ON-ns =<0x4>;
            GPMC、OE-OFF-ns =<0x28>;
            GPMC、ACCESS ns =<0x28>;
            GPMC、wr 访问-ns =<0x50>;
            GPMC、第周期-ns =<0x50>;
            GPMC、功率周期-ns =<0x50>;
            GPMC、总线翻转-ns =<0x0>;
            GPMC、cycle2cycle-delay-ns =<0x0>;
            GPMC、clk-activation-ns =<0x0>;
            GPMC、wr-data-mux-bus-ns =<0x0>;
            #address-cells =<0x1>;
            大小单元格=<0x1>;

            分区@0{
               标签="NAND.SPL";
               寄存器=<0x0 0x20000>;
            };

            分区@1{
               标签="NAND.SPL.Backup1";
               寄存器=<0x20000 0x20000>;
            };

            分区@2{
               标签="NAND.SPL.Backup2";
               REG =<0x40000 0x20000 >;
            };

            分区@3{
               标签="NAND.SPL.backup3";
               reg =<0x60000 0x20000>;
            };

            分区@4{
               标签="NAND.u-boot-spl-os";
               REG =<0x80000 0x40000>;
            };

            分区@5{
               标签="NAND.u-BOOT";
               reg =<0xc0000 0x100000>;
            };

            分区@6{
               标签="NAND.u-boot-env";
               reg =<0x1c0000 0x20000>;
            };

            分区@7{
               标签="NAND.u-boot-env.Backup1";
               REG =<0x1e0000 0x20000>;
            };

            分区@8{
               标签="NAND.kernel";
               REG =<0x200000 0x800000>;
            };

            分区@9{
               标签="NAND.file-system";
               reg =<0xa00000 0xf600000>;
            };
         };
      };

      ATL@4843c000{
         兼容="ti,dra7-atl";
         reg =<0x4843c000 0x3ff>;
         ti、hwmods ="atl";
         TI、提供的时钟=<0x42 0x41 0x40 0x3f>;
         时钟=<0xe>;
         时钟名称="Fck";
         STATUS ="禁用";
         分配的时钟=<0x85 0xe 0x12 0x14 0x40>;
         分配的时钟父级=<0x43 0x6e>;
         分配的时钟速率=<0x0 0x0 0xac44000 0x15888000 0x562200>;

         atl2{
            BWS =<0x3>;
            AWS =<0x4>;
         };
      };

      McASP@48460000{
         兼容="ti、dra7-mcasp-audio";
         TI、hwmonds ="McASP1";
         REG =<0x48460000 0x2000 0x45800000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x68 0x4 0x0 0x67 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x81 0x1 0xdc 0x80 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xdf 0xe0 0xE1>;
         时钟名称="fck"、"ahclkx"、"ahclkr";
         STATUS ="禁用";
      };

      McASP@48464000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmonds ="mcasp2";
         REG =<0x48464000 0x2000 0x45c00000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x95 0x4 0x0 0x94 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x83 0x1 0xdc 0x82 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xe2 0xe3 0xe4>;
         时钟名称="fck"、"ahclkx"、"ahclkr";
         STATUS ="禁用";
      };

      McASP@48468000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmds ="mcasp3";
         REG =<0x48468000 0x2000 0x46000000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x97 0x4 0x0 0x96 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x85 0x1 0xdc 0x84 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xe5 0xe6>;
         时钟名称="fck"、"ahclkx";
         STATUS ="禁用";
         #sound-di-cells =<0x0>;
         分配的时钟=<0xe6>;
         分配的时钟父级=<0x40>;
         OP-MODE =<0x0>;
         TDM-SLOTS =<0x2>;
         serial-dir =<0x1 0x2 0x0 0x0>;
         TX-num-evt =<0x20>;
         Rx-num-evt =<0x20>;
         相位=<0x10b>;
      };

      McASP@4846c000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmds ="mcasp4";
         REG =<0x4846c000 0x2000 0x48436000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x99 0x4 0x0 0x98 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x87 0x1 0xdc 0x86 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xe7 0xe8>;
         时钟名称="fck"、"ahclkx";
         STATUS ="禁用";
      };

      McASP@48470000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmonds ="mcasp5";
         REG =<0x48470000 0x2000 0x4843a000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x9b 0x4 0x0 0x9a 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x89 0x1 0xdc 0x88 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xe9 0xEA>;
         时钟名称="fck"、"ahclkx";
         STATUS ="禁用";
      };

      McASP@48474000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmonds ="mcasp6";
         REG =<0x48474000 0x2000 0x4844c000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x9d 0x4 0x0 0x9C 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x8b 0x1 0xdc 0x8a 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xeb 0xec>;
         时钟名称="fck"、"ahclkx";
         STATUS ="禁用";
      };

      McASP@48478000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmds ="mcasp7";
         REG =<0x48478000 0x2000 0x48450000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x9f 0x4 0x0 0x9e 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x8d 0x1 0xdc 0x8c 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xED 0xe>;
         时钟名称="fck"、"ahclkx";
         STATUS ="禁用";
      };

      McASP@4847c000{
         兼容="ti、dra7-mcasp-audio";
         ti、hwmonds ="mcasp8";
         REG =<0x4847c000 0x2000 0x48454000 0x1000>;
         reg-names ="MPU"、"dat";
         中断=<0x0 0x1 0x4 0x0 0xa0 0x4>;
         中断名称="TX"、"RX";
         DMA =<0xdc 0x8F 0x1 0xdc 0x8e 0x1>;
         dma-names ="TX"、"Rx";
         时钟=<0xef 0xf0>;
         时钟名称="fck"、"ahclkx";
         STATUS ="禁用";
      };

      纵横制@4a002a48{
         兼容="ti、irq-crossbar";
         reg =<0x4a002a48 0x130>;
         中断控制器;
         中断父级=<0x6>;
         #interrupt-cells =<0x3>;
         TI、最大 IRQ =<0xa0>;
         ti、max-crossbar-sources=<0x190>;
         ti、reg-size =<0x2>;
         TI、IRQ 保留=<0x0 0x1 0x2 0x3 0x5 0x6 0x83 0x84>;
         TI、IRQ 跳过=<0xA 0x85 0x8b 0x8c>;
         TI、IRQ 安全映射=<0x0>;
         相位=<0x1>;
      };

      以太网@48484000{
         兼容="ti、dra7-cpsw"、"ti、cpsw";
         ti、hwmods ="GMAC";
         时钟=<0xF1 0xF2>;
         时钟名称="Fck、"CPT";
         cpdma_channels =<0x8>;
         ALE_ENINTERINS=<0x400>;
         bd_ram_size =<0x2000>;
         MAC_CONTROL =<0x20>;
         从机=<0x1>;
         ACTIVE_SLAVE =<0x0>;
         CPTs_clock_mult =<0x784cfe14>;
         CPTs_clock_shift =<0x1d>;
         REG =<0x48484000 0x1000 0x48485200 0x2e00>;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         TI、空闲;
         中断=<0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4 0x0 0x151 0x4>;
         范围;
         SYSCON =<0x7>;
         状态="正常";

         MDIO@48485000{
            兼容="ti、cpsw-mdio"、"ti、davinci_mdio";
            #address-cells =<0x1>;
            大小单元格=<0x0>;
            TI、hwmonds ="Davinci_mdio";
            bus_freq =<0xf4240>;
            REG =<0x48485000 0x100>;

            以太网 phy@0{
               reg =<0x0>;
               相位=<0xf3>;
            };
         };

         从属设备@48480200{
            MAC 地址=[00 00 00 00 00 00];
            PHY-Handle =<0xf3>;
            PHY 模式="MII";
            状态="正常";
         };

         从属设备@48480300{
            MAC 地址=[00 00 00 00 00 00];
            STATUS ="禁用";
         };

         cpsw-phy-SEL@4a002554{
            兼容="ti、dra7xx-cpsw-phy-SEL";
            reg =<0x4a002554 0x4>;
            reg-names ="gmii-SEL";
         };
      };

      CAN@481cc000{
         兼容="ti、dra7-d_CAN";
         ti、hwmods ="dcan1";
         reg =<0x4ae3c000 0x2000>;
         SYSCON-RAMINIT =<0x7 0x558 0x0>;
         中断=<0x0 0xDE 0x4>;
         时钟=<0xf4>;
         STATUS ="禁用";
         pinctrl-names ="default"、"sleep"、"active";
         pinctrl-0 =<0xf5>;
         pinctrl-1 =<0xf5>;
         pinctrl-2 =<0xf6>;
      };

      CAN@481d0000{
         兼容="ti、dra7-d_CAN";
         ti、hwmods ="dcan2";
         reg =<0x48480000 0x2000>;
         SYSCON-RAMINIT =<0x7 0x558 0x1>;
         中断=<0x0 0xe1 0x4>;
         时钟=<0xF>;
         STATUS ="禁用";
      };

      DSS@58000000{
         兼容="ti、dra7-dss";
         STATUS ="禁用";
         ti、hwmods ="dss_core";
         SYSCON-PLL-Ctrl =<0x7 0x538>;
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         范围;
         REG =<0x58000000 0x80 0x58004054 0x4 0x58004300 0x20>;
         reg-names ="DSS"、"pll1_clkctrl"、"pll1";
         时钟=<0xf7 0xf8>;
         时钟名称="Fck)、"video1_clk";
         VDDA_VIDEO_SUPPLY =<0xf9>;

         dispc@58001000{
            compatible ="ti,dra7-dispc";
            reg =<0x58001000 0x1000>;
            中断=<0x0 0x14 0x4>;
            ti、hwmods ="DSS_dispc";
            时钟=<0xf7>;
            时钟名称="Fck";
            SYSCON-POL =<0x7 0x534>;
         };

         编码器@58060000{
            兼容="ti、dra7-HDMI";
            REG =<0x58040000 0x200 0x58040200 0x80 0x58040300 0x80 0x58060000 0x19000>;
            reg-names ="wP"、"pll"、"phy"、"core";
            中断=<0x0 0x60 0x4>;
            STATUS ="禁用";
            ti、hwmods ="DSS_HDMI";
            时钟=<0xfa 0xfb>;
            时钟名称="fck"、"sys_clk";
            VDDA_VIDEO_SUPPLY =<0xFC>;

            端口{

               端点{
                  远程端点=<0xFD>;
                  相位=<0x108>;
               };
            };
         };
      };

      epwmss@4843e000{
         compatible ="ti、dra746-pwms"、"ti、am33xx-pwms";
         REG =<0x4843e000 0x30>;
         ti、hwmonds ="epwmss0";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         STATUS ="禁用";
         范围;

         PWM@4843e200{
            兼容="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
            #PWM-Cells =<0x3>;
            REG =<0x4843e200 0x80>;
            时钟=<0xFE 0x9>;
            时钟名称="TBCLK"、"fck";
            STATUS ="禁用";
         };

         ECAP@4843e100{
            兼容="ti、dra746-ECAP"、"ti、am3352-ECAP";
            #PWM-Cells =<0x3>;
            REG =<0x4843e100 0x80>;
            时钟=<0x9>;
            时钟名称="Fck";
            STATUS ="禁用";
         };
      };

      epwmss@48440000{
         compatible ="ti、dra746-pwms"、"ti、am33xx-pwms";
         REG =<0x48440000 0x30>;
         ti、hwmonds ="epwmss1";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         STATUS ="禁用";
         范围;

         PWM@48440200{
            兼容="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
            #PWM-Cells =<0x3>;
            reg =<0x48440200 0x80>;
            时钟=<0xff 0x9>;
            时钟名称="TBCLK"、"fck";
            STATUS ="禁用";
         };

         ECAP@48440100{
            兼容="ti、dra746-ECAP"、"ti、am3352-ECAP";
            #PWM-Cells =<0x3>;
            reg =<0x48440100 0x80>;
            时钟=<0x9>;
            时钟名称="Fck";
            STATUS ="禁用";
         };
      };

      epwmss@48442000{
         compatible ="ti、dra746-pwms"、"ti、am33xx-pwms";
         REG =<0x48442000 0x30>;
         ti、hwmonds ="epwmss2";
         #address-cells =<0x1>;
         大小单元格=<0x1>;
         STATUS ="禁用";
         范围;

         PWM@48442200{
            兼容="ti、dra746-ehrpwm"、"ti、am3352-ehrpwm";
            #PWM-Cells =<0x3>;
            REG =<0x48442200 0x80>;
            时钟=<0x100 0x9>;
            时钟名称="TBCLK"、"fck";
            STATUS ="禁用";
         };

         ECAP@48442100{
            兼容="ti、dra746-ECAP"、"ti、am3352-ECAP";
            #PWM-Cells =<0x3>;
            REG =<0x48442100 0x80>;
            时钟=<0x9>;
            时钟名称="Fck";
            STATUS ="禁用";
         };
      };

      AES@4b50000{
         兼容="ti、OMAP4-AES";
         ti、hwmods ="aes1";
         reg =<0x4b50000 0xa0>;
         中断=<0x0 0x50 0x4>;
         DMA =<0xdc 0x6f 0x0 0xdc 0x6e 0x0>;
         dma-names ="TX"、"Rx";
         时钟=<0x8>;
         时钟名称="Fck";
      };

      AES@4b700000{
         兼容="ti、OMAP4-AES";
         ti、hwmods ="aes2";
         reg =<0x4b700000 0xa0>;
         中断=<0x0 0x3b 0x4>;
         DMA =<0xdc 0x72 0x0 0xdc 0x71 0x0>;
         dma-names ="TX"、"Rx";
         时钟=<0x8>;
         时钟名称="Fck";
      };

      DES@480a5000{
         兼容="ti、OMAP4-DES";
         ti、hwmds ="des";
         reg =<0x480a5000 0xa0>;
         中断=<0x0 0x4d 0x4>;
         DMA =<0xaf 0x75 0xaf 0x74>;
         dma-names ="TX"、"Rx";
         时钟=<0x8>;
         时钟名称="Fck";
      };

      深@53100000{
         兼容="ti、omap5-sham";
         ti、hwmds ="sham";
         reg =<0x4b101000 0x300>;
         中断=<0x0 0x2e 0x4>;
         DMA =<0xdc 0x77 0x0>;
         dma-names ="rx";
         时钟=<0x8>;
         时钟名称="Fck";
      };

      RNG@48090000{
         兼容="ti、omAP4-rng";
         ti、hwmonds ="rng";
         REG =<0x48090000 0x2000>;
         中断=<0x0 0x2F 0x4>;
         时钟=<0x8>;
         时钟名称="Fck";
      };
   };

   散热区{

      CPU_Thermal{
         POLLINGE-DELAD-PASSIVE =<0xfa>;
         轮询延迟=<0x1F4>;
         热传感器=<0x101 0x0>;
         系数=<0x0 0x7d0>;

         行程{

            CPU_ALERT{
               温度=<0x186a0>;
               迟滞=<0x7d0>;
               类型="无源";
               相位=<0x102>;
            };

            cpu_crit{
               温度=<0x1d4c0>;
               迟滞=<0x7d0>;
               类型="严重";
            };
         };

         冷却映射{

            map0{
               TRIP =<0x102>;
               冷却设备= 0x103 0xffffffff 0xFFF>;
            };
         };
      };

      GPU 热性能{
         POLLINGE-DELAD-PASSIVE =<0xfa>;
         轮询延迟=<0x1F4>;
         热传感器=<0x101 0x1>;
         系数=<0x0 0x7d0>;

         行程{

            GPU crit{
               温度=<0x1e848>;
               迟滞=<0x7d0>;
               类型="严重";
            };
         };
      };

      core_thermal{
         POLLINGE-DELAD-PASSIVE =<0xfa>;
         轮询延迟=<0x1F4>;
         热传感器=<0x101 0x2>;
         系数=<0x0 0x7d0>;

         行程{

            core_crit{
               温度=<0x1e848>;
               迟滞=<0x7d0>;
               类型="严重";
            };
         };
      };

      dspeve_thermal{
         POLLINGE-DELAD-PASSIVE =<0xfa>;
         轮询延迟=<0x1F4>;
         热传感器=<0x101 0x3>;
         系数=<0x0 0x7d0>;

         行程{

            dspeve_crit{
               温度=<0x1e848>;
               迟滞=<0x7d0>;
               类型="严重";
            };
         };
      };

      IVA_热力{
         POLLINGE-DELAD-PASSIVE =<0xfa>;
         轮询延迟=<0x1F4>;
         热传感器=<0x101 0x4>;
         系数=<0x0 0x7d0>;

         行程{

            IVA_crit{
               温度=<0x1e848>;
               迟滞=<0x7d0>;
               类型="严重";
            };
         };
      };
   };

   PMU{
      兼容="arm、cortex-a15-PMU";
      中断父级=<0x6>;
      中断=<0x0 0x83 0x4>;
   };

   fixedreguler-evm12v0{
      兼容="稳压器固定";
      稳压器名称="EVM_12v0";
      reguler-min-microvolt =<bbbb71b00>;
      reguler-max-microvolt =<bbbbb71b00>;
      稳压器常开;
      稳压器启动;
      相位=<0x104>;
   };

   fixedreguler-evm5v0{
      兼容="稳压器固定";
      稳压器名称="EVM_5v0";
      稳压器最小值微伏=<0x4c4b40>;
      稳压器最大值微伏=<0x4c4b40>;
      VIN-电源=<0x104>;
      稳压器常开;
      稳压器启动;
      phandle =<bb4>;
   };

   fixedreguler-vsys3v3{
      兼容="稳压器固定";
      稳压器名称="vsys_3V3";
      稳压器最小值微伏=<0x325aa0>;
      稳压器最大值微伏=<0x325aa0>;
      VIN-电源=<0x104>;
      稳压器常开;
      稳压器启动;
      phandle =<bb3 >;
   };

   Fixedreguler-EVM_3V3{
      兼容="稳压器固定";
      稳压器名称="EVM_3V3";
      稳压器最小值微伏=<0x325aa0>;
      稳压器最大值微伏=<0x325aa0>;
      VIN-SUPPLY =<bb3>;
      稳压器常开;
      稳压器启动;
      phandle =<b1>;
   };

   Fixedreguler-AIC_DVDD{
      兼容="稳压器固定";
      电脑控制器名称="AIC_DVDD";
      VIN-SUPPLY =<b1>;
      稳压器最小微伏=<0x1b7740>;
      稳压器最大值微伏=<0x1b7740>;
      phandle =<bb2>;
   };

   fixedreguler-sd{
      兼容="稳压器固定";
      稳压器名称="EVM_3V3_SD";
      稳压器最小值微伏=<0x325aa0>;
      稳压器最大值微伏=<0x325aa0>;
      VIN-SUPPLY =<b1>;
      使能端高电平有效;
      GPIO =<0x105 0x5 0x0>;
      phandle =<bb7>;
   };

   extCON_USB1{
      兼容="linux、extcon-USB-GPIO";
      ID-GPIO =<0x105 0x1 0x0>;
      phandle =<0xd7>;
   };

   extcon_USB2{
      兼容="linux、extcon-USB-GPIO";
      ID-GPIO =<0x105 0x2 0x0>;
      相位=<0xda>;
   };

   接头{
      兼容="HDMI 连接器";
      标签="HDMI";
      类型=[61 00];

      端口{

         端点{
            远程端点=<0x106>;
            相位=<0x109>;
         };
      };
   };

   编码器{
      兼容="ti、tpd12s015";
      GPIO =<0x107 0x4 0x0 0x107 0x5 0x0 0xb0 0xc 0x0>;

      端口{
         #address-cells =<0x1>;
         大小单元格=<0x0>;

         端口@0{
            reg =<0x0>;

            端点{
               远程端点=<0x108>;
               phandle =<0xFD>;
            };
         };

         端口@1{
            reg =<0x1>;

            端点{
               远程端点= 0x109>;
               相位=<0x106>;
            };
         };
      };
   };

   Sound0{
      兼容="简单音频卡";
      simple-audio-card、name ="DRA7xx-evm";
      简单音频卡、小工具="耳机"、"耳机插孔"、"线路"、"线路输出"、"麦克风"、 "MIC 插孔"、"线路"、"线路输入";
      简单音频卡、路由="耳机插孔"、"HPLOUT"、"耳机插孔"、"HPROUT"、"线路输出"、 "LLOut"、"线路输出"、"RLOUT"、"MIC3L"、"Mic Jack"、 "MIC3R"、"Mic Jack"、"Mic Jack"、"Mic Bias"、"LINE1L"、 "线路输入"、"LINE1R"、"线路输入";
      simple-audio-card、format ="DSP_b";
      simple-audio-card、bitclock-master =<0x10a>;
      simple-audio-card、frame-master =<0x10a>;
      简单音频卡、位时钟反转;

      简单音频卡、CPU{
         sound-dai =<0x10b>;
         系统时钟频率=<0x562200>;
         相位=<0x10a>;
      };

      简单音频卡、编解码器{
         sound-dai =<0x10c>;
         时钟=<0x40>;
      };
   };

   内存{
      DEVICE_TYPE ="存储器";
      REG =<0x0 0x8000000000 0x0 0x20000000>;
   };

   GPIO-reguler-TPS74801{
      兼容="稳压器-GPIO";
      电脑控制器名称="vddshv8";
      稳压器最小微伏=<0x1b7740>;
      稳压器最大值微伏=<0x2dc6c0>;
      稳压器启动;
      VIN-SUPPLY =<bb4>;
      GPIOs =<b00xb 0x0>;
      状态=<0x1b7740 0x0 0x2dc6c0 0x1>;
      phandle =<0xc1>;
   };

   fixedreguler-evm_1v8{
      兼容="稳压器固定";
      稳压器名称="EVM_1v8";
      稳压器最小微伏=<0x1b7740>;
      稳压器最大值微伏=<0x1b7740>;
      VIN-SUPPLY =<0x10d>;
      稳压器常开;
      稳压器启动;
   };

   GPIO-POWEROFF{
      兼容="GPIO-POWEROFF";
      GPIOs =<b00x1E 0x0>;
      输入;
   };
};

CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_common_CMD_OPTIONs=y
CONFIG_SYS_malloc_F_LEN=0x2000
CONFIG_OMAP54XX=y
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_DRA7_DSPEVE_OPP_HIGH_y
CONFIG_DRA7_IVA_OPP_HIGH_y
CONFIG_DRA7_GPU_OPP_HIGH_y
CONFIG_SPL_SPI_FLASH_support=y
CONFIG_SPL_SPI_SUPPT=y
CONFIG_ARMV7_LPAE=y
CONFIG_DEFAULT_DEVICE_TREG="dra71-EVM"
CONFIG_AHCI=y
# CONFIG_SPL_LOAD_FIT = y
CONFIG_of_Board_Setup=y
CONFIG_USE_bootargs=y
CONFIG_Bootargets="androidboot.serialno=${serial#} console=ttyS0、115200 androidboot.console=ttyS0和 roidboot.hardware=jacinto6evmboard"
CONFIG_SYS_CONSOLE_INFO_SALET=y
CONFIG_VERSION_variable = y
CONFIG_Board_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_SYS_malloc_simple=y
CONFIG_SPL_SARE_BSS=y
CONFIG_SPL_DMA_support=y
CONFIG_SPL_OS_BOOT=y
CONFIG_hush_parser=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE = 0x2F000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV_1.
CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH 未设置
CONFIG_CMD_NANN=y
未设置# CONFIG_CMD_SETEXPR
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k (NAND.SPL)、128k (NAND.SPL.Backup1)、128k (NAND.NANT.Backup2)、128k (NAND.SPL.Backup3)、256k (NAND.u-boot-spl)、1m (NANNAND.NAND-NAND.NAND-1r)、128k (NAND-NAND-1r)、128k (NAND-Boot (NAND-1r)、ENU.v-boot.v-1r)、128k (NAND-1r)、END-1r (END-1r (EN-
CONFIG_ISO_PARTITION = y
CONFIG_of_control=y
CONFIG_SPL_of_control=y
CONFIG_ON_LIST="dra71-EVM"
CONFIG_SPL_MULTI_DTB_FIT = y
CONFIG_SPL_MULTI_dtb_fit_uncompress_SZ=0xA000
CONFIG_OL_SPL_REMOVE_PROps="时钟时钟名称中断父级"
CONFIG_ENV_IS _IN_SPI_FLASH=y
CONFIG_QSPI_BOOT=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_of_translate=y
CONFIG_DWC_AHCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y
CONFIG_PCF8575_GPIO=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_IO_VOLTAGE = y
CONFIG_MMC_UHS_SUPPING_y
CONFIG_MMC_HS200_support=y
CONFIG_SPL_MMC_HS200_support=y
CONFIG_MMC_OMAP-Hs=y
CONFIG_NAN=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT = y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_bar=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PHY_GigE=y
CONFIG_PHY=y
CONFIG_SPL_PHY=y
CONFIG_PIPE3_PHY=y
CONFIG_OMAP_USB2_PHY=y
CONFIG_PMIC_PALMPSA=y
CONFIG_PMIC_LP873X=y
CONFIG_DM_Regulator 固定= y
CONFIG_DM_Regulator GPIO=y
CONFIG_DM_Regulator Palmas=y
CONFIG_DM_电脑 控制器_LP873X=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_TI_QSPI=y
CONFIG_TIMER = y
CONFIG_OMAP-TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCCI_HCD=y
CONFIG_USB_XHCCI_DWC3=y
CONFIG_USB_XHCI_DRA7XX_index=1
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_Gadget=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_PHY_OMAP=y
CONFIG_USB_STORAGE=y
CONFIG_USB_Gadget=y
CONFIG_USB_Gadget_manufacturer="德州仪器"
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
CONFIG_USB_HOST_ETE=y
CONFIG_USB_ETH_ASIX=y
CONFIG_USB_ETH_ASIX88179=y
CONFIG_USB_ETH_LAN75XX=y
CONFIG_USB_ETH_LAN78XX=y
CONFIG_USB_ETH_MCS7830=y
CONFIG_USB_ETH_RTL8152=y
CONFIG_USB_ETH_SMSC95XX=y

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    您是否已连接到信号分析器以确认器件的 CS、CLK 和数据引脚是否正确?
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    你(们)好

    我连接了振荡器、没有看到任何信号。

    此致

    新罗

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    SPI 总线不同于 QSPI 总线。 您在 DTS 中定义的 SPI 总线由 McSPI 外设控制。 因此、您需要通过添加"CONFIG_OMAP3_SPI"来在 u-boot 中启用 McSPI 驱动程序。 您应该会看到在中生成的目标文件 /driver/spi/omap3_spi.o.
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    你(们)好

    我这么做了、但结果相同。 对于 x > 0、我会得到"无效总线 x (err=-19)"、但对于 x = 0、我猜 QSPI 在这里。

    此致

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    您要在 u-boot 中执行此测试吗?  如果是、是否严格要求您从 u-boot 使用这些 SPI 接口?  如果可能、我建议仅使用 u-boot 中所需的最小外设、并将精力集中在使用 Linux 中的 SPI 接口上。

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    嗯、有4个由 SPI 控制的外设:TPM、CPU EEPROM、LED、LCD 和温度传感器。 u-boot 很可能至少可以使用其中一个、即 EEPROM。

    新罗
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    怎么了?
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    将 SPI 与 u-boot 配合使用没有问题(据我所知)。 我试图避免首先在 u-boot 中调试它、其次在 Linux 中调试它。 只在 Linux 中执行它会更容易。 但是、如果您非常确定需要为 u-boot 提供 SPI 支持、则启动时不会出现问题。

    现在、我假设我们将讨论 u-boot SPI 支持。 您能否附加(而不是复制/粘贴)您的 u-boot .config 文件的最新版本? 作为附件搜索和阅读更容易、因此最好选择这种方式、而不是粘贴。 您是否添加了 Marcus 提到的 CONFIG_OMAP3_SPI?
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    很高兴听到这个!!

    是的、我在 dra7xx_EVM_defconfig 中添加了"CONFIG_OMAP3_SPI=y"。

    我尝试通过单击"插入文件"图标来附加文件、但在发送消息时出现错误。

    仅允许已知 URL 和以下文件扩展名:123、7z、AAC、ai、aii、aiff、 ART、ASF、asx、avi、bmp、 Config、CSD、Css、db、db、 dmg、doc、docx、drw、eml、 flac、flv、gif、gz、htm、 HTML、ICS、jpeg、jpg、log、 m4A、m4p、m4v、mdb、mdbx、 MID、Midi、MMV、MOV、MP3、 MP4、mpg、mpp、msg、ogg、 pdf、png、pps、ppt、pptx、 PS、PSD、qt、ram、rar、 rm、rtf、sit、sitx、sql、 swf、tif、tiff、txt、vcf、 VCS、wav、wma、wmv、wpd、 WPS、xls、xlsx、xml、zip、 TSC、TSM、IBS、DIFF、tar、 tar.gz、GEL、CCS、cpp、asm、 sa、c、cc、sch、ini、 CFG、cxx、s、asm、pjt、 VSD、sch、PCB、lib、cir、 McD、xmcdz、xmct、JMP、JSL、 DAT、BRD、VSM、h、USB。 请选择一个有效的文件或输入一个有效的 URL。

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    e2e.ti.com/.../dra7xx_5F00_evm_5F00_defconfig.cfg

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    谢谢。 这是有效的(正如使其配置.txt 一样)。 看起来不错。 接下来、您能否使用 MD 命令检查相关的 pinmux 寄存器? 我们需要验证您配置了正确的多路复用模式、还需要验证 SCLK 引脚和 MISO 引脚的 INPUTENABLE=1。
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    哦、还有一个与引脚映射相关的东西... 默认情况下、SPI 控制器假定 D0=MISO 和 D1=MOSI。 如果硬件以另一种方式连接、则需要在 mcspi 设备的设备树中添加以下条目:

    TI、pidd-d0-out-d1-in;

    我认为您的电路板可能是这种情况、因此请在器件树中仔细检查。
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    我也想到了另一件事。 这可能还不是问题、但最终需要确定。 您需要确定每个从器件需要哪种 SPI 模式(例如模式0、1、2、3)。 您可以在 DTS 中使用 spi-cpol 和 spi-cpha 指示符来指定正确的模式。
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    您好 Brad:

    问题似乎更早了。 U-boot 无法识别设备:

    => SF 探头1:0

    总线1无效(err=-19)

    此错误表示 ENODEV“无此类器件”。

    因此、我认为 SPI1器件应该在某个地方(可能在 DTS 中)进行验证。


    此致

    新罗

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    您好 Brad:

    我认为我通过在 DTS 中添加别名来解决了 ENODEV 错误:

       别名{
          SPI1 ="/ocp/spi@48098000";
          SPI2 ="/ocp/spi@4809a000";
          spi3 ="/ocp/spi@480b8000";
          SPI4 ="/ocp/spi@480ba000";
       };

    使用命令  

    => SSPI 1:1.0 16 ff00

    我可以通过振荡器看到:

          - CLK 信号似乎正常。

          D0处没有任何内容。

          D1处有奇怪的信号。

          —CS0变为低电平并保持较长的时间,而变为高电平。

          -CS1的行为似乎正常。

    此处随附了 u-boot、mux_data.h 和 DTS 的 pinmux 和 mcspi1寄存器。

    e2e.ti.com/.../bridge.dts.loge2e.ti.com/.../mux_5F00_data.h.loge2e.ti.com/.../u_2D00_boot_5F00_registers.log

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    您需要为 SCLK 设置 INPUTENABLE=1。

    {SPI1_SCLK、(M0 | PIN_OUTPUT)}、/* SPI1_SCLK/SPI1_SCLK *
    {SPI1_D1、(M0 | PIN_INPUT)}、/* SPI1_D1.SPI1_D1 *
    {SPI1_D0、(M0 | PIN_OUTPUT)}、/* SPI1_d0.SPI1_d0 *
    {SPI1_CS0、(M0 | PIN_OUTPUT)}、// SPI1_cs0.SPI1_cs0 *
    {SPI1_CS1、(M0 | PIN_OUTPUT)}、// SPI1_CS1.SPI1_CS1 *
    {SPI2_SCLK、(M0 | PIN_OUTPUT)}、/* SPI2_SCLK/SPI2_SCLK *

    我在上面以红色表示的部分应该是 PIN_INPUT。  虽然 TRM 的18.4.6.1焊盘配置部分对此进行了说明、但这并不是很明显。  以下是我所指的部分:

    以下信号需要使用 INPUTENABLE=1对 CTRL_CORE_PAD_x 进行编程以进行重定时
    目的:
    •mmc2_clk、mmc3_clk 和 MMC4_clk
    •GPMC_clk
    •i2cj_scl、其中 j=1-6
    •spim_SCLK、其中 m=1-4
    •mcaspi_aclkx、mcaspi_ahclkx 和 mcaspi_aclkr 信号、其中 i=1-8

    此外、您似乎需要在其他 SPI 定义中添加"ti,pwindir-d0-out-d1-in;"。

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    我应该在哪里对上述信号进行编程:dts、mux_data.h、...?
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    需要将 mux_data.h 的第388行从 PIN_OUTPUT 更改为 PIN_INPUT。 对于系统中使用的所有 SPI 端口、该文件中需要进行类似的更改。

    您的 DTS 中应存在"ti,pidd-d0-out-d1-in"调整。
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    如果我将 SPI1_SCLK 设置为 PIN_OUTPUT_PULLUP、我可以在振荡器中正确地看到时钟、数据输出和数据输入。

    有关此信号的一些注释:

    1.-即、使用"=>SSPI 1:0.0 8 88" --> SCLK=OK 大约10uec 但在400uec          CS0=OK 保持低                      电平 CS1=KO 在400uec     D0=OK       D1=OK 继续保持低电平 D1=OK D1=OK

    如果命令为"=>SSPI 1:1.0 8 88" --> SCLK=OK 持续大约10 μ s,但在400 μ s 内保持低电平   CS0=KO 持续400 μ s,  CS1=OK 保持低                           电平 D0=OK D1=OK D1=OK        D1=OK

    2--这意味着两个 CS 都被激活为低电平并且两个外设都为 TX 和 RX 激活。

    在本例中、一个外设是温度传感器(仅需要 D1)、另一个外设是 LED 控制器(仅需要 D0)。 但这种行为不正确。

    3.-我在控制台中得到的是"00"、即使是在振荡器处的数据也很好。

    新罗

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    Brad、
    我完全更改了引脚多路复用器配置(全部作为输入)、并且可以从温度传感器读取数据并写入 LED 控制器。
    但芯片选择 CS 的问题仍然存在。 两个 CS 同时激活、因此两个外设都被寻址。 CS 之间的唯一差异是保持低电平的时间。 应激活的一个在正确的时间段内保持低电平、另一个保持在500微秒以上。
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    我建议进行 PIN_INPUT 或 PIN_INPUT_PULLUP。  "输入"或"输出"指定仅影响 INPUTENABLE 位的配置方式。  在"输出"情况下、INPUTENABLE=0。  在"输入"情况下、INPUTENABLE=1。  TRM 指出、应为 SPI1_SCLK 配置 INPUTENABLE=1。  (这只是为了完全遵守 TRM 建议、但不会解决您提到的问题。)

    那么、您现在看到的主要问题是芯片选择行为错误吗?  我忘记了这种行为。  这是 u-boot 问题。  请查看此帖子和附加的补丁:

    https://e2e.ti.com/support/processors/f/791/p/573024/2114837#2114837

    下面是另一个主题、我在其中对发生的情况进行了一些解释、客户提出了一个稍微不同的解决方案:

    https://e2e.ti.com/support/processors/f/791/t/477058

    Linux 驱动程序处理这一问题要好得多、因此根据我之前的评论、如果 SPI 可以等待 Linux 启动、这将会更容易、更稳健。

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    Brad、

    我应用了补丁、它适用于 SPI1。

    SPI2、SPI3和 SPI4的情况是 、它们在我运行命令后挂起并且信号(振荡器)中没有活动:

    => SSPI 2:0 8 88

    => SSPI 3:0 8 88

    => SSPI 4:0 8 88

    如果我在没有 CS 参数的情况下运行命令、它们不会挂起、但信号中没有活动(振荡)

    => SSPI 2 8 88

    => SSPI 3 8 88

    => SSPI 4 8 88

    新罗

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    您描述的无活动问题是当没有针对 SCLK 引脚使用 INPUTENABLE=1时、我期望出现的问题类型。 您是否正确配置了它?
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    其余 SPI 具有相同的引脚多路复用器 configuration.e2e.ti.com/.../1614.mux_5F00_data.h.log

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    让我们暂时关注 SPI2 (任意选择)。  您能否再次使用 MD 命令、以便我们验证 padconf 寄存器(0x4A00 37C0和后面的3个字)是否已正确配置?  代码看起来正确、但我想验证寄存器。

    另请读取 CM_L4PER_MCSPI2_CLKCTRL (地址 0x4A00 97F8)的值。

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    e2e.ti.com/.../SPI2_5F00_boot_5F00_registers.log 

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    我看到 SPI2的内部时钟被禁用:

    => MD 0x4a0097f8
    4a0097f8:00030000

    我应该已经要求您检查从0x4a0097f0开始、因为 CM_L4PER_MCSPI1_CLKCTRL 寄存器位于该位置。 您能与该器件进行比较吗? 如果那个显示"已启用"、而 SPI2显示"已禁用"、那么我认为这是根本问题。 我本来希望状态="正常"会导致这个时钟被启用。
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    => MD 0x4a0097f0
    4a0097f8:00000002

    0x2:模块被显式启用
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    作为快速测试、您可以向地址4a0097f8写入值2。 请稍后再读回、以确保它"卡住"。 也许在您启用该时钟后尝试 SPI2。 我将开始挖掘代码、看看我是否能更好地理解这一点。
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    深入了解 u-boot 源代码、看起来可能不如 Linux 智能。  我认为在 DTS 中启用 mcspi2不足以启用时钟。  我认为您需要进行如下更改:

    diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/hw_data.c
    索引 aefb09c56c..80f5d7a9bb 100644
    -- a/arch/arm/mach-omap5/hw_data.c
    ++ b/arch/arm/mach-OMAP2/omap5/hw_data.c
    @@-492,6 +492,7 @@ void enable_basic_uboot_clocks (void)

    u32 const clk_modules_explicate_en_Essential []={
    (* prcm)->cm_l4per_mcspi1_clkctrl、
    +(* prcm)->cm_l4per_mcspi2_clkctrl、
    (* prcm)->cm_l4per_i2c2_clkctrl、
    (* prcm)->cm_l4per_i2c3_clkctrl、
    (* prcm)->cm_l4per_i2c4_clkctrl、

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。
    它适用于 SPI2、SPI3和 SPI4。
    现在、我们有通过 SPI 控制的不同器件:
    SPI1 --> LED 控制器和温度传感器
    SPI2 --> TPM
    SPI3 --> LCD
    SPI4 --> EEPROM。
    您对下一步的建议是什么?
    您认为迁移到 Linux 是否合适?
    如果是、管理这些设备的最佳方法是什么:
    -处理来自用户应用程序的通用 SPI,因此是应用程序本身通过简单的读/写命令管理器件
    -还是映射到更高级别的器件?
    第二个选项似乎有点复杂、因为我必须找到一个与我要映射的器件类似的器件。
  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    [引用用户="Jose Carlos Billalabeitia"]它适用于 SPI2、SPI3和 SPI4。

    很棒!  

    [引用用户="Jose Carlos Billalabeitia">您对下一步的建议是什么?
    您认为迁移到 Linux 是否合适?

    是的、我认为您应该进入 Linux。  您至少已经在 u-boot 中实现了基本通信、因此稍后您可以根据任何特定要求进行重新访问。  一般而言、我建议尽可能在 Linux 中保留。

    [引用 user="Jose Carlos Billalabeitia">如果是,管理这些设备的最佳方法是:
    -处理来自用户应用程序的通用 SPI,因此是应用程序本身通过简单的读/写命令管理器件
    -还是映射到更高级别的器件?
    第二个选项似乎有点复杂、因为我必须找到一个与我要映射的器件类似的器件。

    如果已经存在更高级别的器件驱动程序、那么利用它肯定是合理的。  从我的角度来看、为每个终端设备配备驱动程序是"正确的"做法。  我建议检查一下 Linux 中已经有多少可用、然后在您知道剩余的内容后重新评估。