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您好、TI 的前端
版本:
ti-processor-sdk-linux-j721s2-evm-08_06_00_10
TI-PROCESSOR-SDK-RTOS-j721s2-evm-08_06_00_11
调制:
SBL
错误日志:
root@j721s2-evm:~# [ 68.163894] ------------[ cut here ]------------ [ 68.168517] NETDEV WATCHDOG: eth0 (am65-cpsw-nuss): transmit queue 0 timed out [ 68.175762] WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:467 dev_watchdog+0x320/0x328 [ 68.184003] Modules linked in: bluetooth ecdh_generic ecc rfkill rpmsg_char crct10dif_ce phy_can_transceiver ti_k3_r5_remoteproc ti_k3_dsp_remoteproc sa2ul cdns_dsi wave5 virtio_rpmsg_bus pvrsrvkm(O) sha512_generic authenc v4l2_mem2mem videobuf2_dma_contig videobuf2_memops videobuf2_v4l2 videobuf2_common cdns_dphy m_can_platform m_can can_dev optee_rng rng_core sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6 [ 68.220208] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G O 5.10.162-g76b3e88d56 #7 [ 68.228708] Hardware name: Texas Instruments J721S2 EVM (DT) [ 68.234349] pstate: 20000005 (nzCv daif -PAN -UAO -TCO BTYPE=--) [ 68.240338] pc : dev_watchdog+0x320/0x328 [ 68.244332] lr : dev_watchdog+0x320/0x328 [ 68.248326] sp : ffff800010003db0 [ 68.251627] x29: ffff800010003db0 x28: ffff000002e39940 [ 68.256922] x27: 0000000000000004 x26: 0000000000000140 [ 68.262218] x25: 00000000ffffffff x24: 0000000000000000 [ 68.267513] x23: ffff000002e383dc x22: ffff000002e38000 [ 68.272809] x21: ffff000002e38480 x20: ffff800011197000 [ 68.278104] x19: 0000000000000000 x18: 0000000000000010 [ 68.283399] x17: 0000000000000000 x16: 0000000000000000 [ 68.288694] x15: ffff8000111a1f10 x14: 00000000000001d5 [ 68.293989] x13: ffff8000111a1f10 x12: 00000000ffffffea [ 68.299284] x11: ffff8000112205b0 x10: ffff800011208570 [ 68.304580] x9 : ffff8000112085c8 x8 : 0000000000017fe8 [ 68.309876] x7 : c0000000ffffefff x6 : 0000000000000003 [ 68.315171] x5 : 0000000000000000 x4 : 0000000000000000 [ 68.320466] x3 : 0000000000000100 x2 : 0000000000000100 [ 68.325761] x1 : 07fe66d061f82d00 x0 : 0000000000000000 [ 68.331056] Call trace: [ 68.333492] dev_watchdog+0x320/0x328 [ 68.337144] call_timer_fn.isra.0+0x24/0x80 [ 68.341312] run_timer_softirq+0x400/0x438 [ 68.345394] efi_header_end+0x120/0x268 [ 68.349216] irq_exit+0xc0/0xe0 [ 68.352345] __handle_domain_irq+0x68/0xc0 [ 68.356427] gic_handle_irq+0x58/0x128 [ 68.360160] el1_irq+0xcc/0x180 [ 68.363291] arch_cpu_idle+0x18/0x28 [ 68.366853] default_idle_call+0x20/0x68 [ 68.370762] do_idle+0xc0/0x128 [ 68.373889] cpu_startup_entry+0x28/0x60 [ 68.377797] rest_init+0xd4/0xe4 [ 68.381012] arch_call_rest_init+0x10/0x1c [ 68.385092] start_kernel+0x478/0x4b0 [ 68.388740] ---[ end trace aa61dc5ce5a7d431 ]--- [ 68.393353] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:7716 dql_avail:-38 free_desc:505 [ 74.051898] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:13600 dql_avail:-38 free_desc:505 [ 79.171898] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:18720 dql_avail:-38 free_desc:505 [ 85.059897] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:24608 dql_avail:-38 free_desc:505 [ 89.923899] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:29472 dql_avail:-38 free_desc:505 [ 95.043897] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:34592 dql_avail:-38 free_desc:505 [ 100.163897] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:39712 dql_avail:-38 free_desc:505
ETH0可以在 XPL 下执行 Ping 操作、但在 SBL 下无法执行 Ping 操作。
该版本的 SBL MCU_cpsw 是否已验证
谢谢
您好!
您能否共享完整的 Linux 终端日志?
此外、您能否确认、您是否对与 mcu_cpsw 相关的器件树文件进行了 Nay 更改、如果进行了更改、请向我们提供详细信息。
您是否能够尝试使用 SDK 的默认文件系统"tisdk-default-image-j721s2-evm.tar.xz"中/boot/中的器件树文件并进行一次检查。
此致、
苏德黑尔
您好,
1:DTS 中仅使用 diff 地址。
2:PORT_MODE_SEL 应为 RGMII 但为 RMII、那么我该如何配置 DTS?
3:Linux 日志
e2e.ti.com/.../ttyUSB0_5F00_2023_2D00_08_2D00_31_5F00_17_2D00_26_2D00_56.log
4:devmem2 0x40f04040 w 0x2、但已读取0x0000001
5:CONFIG_TI_CPSW_PHY_SEL 在默认 DTS 中禁用、因此我们将其打开并复制 u-boot DTS 关于 cpsw-phy-sel DTS。
谢谢
您好!
很抱歉延迟响应、我们将尝试使用 SBL 和组合的应用映像来引导 Linux (A72)+ MCU1_0 (IPC 回声测试) EVM。
很快就会更新状态。
此致、
苏德黑尔
您好!
核查情况如何,我们迫切需要切换到 SBL 发展模式;感谢您的理解。
谢谢
您好!
我们可以重现此问题、这是因为 CTRLMMR 寄存器默认为锁定状态。
在开发引导(SBL)或 SPL 的情况下、u-boot 会解锁所有 CTRLMMR 块、因此接口选择会反映在 ENET_CTRL 寄存器中。
如果是优化引导流程(SBL)、其中不存在 u-boot 但 SBL 加载 Linux 映像、没有人解锁 CTRL MMR 块、那么不会从 ENET_CTRL 选择 RGMII、因为寄存器已锁定。 (写入不会影响寄存器中的值)。
因此、即使在配置为 RGMII 的器件树接口中、您也会看到接口仍然是 RMII。
修复以上代码:
在 SBL 或 Linux 中解锁 CTRLMMR 寄存器。
请参考以下更改、并将补丁添加到 /pdk/packages/ti/boot/sbl/k3/sbl_main.c 中、我们将从 SBL 中解锁所有 CTRLMMR。
+#define WKUP_CTRL_MMR0_BASE 0x43000000 +#define MCU_CTRL_MMR0_BASE 0x40f00000 +#define CTRL_MMR0_BASE 0x00100000 +/* + * The CTRL_MMR0 memory space is divided into several equally-spaced + * partitions, so defining the partition size allows us to determine + * register addresses common to those partitions. +*/ +#define CTRL_MMR0_PARTITION_SIZE 0x4000 +/* + * CTRL_MMR0, WKUP_CTRL_MMR0, and MCU_CTRL_MMR0 lock/kick-mechanism + * shared register definitions. The same registers are also used for + * PADCFG_MMR lock/kick-mechanism. +*/ +#define CTRLMMR_LOCK_KICK0 0x1008 +#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490 +#define CTRLMMR_LOCK_KICK1 0x100c +#define CTRLMMR_LOCK_KICK1_UNLOCK_VAL 0xd172bc5a +void CTRL_MMR_unlock(volatile uint32_t baseAddr, uint32_t partition) +{ + /* Get the part base address */ + uint32_t partBaseAddr = baseAddr + (partition * CTRL_MMR0_PARTITION_SIZE); + + /* Unlock the requested partition if locked using two-step sequence */ + *(volatile uint32_t *)(partBaseAddr + CTRLMMR_LOCK_KICK0) = CTRLMMR_LOCK_KICK0_UNLOCK_VAL; + *(volatile uint32_t *)(partBaseAddr + CTRLMMR_LOCK_KICK1) = CTRLMMR_LOCK_KICK1_UNLOCK_VAL; +} + +static void SBL_CTRL_MMR_unlock_all(void) +{ + /* Unlock all WKUP_CTRL_MMR0 module registers */ + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 0); + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 1); + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 2); + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 3); + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 4); + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 6); + CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 7); + + /* Unlock all MCU_CTRL_MMR0 module registers */ + CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 0); + CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 1); + CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 2); + CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 3); + CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 4); + + /* Unlock all CTRL_MMR0 module registers */ + CTRL_MMR_unlock(CTRL_MMR0_BASE, 0); + CTRL_MMR_unlock(CTRL_MMR0_BASE, 1); + CTRL_MMR_unlock(CTRL_MMR0_BASE, 2); + CTRL_MMR_unlock(CTRL_MMR0_BASE, 3); + CTRL_MMR_unlock(CTRL_MMR0_BASE, 5); + #if defined(SOC_J721S2) + CTRL_MMR_unlock(CTRL_MMR0_BASE, 6); + #endif + CTRL_MMR_unlock(CTRL_MMR0_BASE, 7); +} int main() { ...... /* Any SoC specific Init. */ SBL_SocEarlyInit(); + /* Unlock control MMR registers */ + SBL_CTRL_MMR_unlock_all(); if (SBL_LOG_LEVEL > SBL_LOG_ERR) { /* Configure UART Tx pinmux. */ Board_uartTxPinmuxConfig(); }