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器件型号：AM625 主题中讨论的其他器件：SysConfig、 AM623
工具与软件：
您好！
我们将设计升级为使用2个 Micron 芯片 MT40A4G8NEA-062E：F、以使用8千兆字节的 DDR4
我在线使用了 SDK 09.02和 SysConfig 工具。
存储器频率(MHz) 800Mhz
数据总线宽度(每个器件) 8.
密度(每器件)(GB) 32.
芯片选择/等级 1.
我们的 DDR4芯片通过1个芯片选择进行连接。
1 -要访问8GB RAM、是否需要为芯片选择/等级选择2？
当前、引导加载程序 u-boot 仅具有8Gb 和16GB 密度。
在 SysConfig 中配置32GB 时、引导加载程序将冻结并显示以下跟踪。
U-Boot SPL 2023.04-00003-g2ac2a3ccc0-dirty (Oct 282024- 15:17:10+0000)SYSFW ABI: 3.1(firmware rev 0x0009'9.2.7--v09.02.07 (Kool Koala)')SPL initial stack usage: 13408bytesI patch the bootloader u-boot to use 4GB only instead of 8GB, the patch is at the bottom of the thread.2-您能否告诉我修补程序是否正确、您建议如何调试此问题？
3 -您能给我提供一个脚本吗、我可以在 Code Composer Studio 和 JTAG 探针中使用该脚本吗？
当前脚本 AddrMapCheck 返回："Total DDR Capacity Detected = 2GBytes"
感谢您的帮助。
此致、
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index 87f6bfccda..2feb2f9490 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -15,8 +15,9 @@
/ {
memory@80000000 {
device_type = "memory";
- /* 2G RAM */
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+ /* 4G RAM */
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+ <0x00000008 0x80000000 0x00000000 0x80000000>;
bootph-pre-ram;
};
};
diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index acb37d03bd..5b126a877b 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -45,8 +45,9 @@
memory@80000000 {
device_type = "memory";
- /* 2G RAM */
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+ /* 4G RAM */
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+ <0x00000008 0x80000000 0x00000000 0x80000000>;
};
diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi
index a350fe2433..7a6580a7a9 100644
--- a/arch/arm/dts/k3-am62x-sk-common.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-common.dtsi
@@ -30,8 +30,9 @@
memory@80000000 {
device_type = "memory";
- /* 2G RAM */
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+ /* 4G RAM */
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+ <0x00000008 0x80000000 0x00000000 0x80000000>;
};
diff --git a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi b/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
index df01893669..0374f9a0b9 100644
--- a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi
@@ -1,11 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* This file was generated with the
- * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.10.01
- * Thu Apr 25 2024 15:57:40 GMT+0200 (Central European Summer Time)
+ * AM623/AM625 SysConfig DDR Configuration Tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02
+ * Mon Oct 28 2024 14:33:57 GMT+0100 (heure normale d<E2><80><99>Europe centrale)
* DDR Type: DDR4
* Frequency = 800MHz (1600MTs)
- * Density: 8Gb
+ * Density: 32Gb
* Number of Ranks: 1
*/
@@ -13,7 +13,8 @@
#define DDRSS_PLL_FHS_CNT 6
#define DDRSS_PLL_FREQUENCY_1 400000000
#define DDRSS_PLL_FREQUENCY_2 400000000
-#define DDRSS_SDRAM_IDX 15
+#define DDRSS_SDRAM_IDX 17
+#define DDRSS_REGION_IDX 17
#define DDRSS_CTL_0_DATA 0x00000A00
@@ -333,8 +334,8 @@
#define DDRSS_CTL_314_DATA 0x00000000
#define DDRSS_CTL_315_DATA 0x00000100
#define DDRSS_CTL_316_DATA 0x00000000
-#define DDRSS_CTL_317_DATA 0x00000101
-#define DDRSS_CTL_318_DATA 0x3FFF0000
+#define DDRSS_CTL_317_DATA 0xFFFFFEFF
+#define DDRSS_CTL_318_DATA 0xFFFF0000
#define DDRSS_CTL_319_DATA 0x000FFF00
#define DDRSS_CTL_320_DATA 0xFFFFFFFF
#define DDRSS_CTL_321_DATA 0x00FFFF00
@@ -516,7 +517,7 @@
#define DDRSS_PI_74_DATA 0x00000000
#define DDRSS_PI_75_DATA 0x00000005
#define DDRSS_PI_76_DATA 0x01000000
-#define DDRSS_PI_77_DATA 0x04010000
+#define DDRSS_PI_77_DATA 0x03FF0000
#define DDRSS_PI_78_DATA 0x00020000
#define DDRSS_PI_79_DATA 0x00010002
#define DDRSS_PI_80_DATA 0x00000001
diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c
index 322e8e86de..e2cf90ec8e 100644
--- a/drivers/ram/k3-ddrss/k3-ddrss.c
+++ b/drivers/ram/k3-ddrss/k3-ddrss.c
@@ -786,7 +786,7 @@ static int k3_ddrss_probe(struct udevice *dev)
if (IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM642)) {
/* AM62x SIP supports only up to 512 MB SDRAM */
/* AM64x supports only up to 2 GB SDRAM */
- writel((((ilog2(ddrss->ddr_ram_size) - 16) << 5) | 0xF),
+ writel((((ilog2(ddrss->ddr_ram_size) - 16) << 5) | 0x1F),
ddrss->ddrss_ss_cfg + DDRSS_V2A_CTL_REG);
writel(0x0, ddrss->ddrss_ss_cfg + DDRSS_ECC_CTRL_REG);
}
