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[参考译文] AM625:SPI 外设模式(PRU 上的系统 SPI)

Guru**** 2482785 points
Other Parts Discussed in Thread: AM625

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https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1446116/am625-spi-peripheral-mode-system-spi-on-pru

器件型号:AM625
主题中讨论的其他器件: SysConfig

工具与软件:

尊敬的 PRU/MCU SDK 专家:

 

我有一个器件(SPI 主器件)连接到 am625、它在17MHz 时钟上连续流式传输24位数据。

我在 TRM 中找到了"12.2.3.4.4.4外设仅接收模式"部分、并按照步骤操作。

附件是我的小型 PRU 计划、我希望这里的任何专家都能花几分钟的时间来查看我的配置、并告诉我是否遗漏了什么?

1. 在代码中、我设置 WL = 24 SPI 字长(与 SPI 主机对齐)、MOA 设置为1、FIFO 和 AFL 设置为2。  这是 配置 FIFO (缓冲区64字节) 24位数据的正确方式吗?  

2.由于 WL 设置为24、我期望   MCSPI0_CFG.RX0的返回值是24位数据。

但是、 RX0仍然返回一个32位数据而不是24位数据。 这是有效的行为吗?

void Init_SPI(void)
{
	//Step 1
	MCSPI0_CFG.SYSCONFIG_bit.SoftReset = 1;
	while (MCSPI0_CFG.SYSSTATUS_bit.ResetDone != 1);

	//12.2.3.4.4 MCSPI Peripheral Mode
	MCSPI0_CFG.CH0CONF_bit.TRM = 1; // receive only
	MCSPI0_CFG.CH0CONF_bit.SPIENSLV = 1; // peripheral
	MCSPI0_CFG.CH0CONF_bit.WL = 24; //SPI word length
	MCSPI0_CFG.CH0CONF_bit.FFER = 1; //FIFO enable for rx only
	MCSPI0_CFG.CH0CONF_bit.IS = 1;
	MCSPI0_CFG.CH0CONF_bit.DPE0 = 0;
	MCSPI0_CFG.CH0CONF_bit.DPE1 = 0;

	MCSPI0_CFG.MODULCTRL_bit.MS = 1; //peripheral mode
	MCSPI0_CFG.MODULCTRL_bit.MOA = 1; //Multiple word ocp access

	/*
	PIN34 is set to 0x1, a multiword transfer can be performed without needing
	the external MCSPI controller to deactivate SPIEN[i] between each word as in this case the MCSPI module
	works in 3-pin peripheral mode and SPIEN[i] is not needed
	*/
	MCSPI0_CFG.MODULCTRL_bit.PIN34 = 1;

	//MCSPI0_CFG.XFERLEVEL_bit.WCNT = 0;

	/*  Calculate buffer width shift value.
     *  When dataWidth <= 8,           bufWidth = uint8_t  (1 byte - 0 shift)
     *  When dataWidth > 8  && <= 16,  bufWidth = uint16_t (2 bytes - 1 shift)
     *  When dataWidth > 16 && <= 32,  bufWidth = uint32_t (4 bytes - 2 shift)
     */
	MCSPI0_CFG.XFERLEVEL_bit.AFL = 2; //For RX buffer

	// set input directions
	MCSPI0_CFG.SYST_bit.SPIENDIR = 1;
	MCSPI0_CFG.SYST_bit.SPIDATDIR0 = 1;
	MCSPI0_CFG.SYST_bit.SPIDATDIR1 = 1;
	MCSPI0_CFG.SYST_bit.SPICLK = 1;
	MCSPI0_CFG.SYST_bit.SSB = 1;

	MCSPI0_CFG.CH0CTRL_bit.En = 1;
}

void readStream()
{
	volatile uint32_t i = 0;
	volatile uint32_t buff;
	volatile int store_data = 0;

	memset((void *)MEM_BUFFER_ADDR, 0x0, 0xA00000);

	while (1)
	{
		while (MCSPI0_CFG.CH0STAT_bit.RXFFE != 0);
		while (MCSPI0_CFG.CH0STAT_bit.EOT != 1);
		while (MCSPI0_CFG.CH0STAT_bit.RXFFF != 1);
		while (MCSPI0_CFG.CH0STAT_bit.RXS != 1);

		buff = MCSPI0_CFG.RX0;


		*(volatile uint32_t *)(MEM_BUFFER_ADDR+i) = buff;
		i += 4;
		

		if (i >= BUFFER_LEN)
			break;
	}
}

此致、

John