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[参考译文] TDA4AL-Q1:无法使用 tidl_model_import 导入自定义模型、收到非法指令(内核已转储)错误

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请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1465328/tda4al-q1-not-able-to-import-custom-model-using-tidl_model_import-getting-illegal-instruction-core-dumped-error

器件型号:TDA4AL-Q1

工具与软件:

你(们)好

我正在努力将焊炬模型导入 TIDL。 该模型是一个简单的3x3卷积内核、我已经使用 Pytorch API 生成了一个 onnx 模型文件。 执行此操作后、我已根据此 链接中给出的说明创建了一个配置文件。 下面显示了相同的情况。  

modelType = 2
numParamBits = 8
numFeatureBits = 8
inputNetFile = /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/custom_model.onnx
outputNetFile = /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/custom_model.bin
outputParamsFile = /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/custom_model_io_
inData = /home/user/rtos_ti_sdk/psdk_rtos_ti_data_set_09_00_00/calib_data.txt
outData = /home/user/rtos_ti_sdk/psdk_rtos_ti_data_set_09_00_00/output_data.bin
inWidth = 64
inHeight = 64
resizeWidth = 64
resizeHeight = 64
inNumChannels = 3
tensorType = 1
quantizationStyle = 2
perfSimTool = /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/c7x-mma-tidl/tidl_tools/ti_cnnperfsim.out
tidlStatsTool = /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/PC_dsp_test_dl_algo.out
graphVizTool = /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/c7x-mma-tidl/tidl_tools/tidl_graphVisualiser.out
numFrames = 1

现在、当我运行可执行文件"tidl_model_import.out"时、通过将上述 cfg 文件作为输入、我将面临非法指令错误(已转储内核)。 日志如下所示

ONNX Model (Proto) File  : /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/custom_model.onnx  
TIDL Network File      : /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/custom_model.bin  
TIDL IO Info File      : /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/custom_model_io_  
Current ONNX OpSet Version   : 17  
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

Processing config file #0 : /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/tidl_custom_net.txt.qunat_stats_config.txt 
Illegal instruction (core dumped)

 
 
 *****************   Calibration iteration number 0 started ************************ 
 
 
 

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

Processing config file #0 : /home/user/host_emulation_mode/ti-processor-sdk-rtos-j721s2-evm-09_00_00_02/pytorch_custom_models/tidl_custom_net.txt.qunat_stats_config.txt 
Illegal instruction (core dumped)

 
 
 *****************   Calibration iteration number 0 completed ************************ 
 
 
 

------------------ Network Compiler Traces -----------------------------
NC running for device: 1
Running with OTF buffer optimizations
successful Memory allocation
TIDL ALLOWLISTING LAYER CHECK: TIDL_E_QUANT_STATS_NOT_AVAILABLE] tidl_quant_stats_tool.out fails to collect dynamic range. Please look into quant stats log. This model will get fault on target.
****************************************************
**          0 WARNINGS          1 ERRORS          **
****************************************************

包含 pytorch 模型定义和用于将其转换为 onnx 模型的命令的 python 脚本、输出 onnx 文件全部包含在以下链接中。

请帮助我了解此过程中缺少什么会导致显示错误。  

提前感谢

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好;

    我看到你所得到的同样的票也在系统中。 我在结束本次演示时将避免混淆。

    谢谢。此致

    文立