Thread 中讨论的其他器件: MMWAVE-STUDIO、
工具/软件:
我将在设计中使用 AWR2243 单芯片、并通过 SPI 和 CSI-2 接口将它连接到 FPGA。
我已经让 MMWAVE-LINK 在我的 FPGA 中的 ARM 处理器上工作、现在 SPI 可以发送命令并正确读取响应。
所以我尝试使用 MMWAVE-LINK 中的命令开始采样、以下是配置代码:
// Configurations
// 1. Set channel
rlChanCfg_t channelConfig = {
.rxChannelEn = 0b1111, // Enable all RX channels
.txChannelEn = 0b101, // Enable 0 and 2 TX channel
.cascading = 0x0000, // No cascading
.cascadingPinoutCfg = 0, // No cascading signal output
};
retval = rlSetChannelConfig(deviceMap, &channelConfig);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"Channel configuration failed (%d)\n", retval);
}
printf(OK_MESSAGE"Channel configuration OK!\n");
// 2. ADC output
rlAdcOutCfg_t adcConfig = { 0 };
adcConfig.fmt.b2AdcBits = RL_ADC_DATA_16_BIT;
adcConfig.fmt.b2AdcOutFmt = RL_ADC_FORMAT_COMPLEX_2X;
adcConfig.fmt.b8FullScaleReducFctr = 0;
retval = rlSetAdcOutConfig(deviceMap, &adcConfig);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"ADC configuration failed (%d)\n", retval);
}
printf(OK_MESSAGE"ADC configuration OK!\n");
// 3. Device data path config
rlDevDataFmtCfg_t data_fmt_config = {
.rxChannelEn = 0b1111, // Enable all channels
.adcBits = 2, // 16-bit
.adcFmt = 1, // Complex
.iqSwapSel = 0, // I first
.chInterleave = 0, // Interleaved
};
retval = rlDeviceSetDataFmtConfig(deviceMap, &data_fmt_config);
rlDevDataPathCfg_t dataPathConfig = {
.intfSel = 0, // CSI2 interface
.transferFmtPkt0 = 0b000001, // ADC data only (PKT0)
.transferFmtPkt1 = 0b000000, // No data (PKT1)
.cqConfig = 0b10, // CQ = 16-bit
.cq0TransSize = 0, // Do NOT transfer the CQ data
.cq1TransSize = 0,
.cq2TransSize = 0
};
retval += rlDeviceSetDataPathConfig(deviceMap, &dataPathConfig);
// Data rate, HSI clock, lane, etc. configuration
rlDevDataPathClkCfg_t datapath_clk_cfg = {
.laneClkCfg = 1, // DDR clock for CSI-2
.dataRate = 0b0001, // 600 Mbps CSI-2 DDR
};
retval += rlDeviceSetDataPathClkConfig(deviceMap, &datapath_clk_cfg);
rlDevHsiClk_t hsi_clk_cfg = {
.hsiClk = 0x9, // For DDR 600 Mbps
};
retval += rlDeviceSetHsiClk(deviceMap, &hsi_clk_cfg);
rlDevLaneEnable_t lane_en_cfg = {
// .laneEn = 0b1111, // Enable lane 0 ~ 3
// .laneEn = 0b0011, // Enable lane 0 ~ 1
.laneEn = 0b0001, // Enable lane 0
};
retval += rlDeviceSetLaneConfig(deviceMap, &lane_en_cfg);
// Enable continous streaming mode
rlDevContStreamingModeCfg_t cont_cfg = {
.contStreamModeEn = 1
};
retval += rlDeviceSetContStreamingModeConfig(deviceMap, &cont_cfg);
// Configuration of CSI
rlDevCsi2Cfg_t csi2_cfg = {
.lanePosPolSel = 0x35421, // Each lane is normal pos. and pol.
//.lanePosPolSel = 0x35241, // Lane 0 -> 0, Lane 1 -> 4, CLK -> 3 for REV.1 board
.lineStartEndDis = 0, // Enable line start/end
};
retval += rlDeviceSetCsi2Config(deviceMap, &csi2_cfg);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"Device data path config failed (%d)\n", retval);
}
printf(OK_MESSAGE"Device data path config OK!\n");
// RF initialization
retval = rlRfInit(deviceMap);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"RF init failed (%d)\n", retval);
}
ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
printf(OK_MESSAGE"RF init OK!\n");
// Dynamic configurations
// 1. Profile
rlProfileCfg_t adcprofile = {
.profileId = 0,
.pfVcoSelect = 0b000, // Use VCO1 and internal VCO selection
.pfCalLutUpdate = 0b00, // Automatically update the calibration LUT
.startFreqConst = 0x558E38E3, // Start @ 77 GHz (1 LSB = 53.644 Hz)
.idleTimeConst = 5000, // Idle = 50 us
.adcStartTimeConst = 600, // ADC start time = 6 us
.rampEndTime = 50000, // Ramp end time = 500 us
.txOutPowerBackoffCode = 0, // No TX power back-off
.txPhaseShifter = 0, // No TX phase shift
.freqSlopeConst = 145, // Ramp slope @ 7.001 MHz/us (1 LSB = 48.279 kHz/us)
.txStartTime = 0, // TX start time = 0us
.numAdcSamples = 256, // ADC samples = 256 (max 1024 in 16KB complex 4-ch)
.digOutSampleRate = 10000, // ADC sample rate = 10 Msps (1 LSB = 1 ksps)
.hpfCornerFreq1 = 0x00, // HPF1 corner freq = 175 kHz
.hpfCornerFreq2 = 0x00, // HPF2 corner freq = 350 kHz
.txCalibEnCfg = 0x816D, // Enable only TX0, TX2 while calibration
.rxGain = (0b10 << 6) | 36, // RX Gain = 36 dB, target RF gain = 36 dB
};
retval = rlSetProfileConfig(deviceMap, 1, &adcprofile);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"Profile 0 set failure (%d)\n", retval);
}
printf(OK_MESSAGE"Profile 0 set OK!\n");
// 2. Chirp
rlChirpCfg_t chirp_conf = {
.chirpStartIdx = 0,
.chirpEndIdx = 0,
.profileId = 0,
.startFreqVar = 0,
.idleTimeVar = 0,
.adcStartTimeVar = 0,
.txEnable = 0b101, // Enable TX 0 and 2
};
retval = rlSetChirpConfig(deviceMap, 1, &chirp_conf);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"Chirp 0:0 set failure (%d)\n", retval);
}
printf(OK_MESSAGE"Chirp 0:0 set OK!\n");
// 3. Frame
rlFrameCfg_t frame_cfg = {
.chirpStartIdx = 0,
.chirpEndIdx = 0,
.numLoops = 255,
.numFrames = 0, // Infinite frames
.numAdcSamples = adcprofile.numAdcSamples * 2,
.framePeriodicity = 36000000, // Frame period = 50 ms (1 LSB = 5 ns)
.triggerSelect = 0x0001, // Use software trigger
.frameTriggerDelay = 0, // No trigger delay
};
retval = rlSetFrameConfig(deviceMap, &frame_cfg);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"Frame set failure (%d)\n", retval);
}
printf(OK_MESSAGE"Frame set OK!\n");
所有配置命令都返回 OK(无错误代码,无错误事件)。
完成所有配置后、使用该代码开始采样
// Let sensor start!!
rlFrameTrigger_t trigger = {
.startStop = 1
};
retval = rlFrameStartStop(deviceMap, &trigger);
if (retval != RL_RET_CODE_OK)
{
printf(ERR_MESSAGE"Sensor start failure (%d)\n", retval);
}
但在开始采样后、我的处理器接收到大量雷达异步事件并 持续包含 AWR_AE_MSS_CPUFAULT_SB、采样似乎失败了。
异步 事件中的 AWR_AE_MSS_CPUFAULT_SB 包含以下值:
5002 AWR_AE_MSS_CPUFAULT_SB 0024 Length = 36 0004 Fault type = MSS Processor Chirp Errors 0000 Line num = 0 0001 8800 Fault LR 0000 0000 Fault Prev. LR 0000 0000 Fault SPSR 0000 0000 Fault SP 0000 0000 Fault Cause Address FFFF Fault Error Status FF Source of the error FF AXI error type FF Error access type FF Error recovery type 0000 Reserved
我找到许多文档、但找不到有关错误 0x04 MSS 处理器线性调频脉冲错误的说明。
我认为这与线性调频脉冲配置相关吗? 但我在 MMWAVE-STUDIO 上使用相同的配置、工作正常。
也许我会忘记其他一些配置? 请告诉我什么是错,谢谢。