[参考译文] CC1110-CC1111：从 RX 到 TX、传输完成标志未激活

我不知道有关您如何配置 DMA 或如何配置无线电的任何信息、因此无法知道您的代码为什么不起作用。

我制作了一个小示例、其中我在 RX 中等待接收到数据包、或者按下按钮以取消 RX。

在接收到数据包或发生按钮按下操作后、我将发送一个数据包。

代码按预期运行。

我不确定是否所有清除中断标志、启用/禁用中断都是必要的、但至少你可以把一些有用的东西用作起点。

BYTE __xdata rxBuffer[N + 3];
BYTE __xdata txBuffer[N + 1];
static UINT8  packetReceived = FALSE;
static UINT8  packetSent = FALSE;UINT8  dummyFlag = FALSE;

__xdata DMA_DESC dmaConfigRX;  // Struct for the DMA configuration
__xdata DMA_DESC dmaConfigTX;  // Struct for the DMA configuration

void main(void)
{
    UINT16 i;
    
    // Choose the crystal oscillator as the system clock and set 
    // system clock speed = fRef (fxosc)
    CLKCON &= ~OSC_BIT;           // request switch to crystal oscillator
    while (CLKCON & OSC_BIT);     // wait until the clock switch has occured (=stable)
    SLEEP |= OSC_PD_BIT;          // power down unused oscillator
  
    P1DIR |= 0x02;
  
    /* Address Config = No address check */
    /* Base Frequency = 868.299866 */
    /* CRC Enable = true */
    /* Carrier Frequency = 868.299866 */
    /* Channel Number = 0 */
    /* Channel Spacing = 199.951172 */
    /* Data Rate = 38.3835 */
    /* Deviation = 20.629883 */
    /* Device Address = 0 */
    /* Manchester Enable = false */
    /* Modulated = true */
    /* Modulation Format = GFSK */
    /* PA Ramping = false */
    /* Packet Length = 255 */
    /* Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word */
    /* Preamble Count = 4 */
    /* RX Filter BW = 101.562500 */
    /* Sync Word Qualifier Mode = 30/32 sync word bits detected */
    /* TX Power = 0 */
    /* Whitening = false */
    PKTCTRL0   = 0x05;
    FSCTRL1    = 0x06;
    FREQ2      = 0x21;
    FREQ1      = 0x65;
    FREQ0      = 0x6A;
    MDMCFG4    = 0xCA;
    MDMCFG3    = 0x83;
    MDMCFG2    = 0x13;
    DEVIATN    = 0x35;
    MCSM0      = 0x18;
    FOCCFG     = 0x16;
    AGCCTRL2   = 0x43;
    FSCAL3     = 0xE9;
    FSCAL2     = 0x2A;
    FSCAL1     = 0x00;
    FSCAL0     = 0x1F;
    TEST1      = 0x31;
    TEST0      = 0x09;
    PA_TABLE0  = 0x50;
    IOCFG0     = 0x06;
    PKTLEN     = N;
  
    // Setup the DMA for RX
    SET_WORD(dmaConfigRX.SRCADDRH, dmaConfigRX.SRCADDRL, &X_RFD);
    SET_WORD(dmaConfigRX.DESTADDRH, dmaConfigRX.DESTADDRL, rxBuffer);
    dmaConfigRX.VLEN      = DMA_VLEN_FIRST_BYTE_P_3;
    SET_WORD(dmaConfigRX.LENH, dmaConfigRX.LENL, N + 1);
    dmaConfigRX.WORDSIZE  = DMA_WORDSIZE_BYTE;
    dmaConfigRX.TRIG      = DMA_TRIG_RADIO;
    dmaConfigRX.TMODE     = DMA_TMODE_SINGLE;
    dmaConfigRX.SRCINC    = DMA_SRCINC_0;
    dmaConfigRX.DESTINC   = DMA_DESTINC_1;
    dmaConfigRX.IRQMASK   = DMA_IRQMASK_ENABLE;
    dmaConfigRX.M8        = DMA_M8_USE_8_BITS;
    dmaConfigRX.PRIORITY  = DMA_PRI_HIGH;
    SET_WORD(DMA0CFGH, DMA0CFGL, &dmaConfigRX);
  
    // Setup the DMA for TX
    SET_WORD(dmaConfigTX.SRCADDRH, dmaConfigTX.SRCADDRL, txBuffer);
    SET_WORD(dmaConfigTX.DESTADDRH, dmaConfigTX.DESTADDRL, &X_RFD);
    dmaConfigTX.VLEN      = DMA_VLEN_FIRST_BYTE_P_1; 
    SET_WORD(dmaConfigTX.LENH, dmaConfigTX.LENL, N + 1);
    dmaConfigTX.WORDSIZE  = DMA_WORDSIZE_BYTE;
    dmaConfigTX.TRIG      = DMA_TRIG_RADIO;
    dmaConfigTX.TMODE     = DMA_TMODE_SINGLE;
    dmaConfigTX.SRCINC    = DMA_SRCINC_1;
    dmaConfigTX.DESTINC   = DMA_DESTINC_0;
    dmaConfigTX.IRQMASK   = DMA_IRQMASK_DISABLE;
    dmaConfigTX.M8        = DMA_M8_USE_8_BITS;
    dmaConfigTX.PRIORITY  = DMA_PRI_HIGH;
    SET_WORD(DMA1CFGH, DMA1CFGL, &dmaConfigTX);
  
    DMAIF = 0; 
    DMAIRQ &= ~DMAIF_0;
    S1CON &= ~RFIF_1_0;
    RFIF &= ~IRQ_DONE; 
    RFIM = IM_DONE;                                  
    INT_GLOBAL_ENABLE(INT_ON);
  
    txBuffer[0] = N;
    for (i = 1; i <= N; i++)
    {
        txBuffer[i] = i;
    }

    while (TRUE)
    {
        HAL_INT_ENABLE(INUM_DMA, INT_ON);
        DMAARM = DMAARM_CHANNEL0;     // Arm DMA channel 0
        RFST = STROBE_RX;             // Switch radio to RX
        
        while ((!packetReceived) & (P0_1 == 1));        // Wait for packet to be received (flag set in dma_IRQ) or button pushed
    
        if (packetReceived)
        {
            packetReceived = FALSE;  
        
            // Check CRC (check CRC bit in appended status byte)
            if ((rxBuffer[rxBuffer[0] + 2]) & 0x80)
            {
                P1_1 = ~P1_1; // Toggle LED
            }
        }
        else
        {
            DMAARM = 0x81;              // Abort channel 0 
            RFST = STROBE_IDLE;         // Switch radio to RX
            halWait(250);               // button "debounce"
        }
        HAL_INT_ENABLE(INUM_DMA, INT_OFF);
    
        S1CON &= ~RFIF_1_0;     // Clear the CPU RFIF interrupt flag
        RFIF &= ~IRQ_DONE;      // Tx completed, clear the module interrupt flag
        HAL_INT_ENABLE(INUM_RF, INT_ON);
    
        DMAARM = DMAARM_CHANNEL1;   // Arm DMA channel 0
        RFST = STROBE_TX;           // Switch radio to TX
                
        while (!packetSent);        // Wait for packet to be transmitted (flag set in rf_IRQ)
        packetSent = FALSE;
    
        HAL_INT_ENABLE(INUM_RF, INT_OFF);
    }
}

#pragma vector=DMA_VECTOR
__interrupt void dma_IRQ(void) {
    DMAIF = 0;              // Clear the CPU DMA interrupt flag
    DMAIRQ &= ~DMAIF_0;     // DMA channel 0 module interrupt flag
    packetReceived = TRUE;
}

#pragma vector=RF_VECTOR
__interrupt void rf_IRQ(void) {
  S1CON &= ~RFIF_1_0;     // Clear the CPU RFIF interrupt flag
  RFIF &= ~IRQ_DONE;      // Tx completed, clear the module interrupt flag
  packetSent = TRUE;
}

Siri.