TMS320F2800132:关于TMS320F2800132 SCI_B配置问题

Part Number: TMS320F2800132

你好

我想同时使用TMS320F2800132的SCI_A和SCI_B两个串口,我的配置代码如下,但是只有SCI_A能正常工作,如果您知道原因,希望能得到您的解答,感谢!!

void InitSci(void)
{

EALLOW;
GpioCtrlRegs.GPAGMUX2.bit.GPIO28 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0;

GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3;
GpioCtrlRegs.GPAAMSEL.bit.GPIO28 = 0;

GpioCtrlRegs.GPAGMUX2.bit.GPIO29 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;

EDIS;
EALLOW;
SciaRegs.SCICTL1.bit.SWRESET = 0;
SciaRegs.SCICCR.all = 0x0007;
SciaRegs.SCICTL1.all = 0x0003;
SciaRegs.SCICTL2.bit.TXINTENA = 1;
SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
SciaRegs.SCIHBAUD.bit.BAUD = 0x0000; 
SciaRegs.SCILBAUD.bit.BAUD = 0x001A; // 100 MHz SYSCLK 0x1A
SciaRegs.SCIFFTX.bit.SCIRST = 1;
SciaRegs.SCIFFTX.bit.SCIFFENA = 1;
SciaRegs.SCIFFTX.bit.TXFFST = 0;
SciaRegs.SCIFFTX.bit.TXFFIENA = 1;
SciaRegs.SCIFFTX.bit.TXFFIL = 0;

SciaRegs.SCIFFRX.bit.RXFFOVRCLR = 1;
SciaRegs.SCIFFRX.bit.RXFFST = 0;
SciaRegs.SCIFFRX.bit.RXFFIENA = 1;
SciaRegs.SCIFFRX.bit.RXFFIL = 1;

SciaRegs.SCIFFCT.all = 0x00;

SciaRegs.SCIFFTX.bit.TXFIFORESET = 1;
SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;
SciaRegs.SCICTL1.bit.SWRESET = 1;
EDIS;


//-------------SCI_B-------------------------------------------------------

EALLOW;
GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 2;
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;

GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3;

GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 2;
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;


EDIS;
EALLOW;
ScibRegs.SCICTL1.bit.SWRESET = 0;
ScibRegs.SCICCR.all = 0x0007;
ScibRegs.SCICTL1.all = 0x0003;

ScibRegs.SCICTL2.bit.TXINTENA = 1;
ScibRegs.SCICTL2.bit.RXBKINTENA = 1;
ScibRegs.SCIHBAUD.bit.BAUD = 0x0000;
ScibRegs.SCILBAUD.bit.BAUD = 0x001A; // 100 MHz SYSCLK 0x1A
ScibRegs.SCIFFTX.bit.SCIRST = 1;
ScibRegs.SCIFFTX.bit.SCIFFENA = 1;
ScibRegs.SCIFFTX.bit.TXFFST = 0;
ScibRegs.SCIFFTX.bit.TXFFIENA = 1;
ScibRegs.SCIFFTX.bit.TXFFIL = 0;

ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;
ScibRegs.SCIFFRX.bit.RXFFST = 0;
ScibRegs.SCIFFRX.bit.RXFFIENA = 1;
ScibRegs.SCIFFRX.bit.RXFFIL = 1;

ScibRegs.SCIFFCT.all = 0x00;

ScibRegs.SCIFFTX.bit.TXFIFORESET = 1;
ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;
ScibRegs.SCICTL1.bit.SWRESET = 1;
EDIS;
}