Other Parts Discussed in Thread: TMS320F28379S
Can the Universal Parallel Port (uPP) interface perform duplex communication when connected to FPGA?
I saw in the device manual that it is in simplex mode (tms320f28379s. pdf 6.12.7 chapter), but in the UP user manual, I saw that it can be in duplex mode (spruhg9. pdf 1.1 chapter)? If duplex mode can be used, what are the differences or precautions in hardware circuit design between simplex/duplex? And how to configure it for duplex mode?
