Part Number: TMS320F28P650DK
你好,
我们在项目开发测试中发现TMS320F28P65x芯片的EPWM模块在我们给出的CMPA=0时出现一个异常的全高电平,理论上应该保持低;
EPWM配置为:EPWM频率200Mhz,不分频;16K up-down;互补模式DB_ACTV_HIC,带2us死区;使用EPMW1-6,EPMW1在过零点发出相位同步,EPMW2-5接收同步信号,无初始相位偏移;CAU=CLEAR,CAD = SET;使用SHDW Mode,SHDWAMODE = ZERO;
EPMW1、EPMW3、EPMW5的A通道都可能在CMPA=0出现异常的全高电平,我们查看技术参考手册有如下的说明:
When using up-down count mode to generate an asymmetric PWM with deadband enabled:
• To achieve 0%-100% PWM use the following configuration: When the CMPA value is too close to
0 or PRD such that the following conditions are met (CMPX < Deadband/2) or (CMPX > PRD –
(Deadband)/2), the actions specified by the AQCTL register for CMPX do not take effect. To avoid
this, the AQCTL settings must be altered under these conditions only to generate either high or low
pulses for both CAU or CAD events (both set or both clear). Make sure that this software update is
occurring synchronous to the PWM carrier cycle, and shadow mode is enabled
请问大家对这种情况都怎么处理的,能帮忙提供下示例代码或者思路吗?