Part Number: TMS320F280049
F280049的Epwm7 TBPHS设置值生效，实际波形未移相：
CCS Debug查看了TBPHS寄存器，值是正常的，示波器看Epwm1A和Epwm7A是同相位的，是哪里配置错了吗？28377D和28335都是这么配置的正常。
下面是配置文件：
void EpwmModule1(void)
{
EPwm1Regs.TBCTR = 0; //Clear counter
EPwm1Regs.TBPRD = (Uint16)(PWM_MODULE_FREQUENCY/DAB_EXECUTE_FREQUENCY-1);
EPwm1Regs.CMPA.bit.CMPA = (Uint16)(0.5f*(PWM_MODULE_FREQUENCY/DAB_EXECUTE_FREQUENCY-1)); //adjust duty;
//Phase register;
EPwm1Regs.TBPHS.bit.TBPHS = 0;
//EPwm1Regs.TBPHS.bit.TBPHS = (Uint16)(0.0f*(PWM_MODULE_FREQUENCY/DAB_EXECUTE_FREQUENCY-1));
//Init time base;
EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP; //Count UP on sync (=0 degree)
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; //0x1
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; //PWM module clock prescale,1:1
EPwm1Regs.TBCTL.bit.CLKDIV = 0; //PWM module clock postscale,1:1
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; //0, shadow register
//Init duty control register;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
//Set action
EPwm1Regs.AQCTLA.all=0x0000;
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
//init software force register;
EPwm1Regs.AQSFRC.bit.RLDCSF = 2; //Load on event equals zero or equals period;
EPwm1Regs.AQSFRC.bit.ACTSFB = 0; //Action disable;
EPwm1Regs.AQSFRC.bit.ACTSFA = 0; //Action disable;
EPwm1Regs.AQCSFRC.bit.CSFA = 0; //Force disable;
EPwm1Regs.AQCSFRC.bit.CSFB = 0; //Force disable;
//Init deadband register;
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL; //0x3;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //0x3;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //2,
EPwm1Regs.DBFED.bit.DBFED = (Uint16)(PWM_MODULE_FREQUENCY*DAB_DEAD_BAND_TIME/1000000.0f);
EPwm1Regs.DBRED.bit.DBRED = (Uint16)(PWM_MODULE_FREQUENCY*DAB_DEAD_BAND_TIME/1000000.0f);
//Init PWM interrupt;
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; //Orginal is ET_CTR_PRD,2014.04.03; //2,
EPwm1Regs.ETPS.bit.INTPRD = EPWM_INTPRD;
EPwm1Regs.ETCLR.bit.INT = 1;
EPwm1Regs.ETSEL.bit.INTEN = 1;
//Init AD trig;
EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD; //Orginal is ET_CTR_ZERO,2014.04.03;
EPwm1Regs.ETPS.bit.SOCAPRD = EPWM_INTPRD;
EPwm1Regs.ETCLR.bit.SOCA = 1;
EPwm1Regs.ETCLR.bit.SOCB = 0;
EPwm1Regs.ETSEL.bit.SOCAEN = 1;
EPwm1Regs.ETSEL.bit.SOCBEN = 0;
//Init TZ
EALLOW;
EPwm1Regs.TZSEL.all = 0x0000;
EPwm1Regs.TZSEL.bit.OSHT1 = 1;
EPwm1Regs.TZSEL.bit.OSHT2 = 1;
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; //2
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO; //2
EPwm1Regs.TZCLR.bit.OST = 1;
EPwm1Regs.TZCLR.bit.INT = 1;
EPwm1Regs.TZEINT.bit.OST = 0;
EPwm1Regs.TZFRC.bit.OST = 1;
//Init chop;
EPwm1Regs.PCCTL.bit.CHPEN = CHP_DISABLE;
EDIS;
}
void EpwmModule7(void)
{
EPwm7Regs.TBCTR = 0; //Clear counter
EPwm7Regs.TBPRD = (Uint16)(PWM_MODULE_FREQUENCY/DAB_EXECUTE_FREQUENCY-1);
EPwm7Regs.CMPA.bit.CMPA = (Uint16)(0.5f*(PWM_MODULE_FREQUENCY/DAB_EXECUTE_FREQUENCY-1)); //adjust duty;
//Phase register;
// EPwm7Regs.TBPHS.bit.TBPHS = 0;
EPwm7Regs.TBPHS.bit.TBPHS = (Uint16)(0.5f*(PWM_MODULE_FREQUENCY/DAB_EXECUTE_FREQUENCY-1));
//Init time base;
EPwm7Regs.TBCTL.bit.PHSDIR = TB_UP; //Count UP on sync (=0 degree)
EPwm7Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; //0x1
EPwm7Regs.TBCTL.bit.HSPCLKDIV = 0; //PWM module clock prescale,1:1
EPwm7Regs.TBCTL.bit.CLKDIV = 0; //PWM module clock postscale,1:1
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW; //0, shadow register
//Init duty control register;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
//Set action
EPwm7Regs.AQCTLA.all=0x0000;
EPwm7Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm7Regs.AQCTLA.bit.CAU = AQ_CLEAR
//init software force register;
EPwm7Regs.AQSFRC.bit.RLDCSF = 2; //Load on event equals zero or equals period;
EPwm7Regs.AQSFRC.bit.ACTSFB = 0; //Action disable;
EPwm7Regs.AQSFRC.bit.ACTSFA = 0; //Action disable;
EPwm7Regs.AQCSFRC.bit.CSFA = 0; //Force disable;
EPwm7Regs.AQCSFRC.bit.CSFB = 0; //Force disable;
//Init deadband register;
EPwm7Regs.DBCTL.bit.IN_MODE = DBA_ALL; //0x3;
EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //0x3;
EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //2,
EPwm7Regs.DBFED.bit.DBFED = (Uint16)(PWM_MODULE_FREQUENCY*DAB_DEAD_BAND_TIME/1000000.0f);
EPwm7Regs.DBRED.bit.DBRED = (Uint16)(PWM_MODULE_FREQUENCY*DAB_DEAD_BAND_TIME/1000000.0f);
//Init PWM interrupt;
EPwm7Regs.ETSEL.bit.INTEN = 0;
//Init AD trig;
EPwm7Regs.ETSEL.bit.SOCAEN = 0;
EPwm7Regs.ETSEL.bit.SOCBEN = 0;
//Init TZ
EALLOW;
EPwm7Regs.TZSEL.all = 0x0000;
EPwm7Regs.TZSEL.bit.OSHT1 = 1;
EPwm7Regs.TZSEL.bit.OSHT2 = 1;
EPwm7Regs.TZCTL.bit.TZA = TZ_FORCE_LO; //2
EPwm7Regs.TZCTL.bit.TZB = TZ_FORCE_LO; //2
EPwm7Regs.TZCLR.bit.OST = 1;
EPwm7Regs.TZCLR.bit.INT = 1;
EPwm7Regs.TZEINT.bit.OST = 0;
EPwm7Regs.TZFRC.bit.OST = 1;
//Init chop;
EPwm7Regs.PCCTL.bit.CHPEN = CHP_DISABLE;
EDIS;
}
#define PWM_MODULE_FREQUENCY 100000000.0f
#define DAB_EXECUTE_FREQUENCY 60000.0f
