Part Number: TMS320F28388S
Other Parts Discussed in Thread: TMS320F28388D, C2000WARE
Hi TI Team,
We are developing an EtherCAT slave application using the TMS320F28388D (specifically TMS320F28388SZWTS).
Previously, we successfully verified the full EtherCAT slave functionality and achieved stable data exchange with the TwinCAT master using the official TI development board (controlCARD) and standard C2000Ware examples.
Now, we have designed a custom hardware board. The schematic design, pin mapping, and peripheral configurations are intended to be identical to the official TI reference design, but we are currently facing a communication failure (cannot establish connection with TwinCAT).
Hardware Differences on Custom Board:
Compared to the official controlCARD, our custom board introduces the following minor changes on the physical layer:
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Added a surge protection TVS array (SLVU2R8_4) on the differential TX/RX lines between the PHY and the RJ45 connector.
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Added 22Ω series isolation resistors on the digital MII/RMII/management signal lines between the PHY chip and the F28388D.
Troubleshooting Conducted:
To isolate the root cause, we have already performed the following hardware modifications, but the communication issue persists:
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Completely removed the
SLVU2R8_4surge protection chip to eliminate parasitics on differential pairs. -
Replaced the 22Ω series resistors with 0Ω jumpers to eliminate potential signal integrity/timing issues on the digital interface.
Questions:
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Potential Causes: Given that the exact same software works perfectly on the TI controlCARD, what are the most likely hardware or physical layer aspects (e.g., clock stability, power-up sequencing, PHY strap pins, or ESC reset timing) that could cause this total communication failure on a custom F28388D board?
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Diagnostic Guidance: What are the recommended step-by-step verification methods we should perform at this stage (e.g., checking specific registers via CCS, monitoring LED behaviors, or scoping specific signals) to pinpoint the failure and restore normal EtherCAT communication?
Thanks in advance for your professional support.
Best regards,
qiaomai