Part Number: TMS320F280039C
Hi TI experts,
I’m working with the TMS320F280039C and I’ve run into a behavior that I’d like to confirm.
Observation:
When I clear the PHSEN bit in TBCTL (PHSEN = 0), not only is the time-base phase loading from TBPHS disabled, but the shadow-to-active loading of the counter-compare (CC) submodule also stops—for example, CMPA no longer updates from its shadow register even though the CC shadow mode itself is enabled (CMPCTL[SHDWAMODE] remains in shadow mode and the load event selection bits are not changed).
As shown in the figure below, the TRM indicates that the synchronization signal for the CC submodule is not controlled/gated by PHSEN. This seems to contradict what I observe: it appears that both the CC submodule synchronization signal and the TB synchronization signal are affected by PHSEN, but the datasheet/TRM does not clearly show this coupling.
What I’d like to confirm:
-
Is this expected behavior for the F280039C ePWM? Does
PHSENintentionally affect theSYNCEVT/ global-load event path used for CC shadow-to-active transfers, despite the TRM figure suggesting the CC sync signal is not gated byPHSEN? -
If this is by design, how can I keep
PHSEN = 0(i.e., no phase shift on the time-base) while still allowingCMPA/CMPBshadow registers to load normally on CTR=ZERO or CTR=PRD? -
Or could this indicate damage or an errata on my specific device?
