Part Number: TMS320F28P650DK
Hi!
The "CLB Output Selection " chapter of notes: "CLBx_OUT12 through CLBx_OUT15 are unregistered and asynchronous to the CLB clock." What is the architectural reason that only these four outputs (OUT12–OUT15) are unregistered?
Since the 8 AOC outputs are replicated to become 32 outputs, then OUT4 = OUT12 = OUT20 = OUT28. Why is only OUT12 special? Do the other outputs all pass through a register after replication?
