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28335epwm中断怪了?盼回复!谢谢



大家好!我用的28335epwm同步,epwm2,epwm3,epwm4同步epwm1,均设置为增计数模式。但是发现一件奇怪的事,我测波形输出看到epwm1设置的增计数但是实际上是减计数模式,而epwm2,epwm3,epwm4同步中断了并且是曾计数模式与设置一样。

求解??

谢谢!!!

  • 1. 不知道你是怎么确定的?

    2. 理论上不应该出现,可以对比一下PWM手册中关于同步的例程;

    3. 建议将设置代码发出来看一看。

  • 10#你好!!!

    我的代码设置如下,麻烦看下!!

    另外就是epwm2和epwm3正常增计数工作了,同步中断了也应该。但是看下面的设置epwm1和epwm3的波形是不是应该是一样的,设置增计数,那么一个pwm周期内高电平时时间从最大达越来越小直至为0(pwm周期为1874),现在我用示波器看epwm1a的输出和epwm3a的波形,epwma正常是高电平时间越来越短,但是epwm1a的波形变化正好跟它相反,高电平从0开始增加到1874,?

    void main(void)

    {

    // Step 1. Initialize System Control:

    // PLL, WatchDog, enable Peripheral Clocks

    // This example function is found in the DSP2833x_SysCtrl.c file.

      InitSysCtrl();

    // Step 2. Initalize GPIO:

    // This example function is found in the DSP2833x_Gpio.c file and

    // illustrates how to set the GPIO to it's default state.

    // InitGpio();  // Skipped for this example

    // For this case just init GPIO pins for ePWM1, ePWM2, ePWM3

    // These functions are in the DSP2833x_EPwm.c file

     /// InitEPwm1Gpio();

      //InitEPwm2Gpio();

      //InitEPwm3Gpio();

      InitEPwmGpio();

    // Step 3. Clear all interrupts and initialize PIE vector table:

    // Disable CPU interrupts

      DINT;

    // Initialize the PIE control registers to their default state.

    // The default state is all PIE interrupts disabled and flags

    // are cleared.

    // This function is found in the DSP2833x_PieCtrl.c file.

      InitPieCtrl();

    // Disable CPU interrupts and clear all CPU interrupt flags:

      IER = 0x0000;

      IFR = 0x0000;

    // Initialize the PIE vector table with pointers to the shell Interrupt

    // Service Routines (ISR).

    // This will populate the entire table, even if the interrupt

    // is not used in this example.  This is useful for debug purposes.

    // The shell ISR routines are found in DSP2833x_DefaultIsr.c.

    // This function is found in DSP2833x_PieVect.c.

      InitPieVectTable();

    // Interrupts that are used in this example are re-mapped to

    // ISR functions found within this file.

      EALLOW;  // This is needed to write to EALLOW protected registers

      PieVectTable.EPWM1_INT = &Main_isr;

      //PieVectTable.EPWM2_INT = &epwm2_isr;

     // PieVectTable.EPWM3_INT = &epwm3_isr;

      EDIS;    // This is needed to disable write to EALLOW protected registers

    // Step 4. Initialize all the Device Peripherals:

    // This function is found in DSP2833x_InitPeripherals.c

    // InitPeripherals();  // Not required for this example

    // For this example, only initialize the ePWM

      EALLOW;

      SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;

      EDIS;

      InitEPwm1Example();

      InitEPwm2Example();

      InitEPwm3Example();

        EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;       // Enable INT on Zero event

      EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT

      EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;         // Generate INT on 1st event

      EPwm1Regs.ETCLR.bit.INT = 1;  

      EALLOW;

      SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;

      EDIS;

    // Step 5. User specific code, enable interrupts:

    // Enable CPU INT3 which is connected to EPWM1-3 INT:

      IER |= M_INT3;

    // Enable EPWM INTn in the PIE: Group 3 interrupt 1-3

      PieCtrlRegs.PIEIER3.bit.INTx1 = 1;

      //PieCtrlRegs.PIEIER3.bit.INTx2 = 1;

      //PieCtrlRegs.PIEIER3.bit.INTx3 = 1;

    // Enable global Interrupts and higher priority real-time debug events:

      EINT;   // Enable Global interrupt INTM

      ERTM;   // Enable Global realtime interrupt DBGM

    d1=0;

    d2=0;

    // Step 6. IDLE loop. Just sit and loop forever (optional):

      for(;;)

      {

      }

    interrupt void Main_isr(void )

    {

      // Update the CMPA and CMPB values

      //update_compare(&epwm1_info);

      d1++;

     // d2++;

    if(d1==1874)

    {

            d1=0;

    }

    // if(d2==800)

    // {

      //      d2=0;

    // }

      EPwm1Regs.CMPA.half.CMPA = d1;

      EPwm1Regs.CMPB = 150;

      EPwm2Regs.CMPA.half.CMPA = 80;

      EPwm2Regs.CMPB = 160;

      EPwm3Regs.CMPA.half.CMPA = d1;

      EPwm3Regs.CMPB = d1;

      // Clear INT flag for this timer

      EPwm1Regs.ETCLR.bit.INT = 1;

      // Acknowledge this interrupt to receive more interrupts from group 3

      PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;

    }

    void InitEPwm1Example()

    {

      // Setup TBCLK

      EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

      EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;       // Set timer period

      EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading

      EPwm1Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0

      EPwm1Regs.TBCTR = 0x0000;                  // Clear counter

     // EPwm1Regs.TBCTL.bit.PHSDIR = 0;      //此位在递增或递减模式下忽略

      EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;

      EPwm1Regs.TBCTL.bit.SYNCOSEL =TB_CTR_ZERO; //主模块不需要同步信号

      EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;   // Clock ratio to SYSCLKOUT

      EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV4;

      // Setup shadow register load on ZERO

      EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

      EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

      EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;

      EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

      // Set Compare values

      EPwm1Regs.CMPA.half.CMPA = 100;    // Set compare A value

      EPwm1Regs.CMPB = 100;              // Set Compare B value

      // Set actions

      EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;            // Set PWM1A on Zero

      EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;          // Clear PWM1A on event A, up count

      EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;            // Set PWM1B on Zero

      EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;          // Clear PWM1B on event B, up count

    }

    void InitEPwm2Example()

    {

      // Setup TBCLK

      EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

      EPwm2Regs.TBPRD = EPWM2_TIMER_TBPRD;       // Set timer period

      EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;    // Disable phase loading

      EPwm2Regs.TBPHS.half.TBPHS = 0x0;       // Phase is 0

      EPwm2Regs.TBCTR = 0x0000;                  // Clear counter

      EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;

      //EPwm2Regs.TBCTL.bit.PHSDIR = 1;      //此位在递增或递减模式下忽略

      EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; //从模块需要同步信号

      EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;   // Clock ratio to SYSCLKOUT

      EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV4;

      // Setup shadow register load on ZERO

      EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

      EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

      EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;

      EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

      // Set Compare values

      EPwm2Regs.CMPA.half.CMPA = 100;       // Set compare A value

      EPwm2Regs.CMPB =100;                 // Set Compare B value

      // Set actions

      EPwm2Regs.AQCTLA.bit.PRD = AQ_CLEAR;             // Clear PWM2A on Period

      EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;               // Set PWM2A on event A, up count

      EPwm2Regs.AQCTLB.bit.PRD = AQ_CLEAR;             // Clear PWM2B on Period

      EPwm2Regs.AQCTLB.bit.CBU = AQ_SET;               // Set PWM2B on event B, up count

     }

    void InitEPwm3Example(void)

    {

      // Setup TBCLK

      EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up

      EPwm3Regs.TBPRD = EPWM3_TIMER_TBPRD;       // Set timer period

      EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;    // Disable phase loading

      EPwm3Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0

      EPwm3Regs.TBCTR = 0x0000;                  // Clear counter

      EPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;

      //EPwm2Regs.TBCTL.bit.PHSDIR = 1;      //此位在递增或递减模式下忽略

      EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; //从模块需要同步信号

      EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;   // Clock ratio to SYSCLKOUT

      EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV4;

      // Setup shadow register load on ZERO

      EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

      EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

      EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;

      EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

     // Set Compare values

      EPwm3Regs.CMPA.half.CMPA = 100; // Set compare A value

      EPwm3Regs.CMPB = 100;           // Set Compare B value

      // Set Actions

      EPwm3Regs.AQCTLA.bit.PRD = AQ_CLEAR;             // Clear PWM2A on Period

      EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;               // Set PWM2A on event A, up count

      EPwm3Regs.AQCTLB.bit.PRD = AQ_CLEAR;             // Clear PWM2B on Period

      EPwm3Regs.AQCTLB.bit.CBU = AQ_SET;  

    再次感谢10#先生!!!3q!!!

  • epwma正常是高电平时间越来越短,不好意思 这句话错了点,应该是epwm3a,实际上epwm3b波形也是与epwm3a一样的!!

  • 首先,根据epwm1a的输出和epwm3a的波形来判断计数方向的方法是不正确的,因为你的PWM输出方式除了跟计数方向有关,同时还跟动作模式(AQ)相关;

    其次,如果需要判断,则可以直接查看计数值CNT,比如在CCS窗口中运行前,读取各自的CNT,然后运行一会暂停再读取,如此反复,则同是增计数时,应该任意时刻读出的值都是比前一时刻大的,除非在过周期后;另一方面,由于你的PWM设置成所有周期都相同且进行了同步,则读出的值应该都是相同的,或者相差一两个计数;如果不能在CCS环境下读取,你可以增加代码来读取,通过打印的方式看看是不是这个结论;

    最后,你的问题,就在于PWM1/3的AQ设置是不同的,PWM1A是在计数过零时置高,增计数到CMPA时置低,而PWM3A则相反,是在计数为周期时(也就相当于在过零,其实是下一个clock)置低,增计数到CMPA时置高,所以你看到的波形必然是PWM1A和PWM3A刚好相反。

    结论:1. 如果你把对应的AQ设置改成一样,你看到的波形变化应该是相同的,但这跟计数方向没有关系;

         2. 你现在的计数方式本身就是三个都是增计数(只由CTRMODE 决定,你的程序都设置为TB_COUNT_UP)。

  • 灰常感谢您的回答,Mr 10#!!!,AQ设置我以为设置是一样的 抱歉 呵呵!!

    另外 ,Mr 10#,问个很重要的问题,怎么算完全了解一款芯片了 比如说28335,而不是停留在表面上的认识呢?

    哈哈,因为还在学校学习,前两天被一个工作的大哥给鄙视了 哈哈!!谢谢了!!

  • 这个问题太虚无缥缈,所以我也回答不上来,而且只是熟悉芯片本身也没多大意义。

    重要的是你能够用它来做某些应用,而做这些应用的时候,需要什么,你都可以找到对应的文档和例子使用就可以了。

    当然,前提是,对于基本的启动过程,最小系统以及调试方法等基本的东西有所了解。