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中断响应时CPU寄存器的保存



上文说到,CPU执行32位访问时期望一个偶地址,但是SP开始时是个偶地址,经过加1就会变成一个奇地址,这不前后矛盾了吗?

除非进行的是ASP指令才是对齐堆栈啊。。。请TI大神解惑。