本人最近设计了一块DSP+FPGA的核心电路板,DSP与FPGA通过EMIF连接,RAM挂在总线ZONE6上,用DSP读0x100000的值,总是会出现lowpower情况;单独用DSP单片机外接RAM时,可以正常读取,想请教这种情况怎么办?
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本人最近设计了一块DSP+FPGA的核心电路板,DSP与FPGA通过EMIF连接,RAM挂在总线ZONE6上,用DSP读0x100000的值,总是会出现lowpower情况;单独用DSP单片机外接RAM时,可以正常读取,想请教这种情况怎么办?