请问GPACSEL1 Register的寄存器到底是什么意思？

GPACSEL1 is shown in Figure 7-15 and described in Table 7-28.
Return to Summary Table.
GPIO A Core Select Register (GPIO0 to 7)
Selects which master's GPIODAT/SET/CLEAR/TOGGLE registers control this GPIO pin
xx00: CPU1 selected
xx01: CPU1.CLA1 selected
xx10: CPU2 selected
xx11: CPU2.CLA1 selected

在28379的手册上是这样描述的。但是还是不太理解他的作用。