MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0 */
RAML1 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L1 */
FLASHN : origin = 0x100000, length = 0x002000 /* on-chip FLASH */
FLASHM : origin = 0x102000, length = 0x002000 /* on-chip FLASH */
FLASHL : origin = 0x104000, length = 0x002000 /* on-chip FLASH */
FLASHK : origin = 0x106000, length = 0x002000 /* on-chip FLASH */
FLASHJ : origin = 0x108000, length = 0x008000 /* on-chip FLASH */
FLASHI : origin = 0x110000, length = 0x008000 /* on-chip FLASH */
FLASHH : origin = 0x118000, length = 0x008000 /* on-chip FLASH */
FLASHG : origin = 0x120000, length = 0x008000 /* on-chip FLASH */
FLASHF : origin = 0x128000, length = 0x008000 /* on-chip FLASH */
FLASHE : origin = 0x130000, length = 0x008000 /* on-chip FLASH */
FLASHD : origin = 0x138000, length = 0x002000 /* on-chip FLASH */
FLASHC : origin = 0x13A000, length = 0x002000 /* on-chip FLASH */
FLASHA : origin = 0x13E000, length = 0x001F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x13FF80, length = 0x000070 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x13FFF0, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
FLASH_EXE_ONLY_P0 : origin = 0x13FFF2, length = 0x000002 /* Part of FLASHA. Flash execute only locations in FLASHA */
ECSL_PWL_P0 : origin = 0x13FFF4, length = 0x000004 /* Part of FLASHA. ECSL password locations in FLASHA */
CSM_PWL_P0 : origin = 0x13FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
FPUTABLES : origin = 0x3FD258, length = 0x0006A0 /* FPU Tables in Boot ROM */
IQTABLES : origin = 0x3FD8F8, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FE448, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FE4D4, length = 0x0000AA /* IQ Math Tables in Boot ROM */
BOOTROM : origin = 0x3FEDA8, length = 0x001200 /* Boot ROM */
PIEMISHNDLR : origin = 0x3FFFBE, length = 0x000002 /* part of boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML2 : origin = 0x00A000, length = 0x001000 /* on-chip RAM block L2 */
RAML3 : origin = 0x00B000, length = 0x001000 /* on-chip RAM block L3 */
RAMS0 : origin = 0x00C000, length = 0x001000 /* on-chip Shared RAM block S0 */
RAMS1 : origin = 0x00D000, length = 0x001000 /* on-chip Shared RAM block S1 */
RAMS2 : origin = 0x00E000, length = 0x001000 /* on-chip Shared RAM block S2 */
RAMS3 : origin = 0x00F000, length = 0x001000 /* on-chip Shared RAM block S3 */
RAMS4 : origin = 0x010000, length = 0x001000 /* on-chip Shared RAM block S4 */
RAMS5 : origin = 0x011000, length = 0x001000 /* on-chip Shared RAM block S5 */
RAMS6 : origin = 0x012000, length = 0x001000 /* on-chip Shared RAM block S6 */
RAMS7 : origin = 0x013000, length = 0x001000 /* on-chip Shared RAM block S7 */
CTOMRAM : origin = 0x03F800, length = 0x000380 /* C28 to M3 Message RAM */
MTOCRAM : origin = 0x03FC00, length = 0x000380 /* M3 to C28 Message RAM */
FLASHB : origin = 0x13C000, length = 0x002000 /* on-chip FLASH */
}
能把RAML0，RAML1分到PAGE 0？FLASHB分到PAGE1?
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1
难道RAM与FLASH不分？
