用f28027的时候发现一个很奇怪的现象，代码中加入了一些全局变量之后pwm输出不正常，删掉部分全局变量后输出正常。测试的时候这些全局变量都没有进行其它操作。是我的cmd文件有问题吗？附上cmd文件和生成的部分map文件
MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
PRAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
FLASHD : origin = 0x3F0000, length = 0x002000 /* on-chip FLASH */
FLASHC : origin = 0x3F2000, length = 0x002000 /* on-chip FLASH */
FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
DRAML0 : origin = 0x008800, length = 0x000800 /* on-chip RAM block L0 */
FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASH */
}
/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHA | FLASHC | FLASHD, PAGE = 0
.pinit : > FLASHA | FLASHC | FLASHD, PAGE = 0
.text : >> FLASHA | FLASHC | FLASHD, PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHA,
RUN = PRAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
RUN_START(_RamfuncsRunStart),
PAGE = 0
csmpasswds : > CSM_PWL_P0 PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0
/* Allocate uninitalized data sections: */
.stack : > RAMM0 PAGE = 1
.ebss : > DRAML0 PAGE = 1
.esysmem : > DRAML0 PAGE = 1
.sysmem : > DRAML0 PAGE = 1
.cio : >> RAMM0 | RAMM1 | DRAML0 PAGE = 1
/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASHA PAGE = 0
.switch : > FLASHA PAGE = 0
/* Allocate IQ math areas: */
IQmath : > FLASHA PAGE = 0 /* Math Code */
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)
}
*/
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT
}
SECTIONS
{
/************* DPLIB Sections C28x ************************/
/* ADCDRV_1ch section */
ADCDRV_1ch_Section : > DRAML0 PAGE = 1
/* ADCDRV_4ch section */
ADCDRV_4ch_Section : > DRAML0 PAGE = 1
/* ADCDRV_8ch section */
ADCDRV_8ch_Section : > DRAML0 PAGE = 1
/* CNTL_2P2Z section */
CNTL_2P2Z_Section : > DRAML0 PAGE = 1
CNTL_2P2Z_InternalData : > DRAML0 PAGE = 1
CNTL_2P2Z_Coef : > DRAML0 PAGE = 1
/* CNTL_3P3Z section */
CNTL_3P3Z_Section : > DRAML0 PAGE = 1
CNTL_3P3Z_InternalData : > DRAML0 PAGE = 1
CNTL_3P3Z_Coef : > DRAML0 PAGE = 1
/*DLOG_4CH section */
DLOG_4CH_Section : > DRAML0 PAGE = 1
DLOG_BUFF : > DRAML0 PAGE = 1
/*MATH_EMAVG section */
MATH_EMAVG_Section : > DRAML0 PAGE = 1
/*PFC_ICMD section*/
PFC_ICMD_Section : > DRAML0 PAGE = 1
/*PFC_INVSQR section*/
PFC_INVSQR_Section : > DRAML0 PAGE = 1
/* DACDRV_RAMP section */
DACDRV_RAMP_Section : > DRAML0 PAGE = 1
/* PWMDRV_1ch driver section */
PWMDRV_1ch_Section : > DRAML0 PAGE = 1
/* PWMDRV_1chHiRes driver section */
PWMDRV_1chHiRes_Section : > DRAML0 PAGE = 1
/* PWMDRV_PFC2PhiL driver section */
PWMDRV_PFC2PhiL_Section : > DRAML0 PAGE = 1
/* PWMDRV_PSFB driver section */
PWMDRV_PSFB_Section : > DRAML0 PAGE = 1
/* PWMDRV_DualUpDwnCnt driver section */
PWMDRV_DualUpDwnCnt_Section : > DRAML0 PAGE = 1
/* PWMDRV_ComplPairDB driver section */
PWMDRV_ComplPairDB_Section : > DRAML0 PAGE = 1
/* ZeroNet_Section */
ZeroNet_Section : > DRAML0 PAGE = 1
/* Net_terminals_Section */
Net_terminals: > DRAML0,PAGE = 1
}
/*****************************************************以下为生成的部分map文件*************************/
> Linked Fri Aug 24 17:00:37 2018
OUTPUT FILE NAME: <DG.out>
ENTRY POINT SYMBOL: "_c_int00" address: 003f78a6
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
PRAML0 00008000 00000800 000000c6 0000073a RWIX
OTP 003d7800 00000400 00000000 00000400 RWIX
FLASHD 003f0000 00002000 00000000 00002000 RWIX
FLASHC 003f2000 00002000 00000000 00002000 RWIX
FLASHA 003f6000 00001f80 00001f68 00000018 RWIX
CSM_RSVD 003f7f80 00000076 00000000 00000076 RWIX
BEGIN 003f7ff6 00000002 00000002 00000000 RWIX
CSM_PWL_P0 003f7ff8 00000008 00000000 00000008 RWIX
IQTABLES 003fe000 00000b50 00000000 00000b50 RWIX
IQTABLES2 003feb50 0000008c 00000000 0000008c RWIX
IQTABLES3 003febdc 000000aa 00000000 000000aa RWIX
ROM 003ff27c 00000d44 00000000 00000d44 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
VECTORS 003fffc2 0000003e 00000000 0000003e RWIX
PAGE 1:
BOOT_RSVD 00000000 00000050 00000000 00000050 RWIX
RAMM0 00000050 000003b0 00000300 000000b0 RWIX
RAMM1 00000400 00000400 00000000 00000400 RWIX
DEV_EMU 00000880 00000105 00000004 00000101 RWIX
SYS_PWR_CTL 00000985 00000003 00000003 00000000 RWIX
FLASH_REGS 00000a80 00000060 00000008 00000058 RWIX
CSM 00000ae0 00000010 00000010 00000000 RWIX
ADC_RESULT 00000b00 00000020 00000020 00000000 RWIX
CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX
CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX
PIE_VECT 00000d00 00000100 00000100 00000000 RWIX
COMP1 00006400 00000020 00000014 0000000c RWIX
COMP2 00006420 00000020 00000014 0000000c RWIX
EPWM1 00006800 00000040 00000040 00000000 RWIX
EPWM2 00006840 00000040 00000040 00000000 RWIX
EPWM3 00006880 00000040 00000040 00000000 RWIX
EPWM4 000068c0 00000040 00000040 00000000 RWIX
ECAP1 00006a00 00000020 00000020 00000000 RWIX
GPIOCTRL 00006f80 00000040 00000040 00000000 RWIX
GPIODAT 00006fc0 00000020 00000020 00000000 RWIX
GPIOINT 00006fe0 00000020 0000000a 00000016 RWIX
SYSTEM 00007010 00000020 0000001f 00000001 RWIX
SPIA 00007040 00000010 00000010 00000000 RWIX
SCIA 00007050 00000010 00000010 00000000 RWIX
NMIINTRUPT 00007060 00000010 00000010 00000000 RWIX
XINTRUPT 00007070 00000010 00000010 00000000 RWIX
ADC 00007100 00000080 00000051 0000002f RWIX
I2CA 00007900 00000040 00000022 0000001e RWIX
DRAML0 00008800 00000800 00000184 0000067c RWIX
PARTID 003d7fff 00000001 00000001 00000000 RWIX
FLASHB 003f4000 00002000 00000000 00002000 RWIX
CSM_PWL 003f7ff8 00000008 00000008 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.pinit 0 003f6000 00000000 UNINITIALIZED
ramfuncs 0 003f6000 000000c6 RUN ADDR = 00008000
003f6000 000000a5 HVPSFB-DPL-ISR.obj (ramfuncs)
003f60a5 0000001d HVPSFB-DevInit_F2802x.obj (ramfuncs)
003f60c2 00000004 f2802x_asmfuncs.obj (ramfuncs)
.econst 0 003f60c6 00000164
003f60c6 00000101 rts2800_ml.lib : ctype.obj (.econst:.string:__ctypes_)
003f61c7 00000001 --HOLE-- [fill = 0]
003f61c8 00000024 : _printfi.obj (.econst:.string)
003f61ec 00000018 : _printfi.obj (.econst)
003f6204 00000010 hmi_driver.obj (.econst)
003f6214 00000009 hmi_driver.obj (.econst:.string)
003f621d 00000001 --HOLE-- [fill = 0]
003f621e 00000008 rts2800_ml.lib : strtold.obj (.econst)
003f6226 00000004 cmd_process.obj (.econst:.string)
.text 0 003f622a 00001c88
003f622a 00000930 rts2800_ml.lib : _printfi.obj (.text)
003f6b5a 00000273 main.obj (.text)
003f6dcd 000001bf ADC_SOC_Cnf.obj (.text)
003f6f8c 0000013a PWM_PSFB_VMC_SR_Cnf.obj (.text)
003f70c6 00000107 HVPSFB-DevInit_F2802x.obj (.text)
003f71cd 00000107 rts2800_ml.lib : ll_div.obj (.text)
003f72d4 000000ca my_io.obj (.text)
003f739e 000000c9 hmi_driver.obj (.text)
003f7467 0000009c rts2800_ml.lib : fd_add.obj (.text)
003f7503 00000099 my_sci.obj (.text)
003f759c 0000008b rts2800_ml.lib : fd_div.obj (.text)
003f7627 00000083 : fd_mpy.obj (.text)
003f76aa 00000083 : fs_div.obj (.text)
003f772d 00000078 : fs_add.obj (.text)
003f77a5 0000005f cmd_queue.obj (.text)
003f7804 0000005a rts2800_ml.lib : fs_mpy.obj (.text)
003f785e 00000048 driverlib.lib : gpio.obj (.text:_GPIO_setMode)
003f78a6 00000044 rts2800_ml.lib : boot.obj (.text)
003f78ea 00000040 DAC_Cnf.obj (.text)
003f792a 00000031 rts2800_ml.lib : atoi.obj (.text)
003f795b 0000002f : sprintf.obj (.text)
003f798a 0000002c : ltoa.obj (.text)
003f79b6 0000002a : fd_cmp.obj (.text)
003f79e0 0000002a : l_div.obj (.text)
003f7a0a 00000029 HVPSFB-DPL-ISR.obj (.text)
003f7a33 00000029 driverlib.lib : gpio.obj (.text:_GPIO_setDirection)
003f7a5c 00000029 : gpio.obj (.text:_GPIO_setPullUp)
003f7a85 00000028 my_sci.obj (.text:retain)
003f7aad 00000027 driverlib.lib : gpio.obj (.text:_GPIO_setQualification)
003f7ad4 00000025 rts2800_ml.lib : fs_toi.obj (.text)
003f7af9 00000022 : i_div.obj (.text)
003f7b1b 00000021 : fd_toi.obj (.text)
003f7b3c 00000021 : memcpy_ff.obj (.text)
003f7b5d 0000001f : fd_tol.obj (.text)
003f7b7c 0000001e : ll_cmp.obj (.text)
003f7b9a 0000001c : fs_tofd.obj (.text)
003f7bb6 0000001c : l_tofd.obj (.text)
003f7bd2 0000001b : fd_toul.obj (.text)
003f7bed 00000019 : args_main.obj (.text)
003f7c06 00000019 : exit.obj (.text)
003f7c1f 00000018 : ll_aox.obj (.text)
003f7c37 00000017 : fs_cmp.obj (.text)
003f7c4e 00000017 : u_tofd.obj (.text)
003f7c65 00000014 driverlib.lib : gpio.obj (.text:_GPIO_setHigh)
003f7c79 00000014 : gpio.obj (.text:_GPIO_setLow)
003f7c8d 00000014 : gpio.obj (.text:_GPIO_toggle)
003f7ca1 00000014 rts2800_ml.lib : ll_mpy.obj (.text)
003f7cb5 00000010 : u_tofs.obj (.text)
003f7cc5 0000000f driverlib.lib : pie.obj (.text:_PIE_registerPieIntHandler)
003f7cd4 0000000e rts2800_ml.lib : fd_sub.obj (.text)
003f7ce2 0000000d : memccpy.obj (.text)
003f7cef 0000000d : memset.obj (.text)
003f7cfc 0000000a driverlib.lib : adc.obj (.text:_ADC_init)
003f7d06 0000000a : pie.obj (.text:_PIE_enableInt)
003f7d10 0000000a : pie.obj (.text:_PIE_init)
003f7d1a 0000000a f2802x_asmfuncs.obj (.text)
003f7d24 00000009 driverlib.lib : clk.obj (.text:_CLK_enableSciaClock)
003f7d2d 00000009 rts2800_ml.lib : _lock.obj (.text)
003f7d36 00000009 : fd_neg.obj (.text)
003f7d3f 00000008 driverlib.lib : clk.obj (.text:_CLK_init)
003f7d47 00000008 : flash.obj (.text:_FLASH_init)
003f7d4f 00000008 : gpio.obj (.text:_GPIO_init)
003f7d57 00000008 : sci.obj (.text:_SCI_init)
003f7d5f 00000008 f2802x_codestartbranch.obj (.text)
003f7d67 00000008 rts2800_ml.lib : strlen.obj (.text)
003f7d6f 00000006 driverlib.lib : sci.obj (.text:_SCI_setBaudRate)
003f7d75 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT1_ISR)
003f7d7a 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT2_ISR)
003f7d7f 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT3_ISR)
003f7d84 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT4_ISR)
003f7d89 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT5_ISR)
003f7d8e 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT6_ISR)
003f7d93 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT7_ISR)
003f7d98 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT8_ISR)
003f7d9d 00000005 : f2802xx_defaultisr.obj (.text:_ADCINT9_ISR)
003f7da2 00000005 : f2802xx_defaultisr.obj (.text:_DATALOG_ISR)
003f7da7 00000005 : f2802xx_defaultisr.obj (.text:_ECAP1_INT_ISR)
003f7dac 00000005 : f2802xx_defaultisr.obj (.text:_EMPTY_ISR)
003f7db1 00000005 : f2802xx_defaultisr.obj (.text:_EMUINT_ISR)
003f7db6 00000005 : f2802xx_defaultisr.obj (.text:_EPWM1_INT_ISR)
003f7dbb 00000005 : f2802xx_defaultisr.obj (.text:_EPWM1_TZINT_ISR)
003f7dc0 00000005 : f2802xx_defaultisr.obj (.text:_EPWM2_INT_ISR)
003f7dc5 00000005 : f2802xx_defaultisr.obj (.text:_EPWM2_TZINT_ISR)
003f7dca 00000005 : f2802xx_defaultisr.obj (.text:_EPWM3_INT_ISR)
003f7dcf 00000005 : f2802xx_defaultisr.obj (.text:_EPWM3_TZINT_ISR)
003f7dd4 00000005 : f2802xx_defaultisr.obj (.text:_EPWM4_INT_ISR)
003f7dd9 00000005 : f2802xx_defaultisr.obj (.text:_EPWM4_TZINT_ISR)
003f7dde 00000005 : f2802xx_defaultisr.obj (.text:_I2CINT1A_ISR)
003f7de3 00000005 : f2802xx_defaultisr.obj (.text:_I2CINT2A_ISR)
003f7de8 00000005 : f2802xx_defaultisr.obj (.text:_ILLEGAL_ISR)
003f7ded 00000005 : f2802xx_defaultisr.obj (.text:_INT13_ISR)
003f7df2 00000005 : f2802xx_defaultisr.obj (.text:_INT14_ISR)
003f7df7 00000005 : f2802xx_defaultisr.obj (.text:_NMI_ISR)
003f7dfc 00000005 : f2802xx_defaultisr.obj (.text:_PIE_RESERVED)
003f7e01 00000005 : pie.obj (.text:_PIE_illegalIsr)
003f7e06 00000005 : f2802xx_defaultisr.obj (.text:_RTOSINT_ISR)
003f7e0b 00000005 : f2802xx_defaultisr.obj (.text:_SCIRXINTA_ISR)
003f7e10 00000005 : f2802xx_defaultisr.obj (.text:_SCITXINTA_ISR)
003f7e15 00000005 : f2802xx_defaultisr.obj (.text:_SPIRXINTA_ISR)
003f7e1a 00000005 : f2802xx_defaultisr.obj (.text:_SPITXINTA_ISR)
003f7e1f 00000005 : f2802xx_defaultisr.obj (.text:_TINT0_ISR)
003f7e24 00000005 : f2802xx_defaultisr.obj (.text:_USER10_ISR)
003f7e29 00000005 : f2802xx_defaultisr.obj (.text:_USER11_ISR)
003f7e2e 00000005 : f2802xx_defaultisr.obj (.text:_USER12_ISR)
003f7e33 00000005 : f2802xx_defaultisr.obj (.text:_USER1_ISR)
003f7e38 00000005 : f2802xx_defaultisr.obj (.text:_USER2_ISR)
003f7e3d 00000005 : f2802xx_defaultisr.obj (.text:_USER3_ISR)
003f7e42 00000005 : f2802xx_defaultisr.obj (.text:_USER4_ISR)
003f7e47 00000005 : f2802xx_defaultisr.obj (.text:_USER5_ISR)
003f7e4c 00000005 : f2802xx_defaultisr.obj (.text:_USER6_ISR)
003f7e51 00000005 : f2802xx_defaultisr.obj (.text:_USER7_ISR)
003f7e56 00000005 : f2802xx_defaultisr.obj (.text:_USER8_ISR)
003f7e5b 00000005 : f2802xx_defaultisr.obj (.text:_USER9_ISR)
003f7e60 00000005 : f2802xx_defaultisr.obj (.text:_WAKEINT_ISR)
003f7e65 00000005 : f2802xx_defaultisr.obj (.text:_XINT1_ISR)
003f7e6a 00000005 : f2802xx_defaultisr.obj (.text:_XINT2_ISR)
003f7e6f 00000005 : f2802xx_defaultisr.obj (.text:_XINT3_ISR)
003f7e74 00000005 : f2802xx_defaultisr.obj (.text:_rsvd_ISR)
003f7e79 00000005 HVPSFB-DevInit_F2802x.obj (.text:retain)
003f7e7e 00000005 rts2800_ml.lib : fs_neg.obj (.text)
003f7e83 00000005 : strcpy.obj (.text)
003f7e88 00000004 driverlib.lib : cpu.obj (.text:_CPU_enableInt)
003f7e8c 00000004 : cpu.obj (.text:_CPU_init)
003f7e90 00000004 : sci.obj (.text:_SCI_clearRxFifoInt)
003f7e94 00000004 : sci.obj (.text:_SCI_clearRxFifoOvf)
003f7e98 00000004 : sci.obj (.text:_SCI_setCharLength)
003f7e9c 00000004 : sci.obj (.text:_SCI_setNumStopBits)
003f7ea0 00000003 : cpu.obj (.text:_CPU_enableGlobalInts)
003f7ea3 00000003 : sci.obj (.text:_SCI_disableParity)
003f7ea6 00000003 : sci.obj (.text:_SCI_enable)
003f7ea9 00000003 : sci.obj (.text:_SCI_enableRx)
003f7eac 00000003 : sci.obj (.text:_SCI_enableRxInt)
003f7eaf 00000003 : sci.obj (.text:_SCI_enableTx)
.cinit 0 003f7eb2 000000b6
003f7eb2 0000008d main.obj (.cinit)
003f7f3f 0000000f cmd_queue.obj (.cinit)
003f7f4e 0000000a rts2800_ml.lib : _lock.obj (.cinit)
003f7f58 0000000a : exit.obj (.cinit)
003f7f62 00000004 : errno.obj (.cinit)
003f7f66 00000002 --HOLE-- [fill = 0]
codestart
* 0 003f7ff6 00000002
003f7ff6 00000002 f2802x_codestartbranch.obj (codestart)
.reset 0 003fffc0 00000002 DSECT
003fffc0 00000002 rts2800_ml.lib : boot.obj (.reset)
vectors 0 003fffc2 00000000 DSECT
.stack 1 00000050 00000300 UNINITIALIZED
00000050 00000300 --HOLE--
DevEmuRegsFile
* 1 00000880 00000004 UNINITIALIZED
00000880 00000004 F2802x_GlobalVariableDefs.obj (DevEmuRegsFile)
SysPwrCtrlRegsFile
万分感谢
