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有没有EPWM模块中捕获控制逻辑的使用例程?我想配置为当发现外部信号变为高电平时,捕获到当前TBCTR的计数值。下面这个框图应该怎么理解?



  • 这是Controsuit里面提供的epwm_blanking_window例程 。只有偏移量和滤波窗口修改成了750和150.
    EPwm1Regs.TBPRD = 1000; // Set timer period
    EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
    EPwm1Regs.TBCTR = 0x0000; // Clear counter

    // Setup TBCLK
    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    // Setup compare
    EPwm1Regs.CMPA.half.CMPA = 500;

    // Set actions
    EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM1A on CAU

    // Use EPWM1B as a reference
    EPwm1Regs.AQCTLB.bit.ZRO = AQ_TOGGLE; // TOGGLE PWM1B on Zero

    // Define an event (DCAEVT1) based on TZ1 and TZ2
    // For blanking we must use the filtered event
    // Use the async path to avoid sync to TBCLK
    EALLOW;
    EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_TZ1; // DCAH = TZ1
    EPwm1Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_TZ2; // DCAL = TZ2
    EPwm1Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAL_HI_DCAH_LOW; // DCAEVT1 = DCAH low, DCAL high;
    EPwm1Regs.DCFCTL.bit.SRCSEL = DC_SRC_DCAEVT1; // DCEVTFLT Filter Source = DCAEVT1
    EPwm1Regs.DCACTL.bit.EVT1SRCSEL = DC_EVT_FLT; // DCAEVT1 = DCEVTFLT
    EPwm1Regs.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC; // Take asynch path

    // What do we want the event (DCAEVT1) to do?
    EPwm1Regs.TZCTL.bit.DCAEVT1 = TZ_FORCE_HI; // force high on DCAEVT1

    EPwm1Regs.DCFCTL.bit.PULSESEL = DC_PULSESEL_ZERO;
    EPwm1Regs.DCFOFFSET = 750;
    EPwm1Regs.DCFWINDOW = 150;
    EPwm1Regs.DCFCTL.bit.BLANKE = DC_BLANK_ENABLE;
    EPwm1Regs.DCFCTL.bit.BLANKINV = DC_BLANK_NOTINV;

    // Enable interrupt on the DCAEVT1
    EPwm1Regs.TZEINT.bit.DCAEVT1 = 1;
    EDIS;
  • 。上面图为程序的输出。为什么偏移750期间,EPWM1A输出高电平,滤波窗150期间为低,之后又变高??