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Each field in this register determines part of the GPIO mux configuration for one IO pin. A value of 0x0,0x4, 0x8, or 0xC configures the pin as a general-purpose IO. All other values select a peripheral to control the pin. See the device datasheet for a table of peripheral mux options. Pins must be set to GPIO mode using this register before changing the corresponding field in the GPBGMUX1 register.
GPIO B Peripheral Group Mux (GPIO32 to GPIO47)
Each field in this register determines part of the GPIO mux configuration for one IO pin. See the device datasheet for a table of peripheral mux options. Pins must be set to GPIO mode using the GPBMUX1 register before changing their configuration in this register.
