该工程我采用的是SPI外部引导,上电后可以成功的将EEPROM内容复制到ram中,但是如果将内部引导的文件codestartbranch.asm文件删除(即首地址0x3f7ff6存放的两个字),程序不能正常运行,所以我怀疑DSP还是运行的内部引导程序,我在DATASHEET上看到,如果能够复制EEPROM的内容,就不能再回到地址0x3f7ff6,因此,实验的现象似乎与TI 手册相矛盾,想问问有没有人做过SPI引导,给我些意见,非常感谢!
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该工程我采用的是SPI外部引导,上电后可以成功的将EEPROM内容复制到ram中,但是如果将内部引导的文件codestartbranch.asm文件删除(即首地址0x3f7ff6存放的两个字),程序不能正常运行,所以我怀疑DSP还是运行的内部引导程序,我在DATASHEET上看到,如果能够复制EEPROM的内容,就不能再回到地址0x3f7ff6,因此,实验的现象似乎与TI 手册相矛盾,想问问有没有人做过SPI引导,给我些意见,非常感谢!
我的程序主要是在函数_c_int00之前加了个bootloader函数,主要功能是三取二和将结果从flash搬移到ram区,因此,在文件DSP28xxx_CodeStartBranch.asm中,我将LB _c_int00改为LB _bootloader这样程序就可以正常运行,而且是内部引导的。现在,我想通过SPI外部引导,只想把copysection这部分放在外部EEPROM中,程序还是放在内部flash里,按照datasheet(SPRU095C)设计外部接口和数据格式,能够成功运行程序,为了判断该成功引导是外部引导,我将DSP28xxx_CodeStartBranch.asm里的LB _bootloader屏蔽(为了屏蔽内部引导),结果是外部EEprom正常将代码复制到指定的ram区域,但是程序不能成功运行,由此,我怀疑还是在运行的内部引导,但是我设置的是外部SPI引导,结果和预想的相冲突。
#pragma CODE_SECTION(bootloader, "copysections");
extern void c_int00();
// Prototype statements for functions found within this file.
interrupt void eva_timer1_isr(void);
void init_eva_timer1(void);
//extern unsigned int cinit_loadstart;
extern unsigned int cinit_runstart;
//extern unsigned int cinit_size;
//extern unsigned int const_loadstart;
extern unsigned int const_runstart;
//extern unsigned int const_size;
//extern unsigned int econst_loadstart;
extern unsigned int econst_runstart;
//extern unsigned int econst_size;
//extern unsigned int pinit_loadstart;
extern unsigned int pinit_runstart;
//extern unsigned int pinit_size;
//extern unsigned int switch_loadstart;
extern unsigned int switch_runstart;
//extern unsigned int switch_size;
//extern unsigned int text_loadstart;
extern unsigned int text_runstart;
//extern unsigned int text_size;
//extern unsigned int IQmath_loadstart;
extern unsigned int IQmath_runstart;
//extern unsigned int IQmath_size;
//extern unsigned int Flash28_API_LoadStart;
//extern unsigned int Flash28_API_size;
extern unsigned int RamfuncsRunStart;
//extern unsigned int cinit_loadend;
//extern unsigned int const_loadend;
/* extern unsigned int pinit_loadend; */
/* extern unsigned int econst_loadend; */
/* extern unsigned int switch_loadend; */
/* extern unsigned int text_loadend; */
/* extern unsigned int IQmath_loadend; */
/* extern unsigned int FlashfuncsLoadEnd; */
#define LoadADDRStartA_cinit_loadstart 0x003df77c //1
#define LoadADDRStartA_const_loadstart 0x003f8000
#define LoadADDRStartA_econst_loadstart 0x003e0da8
#define LoadADDRStartA_pinit_loadstart 0x003f8000
#define LoadADDRStartA_switch_loadstart 0x003f8000
#define LoadADDRStartA_text_loadstart 0x003dc000
#define LoadADDRStartA_IQmath_loadstart 0x003e089f
#define LoadADDRStartA_ramfuncs_loadstart 0x003e0cf2
#define LoadADDRStartB_cinit_loadstart 0x003e777c //2
#define LoadADDRStartB_const_loadstart 0x003f8000
#define LoadADDRStartB_econst_loadstart 0x003e8da8
#define LoadADDRStartB_pinit_loadstart 0x003f8000
#define LoadADDRStartB_switch_loadstart 0x003f8000
#define LoadADDRStartB_text_loadstart 0x003e4000
#define LoadADDRStartB_IQmath_loadstart 0x003e889f
#define LoadADDRStartB_ramfuncs_loadstart 0x003e8cf2
#define LoadADDRStartC_cinit_loadstart 0x003ef77c //3
#define LoadADDRStartC_const_loadstart 0x003f8000
#define LoadADDRStartC_econst_loadstart 0x003f0da8
#define LoadADDRStartC_pinit_loadstart 0x003f8000
#define LoadADDRStartC_switch_loadstart 0x003f8000
#define LoadADDRStartC_text_loadstart 0x003ec000
#define LoadADDRStartC_IQmath_loadstart 0x003f089f
#define LoadADDRStartC_ramfuncs_loadstart 0x003f0cf2
#define LoadADDR_cinit_length 0x0bd2
#define LoadADDR_const_length 0
#define LoadADDR_econst_length 0x046
#define LoadADDR_pinit_length 0
#define LoadADDR_switch_length 0
#define LoadADDR_text_length 0x1cf7
#define LoadADDR_IQmath_length 0x2c7
#define LoadADDR_ramfuncs_length 0xb5
void bootloader(void)
{
unsigned int *SourceAddr;
unsigned int *DestAddr;
unsigned int *SourceAddrB;//=(unsigned int *)LoadADDRStartB;
unsigned int *SourceAddrC;//=(unsigned int *)LoadADDRStartC;
unsigned int tmp=0;
tmp = (unsigned int)LoadADDR_text_length;
// tmp =(unsigned int)text_size;
DestAddr=&text_runstart;
// SourceEndAddr=&text_loadstart+&text_size;
// SourceEndAddr=&text_loadend;
SourceAddr=(unsigned int *)LoadADDRStartA_text_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_text_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_text_loadstart;
/* SourceAddr=&text_loadstart;
SourceAddrB =(unsigned int *)(&text_loadstart+LoadADDR_text_offsetB);
SourceAddrC =(unsigned int *)(&text_loadstart+LoadADDR_text_offsetC); */
//while(SourceAddr < SourceEndAddr)
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp = (unsigned int)LoadADDR_cinit_length;
// SourceAddr=&cinit_loadstart;
DestAddr=&cinit_runstart;
// SourceEndAddr=&cinit_loadstart+&cinit_size;
// SourceEndAddr=&cinit_loadend;
SourceAddr=(unsigned int *)LoadADDRStartA_cinit_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_cinit_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_cinit_loadstart;
// SourceAddrB =(unsigned int *)(&cinit_loadstart+LoadADDR_cinit_offsetB);
// SourceAddrC =(unsigned int *)(&cinit_loadstart+LoadADDR_cinit_offsetC);
//while(SourceAddr < SourceEndAddr)
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp =(unsigned int) LoadADDR_const_length;
DestAddr=&const_runstart;
SourceAddr=(unsigned int *)LoadADDRStartA_const_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_const_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_const_loadstart;
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp = (unsigned int)LoadADDR_econst_length;
DestAddr=&econst_runstart;
SourceAddr=(unsigned int *)LoadADDRStartA_econst_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_econst_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_econst_loadstart;
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp = (unsigned int)LoadADDR_pinit_length;
DestAddr=&pinit_runstart;
SourceAddr=(unsigned int *)LoadADDRStartA_pinit_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_pinit_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_pinit_loadstart;
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp = (unsigned int)LoadADDR_switch_length;
DestAddr=&switch_runstart;
SourceAddr=(unsigned int *)LoadADDRStartA_switch_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_switch_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_switch_loadstart;
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp = (unsigned int)LoadADDR_IQmath_length;
DestAddr=&IQmath_runstart;
SourceAddr=(unsigned int *)LoadADDRStartA_IQmath_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_IQmath_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_IQmath_loadstart;
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
tmp = (unsigned int)LoadADDR_ramfuncs_length;
DestAddr=&(RamfuncsRunStart);
SourceAddr=(unsigned int *)LoadADDRStartA_ramfuncs_loadstart;
SourceAddrB =(unsigned int *)LoadADDRStartB_ramfuncs_loadstart;
SourceAddrC =(unsigned int *)LoadADDRStartC_ramfuncs_loadstart;
while(tmp)
{
// *DestAddr++ = (*SourceAddr++);
*DestAddr++ = ((*SourceAddr)&(*SourceAddrB))|((*SourceAddr)&(*SourceAddrC))|((*SourceAddrB)&(*SourceAddrC));
SourceAddr++;
SourceAddrB++;
SourceAddrC++;
tmp--;
}
c_int00();
}
/*############################################################################
FILE: F281x_nonBIOS_flash.cmd
DESCRIPTION: Linker allocation for all sections.
############################################################################
Author: Tim Love
Release Date: March 2008
############################################################################*/
MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
RAM_L0L1 : origin = 0x008000, length = 0x001d20 /* on-chip RAM */
RAM_LL : origin = 0x009d20, length = 0x0002d0 /* on-chip RAM */
RAM_LL1 : origin = 0x3F9a00, length = 0x000100
RAM_LL2 : origin = 0x3F9b02, length = 0x0001c0
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
FLASH_I : origin = 0x3DA000, length = 0x002000 /* on-chip FLASH */
FLASH_J : origin = 0x3D8000, length = 0x002000 /* on-chip FLASH */
FLASH_GH : origin = 0x3DC000, length = 0x008000 /* on-chip FLASH */
FLASH_EF : origin = 0x3E4000, length = 0x008000 /* on-chip FLASH */
FLASH_CD : origin = 0x3EC000, length = 0x008000 /* on-chip FLASH */
FLASH_AB : origin = 0x3F4000, length = 0x003F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN_FLASH : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
RAM_H0 : origin = 0x3F8000, length = 0x000d00
RAM_H1 : origin = 0x3F8d00, length = 0x000660
ROM : origin = 0x3FF000, length = 0x000FC0 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */
RAMM0 : origin = 0x000000, length = 0x000400 /* on-chip RAM block M0 */
BOOT_RSVD : origin = 0x000400, length = 0x000080 /* Part of M1, BOOT rom will use this for stack */
RAMM1 : origin = 0x000480, length = 0x000320 /* on-chip RAM block M1 */
RAM_DH0 : origin = 0x3F9360, length = 0x0006a0
}
/**************************************************************/
/* Link all user defined sections */
/**************************************************************/
SECTIONS
{
/*** Code Security Password Locations ***/
csmpasswds : > CSM_PWL PAGE = 0 /* Used by file CSMPasswords.asm */
csm_rsvd : > CSM_RSVD PAGE = 0 /* Used by file CSMPasswords.asm */
/*** User Defined Sections ***/
codestart : > BEGIN_FLASH, PAGE = 0 /* Used by file CodeStartBranch.asm */
wddisable : > FLASH_GH, PAGE = 0 /* Used by file CodeStartBranch.asm */
/* copysections : > FLASH_GH, PAGE = 0 Used by file SectionCopy.asm */
/* IQmath : > RAM_LL PAGE = 0 Math Code */
IQmathTables : > ROM PAGE = 0, TYPE = NOLOAD /* Math Tables In ROM */
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT
/*** Uninitialized Sections ***/
.stack : > RAMM0 PAGE = 1
/* .ebss : > RAMM1 PAGE = 1*/
.ebss : > RAM_DH0 PAGE = 1
.esysmem : > RAMM1 PAGE = 1
/*** Initialized Sections ***/
.cinit : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_H0, PAGE = 0 /* Run section from RAM */
LOAD_START(_cinit_loadstart),
LOAD_END(_cinit_loadend),
RUN_START(_cinit_runstart),
SIZE(_cinit_size)
.const : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_H0, PAGE = 0 /* Run section from RAM */
LOAD_START(_const_loadstart),
LOAD_END(_const_loadend),
RUN_START(_const_runstart),
SIZE(_const_size)
.econst : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_H0, PAGE = 0 /* Run section from RAM */
LOAD_START(_econst_loadstart),
LOAD_END(_econst_loadend),
RUN_START(_econst_runstart),
SIZE(_econst_size)
.pinit : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_H0, PAGE = 0 /* Run section from RAM */
LOAD_START(_pinit_loadstart),
LOAD_END(_pinit_loadend),
RUN_START(_pinit_runstart),
SIZE(_pinit_size)
.switch : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_H0, PAGE = 0 /* Run section from RAM */
LOAD_START(_switch_loadstart),
LOAD_END(_switch_loadend),
RUN_START(_switch_runstart),
SIZE(_switch_size)
.text : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_L0L1, PAGE = 0 /* Run section from RAM */
LOAD_START(_text_loadstart),
LOAD_END(_text_loadend),
RUN_START(_text_runstart),
SIZE(_text_size)
Flashfuncs : LOAD =FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = FLASH_I, PAGE = 0 /* Run section from Flash */
LOAD_START(_FlashfuncsLoadStart),
LOAD_END(_FlashfuncsLoadEnd),
RUN_START(_FlashfuncsRunStart),
SIZE(_Flashfuncs_size)
IQmath : LOAD =FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_LL, PAGE = 0 /* Run section from Flash */
LOAD_START(_IQmath_loadstart),
LOAD_END(_IQmath_loadend),
RUN_START(_IQmath_runstart),
SIZE(_IQmath_size)
copysections : LOAD = FLASH_GH, PAGE = 0 /* Load section to Flash */
RUN = RAM_LL2, PAGE = 0 /* Run section from RAM */
LOAD_START(_copysections_loadstart),
LOAD_END(_copysections_loadend),
RUN_START(_copysections_runstart),
SIZE(_copysections_size)
Flash28_API :
{
-lFlash2812_API_V210.lib(.econst)
-lFlash2812_API_V210.lib(.text)
}
LOAD = FLASH_GH, PAGE = 0
RUN = RAM_H1, PAGE = 0
LOAD_START(_Flash28_API_LoadStart),
LOAD_END(_Flash28_API_LoadEnd),
RUN_START(_Flash28_API_RunStart)
SIZE(_Flash28_API_size)
ramfuncs : LOAD = FLASH_GH, PAGE = 0
RUN = RAM_LL1, PAGE = 0
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart)
}
/******************* end of file ************************/
额,非常抱歉,看了一下你的说明,跟我理解的SPI引导不同。没接触过你这种方法,这边处理不了这个问题,建议你转去E2E英文论坛上发帖咨询一下美国工程师:e2e.ti.com/.../171