F280049C采用3次事件触发时，无法进入中断

void Init_ePWM1()
{
EALLOW;
//Timebase clock
EPwm1Regs.TBCTL.bit.HSPCLKDIV =0; // High-speed clock prescalar HSPCLKDIV: 0x0=1,0x1=2,0x2=4,0x3=6...0x7=14
EPwm1Regs.TBCTL.bit.CLKDIV = 0; 

//Timebase, Counter-mode, Phase-shift, etc.
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm1Regs.TBPRD = PeriodLLCInit; // Period = TBPRD*TBCLK counts (for updown,additionaly*2); Switching frequency= PWMCLK/TBPRD
EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP; 
EPwm1Regs.TBPHS.bit.TBPHS = 0; // Set Phase register
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // TB_DISABLE=Master module TB_ENABLE=Slave module
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // TB_SHADOW/TB_IMMEDIATE
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; 
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // CC_SHADOW/CC_IMMEDIATE
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; // CC_SHADOW/CC_IMMEDIATE
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // CC_CTR_ZERO/CC_CTR_PRD/CC_CTR_ZERO_PRD/CC_LD_DISABLE
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // CC_CTR_ZERO/CC_CTR_PRD/CC_CTR_ZERO_PRD/CC_LD_DISABLE

//ePWM Actions [A]
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLA.bit.CAD = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLA.bit.CBU = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLA.bit.CBD = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE

//ePWM Actions [B]
EPwm1Regs.AQCTLB.bit.CAU = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLB.bit.CAD = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLB.bit.CBU = AQ_NO_ACTION; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE
EPwm1Regs.AQCTLB.bit.PRD = AQ_CLEAR; // AQ_NO_ACTION/AQ_CLEAR/AQ_SET/AQ_TOGGLE

//ePWM Deadband
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_RED_DBB_FED; // DBA_ALL /DBB_RED_DBA_FED/DBA_RED_DBB_FED/DBB_ALL
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // DB_DISABLE/DBA_ENABLE/DBB_ENABLE/DB_FULL_ENABLE
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // DB_ACTV_HI/DB_ACTV_LOC/DB_ACTV_HIC/DB_ACTV_LO
EPwm1Regs.DBFED.bit.DBFED = DB_FEDPri; // FED = DBFED*t_TBCLK, 1==0.01us
EPwm1Regs.DBRED.bit.DBRED = DB_FEDPri; // RED = DBRED*t_TBCLK, 1==0.01us

//ePWM Chopper
//Never used in a digital power supply

//ePWM Trip-Zone

EPwm1Regs.TZSEL.bit.OSHT1 = 0; 

// What do we want the TZ1 and TZ2 to do?
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // TZ_HIZ TZ_FORCE_HI TZ_FORCE_LO TZ_NO_CHANGE
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO;

// Enable TZ interrupt
EPwm1Regs.TZEINT.bit.OST = 0; // Trip-Zone interrupt 0==Disable 1==enable; ; Change enable source by Bit of OSH(or CBC)
// EPwm1Regs.TZEINT.bit.CBC = 1;

//ePWM Counter/Compare Initialization
EPwm1Regs.TBCTR = 0; // TBCTR
EPwm1Regs.CMPA.bit.CMPA = PeriodLLCInit>>1 ; // CMPA
EPwm1Regs.CMPB.bit.CMPB = 0; // CMPB

//ePWM Event-Trigger
// ---ePWM interrupt
EPwm1Regs.ETSEL.bit.INTEN = 1; // EPWMxINT interrupt enable;
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // trigger source of EPWMxINT : 
// EPwm1Regs.ETPS.bit.INTPSSEL = 1; // 选择0~3事件还是0~15个事件触发
EPwm1Regs.ETPS.bit.INTPRD = ET_3RD; // every ? event(s) : ET_DISABLE/ET_1ST/ET_2ND/ET_3RD

// ---SoC_A interrupt
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // SOCA interrupt enable;
EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD; // trigger source of SOCA : 
EPwm1Regs.ETPS.bit.SOCAPRD = ET_1ST; // every ? event(s) : ET_DISABLE/ET_1ST/ET_2ND/ET_3RD



EDIS;

}