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EMIF扩展SDRAM时的GPIO配置

工程师您好,

在EMIF扩展SDRAM时,为什么要将数据线以及掩码线的GPIO配置为异步采样,并且输出。不应该是同步采样吗?下面是例程中的配置。

对此有些疑惑,谢谢!

祝好心情!

//
//configure Data pins for Async mode
//
for (i = 69; i <= 85; i++)
{
if (i != 84)
{
GPIO_SetupPinOptions(i,0,0x31);
}
}

GPIO_SetupPinOptions(88,0,0x31);
GPIO_SetupPinOptions(89,0,0x31);
GPIO_SetupPinOptions(90,0,0x31);
GPIO_SetupPinOptions(91,0,0x31);

  • 同步模式设置位于EMIF模块下游的GPIO模块中。通过将GPIO设置为异步模式,EMIF将直接控制管脚活动,以提供正确的SDRAM信号时序。如果将GPIO设置为同步模式,则信号边缘将由GPIO模块时钟对齐(并可能延迟)。
  • 终于明白了,非常感谢Deng工的回复解答,谢谢!