EPwm1Regs.ETSEL.bit.SOCBEN = ET_CTR_ZERO; //Enable EPWM1SOCB pulse
EPwm1Regs.ETSEL.bit.SOCBSEL = ET_CTR_PRD; //Enable event time-base counter equal to period
EPwm1Regs.ETPS.bit.SOCBPRD = ET_3RD;//ET_1ST; // Generate EPWM1SOCB on 1st event //
EALLOW;
SyncSocRegs.ADCSOCOUTSELECT.bit.PWM1SOCBEN=1;
//Outputbar 6
OutputXbarRegs.OUTPUT1MUX0TO15CFG.bit.MUX15 = 0x01;
OutputXbarRegs.OUTPUT1MUXENABLE.bit.MUX15 = 1;
OutputXbarRegs.OUTPUTLATCHENABLE.bit.OUTPUT1=1;
// OutputXbarRegs.OUTPUTINV.bit.OUTPUT1=1;
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 3;
GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0;
EDIS;