我现在要实现分辨率周期，要用到TBPRDHR（不是高精度占空比）。是不是 TBCLK必须等于SYSCLKOUT才 可以。
也就是
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
这两个不能分频？
在SPRUI10–December 2018 的 。
4.2.3.4.1 High-Resolution Period Configuration
To use High Resolution Period, the ePWMx module must be initialized, following the steps in this exact
order:
1. Enable ePWMx clock
2. Disable TBCLKSYNC
3. Configure ePWMx registers - AQ, TBPRD, CC, etc.
• ePWMx may only be configured for up-count or up-down count modes. High-resolution period is
not compatible with down-count mode.
• TBCLK must equal SYSCLKOUT
• TBPRD and CC registers must be configured for shadow loads.
• CMPCTL[LOADAMODE]
– In up-count mode:CMPCTL[LOADAMODE] = 1 (load on CTR = PRD)
– In up-down count mode: CMPCTL[LOADAMODE] = 2 (load on CTR=0 or CTR=PRD)
4. Configure HRPWM register such that:
• HRCNFG[HRLOAD] = 2 (load on either CTR = 0 or CTR = PRD)
• HRCNFG[AUTOCONV] = 1 (Enable auto-conversion)
• HRCNFG[EDGMODE] = 3 (MEP control on both edges)
5. For TBPHS: TBPHSHR synchronization with high-resolution period, set both
HRPCTL[TBPSHRLOADE] = 1 and TBCTL[PHSEN] = 1. In up-down count mode these bits must be
set to 1 regardless of the contents of TBPHSHR.
6. Enable high-resolution period control (HRPCTL[HRPE] = 1)
7. Enable TBCLKSYNC
8. TBCTL[SWFSYNC] = 1
9. HRMSTEP must contain an accurate MEP scale factor (# of MEP steps per SYSCLKOUT coarse step)
because auto-conversion is enabled. The MEP scale factor can be acquired via the SFO() function
described in Section 4.4.
