无法进入HRCAP中断，芯片为TMS320F28069

关于HRCAP中断问题，

根据TI例程进行了软件配置，使用Timer0发送10KHZ的脉冲信号到HRCAP1，代码如下：

但匪夷所思的是，同样的代码，用TMS320F28063芯片，HRCAP1中断能够进去，不明白？？？？？

#include "F2806x_Device.h" 
#include "F2806x_Examples.h" 
#include "F2806x_EPwm_defines.h"

#include "..\include\main.h"
#include "..\include\hw_setup.h"

#define HCCAPCLK_FREQ 120 
#define HRCAP_SYSCLK_FREQ 60 
#define NUM_HCCAPCLKS_PER_HCSYSCLK HCCAPCLK_FREQ/HRCAP_SYSCLK_FREQ 
#define SYSCLK_FREQ 80

#define PWM1_TIMER_MIN 200
#define PWM1_TIMER_MAX 4000
#define PLL2SRC_INTOSC1 0

void HRCAP1_Config(void);
void ePWM8_Config(Uint16 period);
void Fail(void);
__interrupt void cpu_timer0_isr (void);

__interrupt void HRCAP1_Isr (void);

Uint16 first; // Count and Dly captured by 1st RISE/FALL event after cal, soft reset, or clock enable

Uint16 PULSELOW;
Uint16 PULSEHIGH=0;
Uint16 EPwm1TimerDirection;

// To keep track of which way the timer value is moving
#define EPWM_TIMER_UP 1
#define EPWM_TIMER_DOWN 0

void main(void)
{
InitSysCtrl();

InitPll2(PLL2_PLLSRC, PLL2_PLLMULT, PLL2_SYSCLK2DIV2DIS);

InitHRCapGpio();
GpioInit();

DINT;

InitPieCtrl();

// disable interrupts
IER = 0x0000; // clear interrupt enable regisger
IFR = 0x0000; // clear interrupt flag register (pending)

InitPieVectTable();

EALLOW; 
PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.HRCAP1_INT = &HRCAP1_Isr;
EDIS; 

InitCpuTimers();
StartCpuTimer0();

HRCAP1_Config(); // Configure HRCAP2 Module
//ePWM8_Config(1000);

first = 0;

PieCtrlRegs.PIECTRL.bit.ENPIE = 1; 
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
PieCtrlRegs.PIEIER4.bit.INTx7=1;
IER|=M_INT1 | M_INT4; 
ERTM;
EINT; 

for(;;)
{
__asm(" NOP"); // Set breakpoint here to debug
}
}

void ePWM8_Config(Uint16 period)
{
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;

EPwm8Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm8Regs.TBPRD = 8999;
EPwm8Regs.TBPHS.all = 0x00000000;
EPwm8Regs.AQCTLA.bit.PRD = AQ_TOGGLE; // Toggle on PRD

// TBCLK = SYSCLKOUT
EPwm8Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm8Regs.TBCTL.bit.CLKDIV = TB_DIV1;

EPwm1TimerDirection = EPWM_TIMER_UP;

EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;

}

void HRCAP1_Config(void)
{
EALLOW;
HRCap1Regs.HCCTL.bit.SOFTRESET = 1;
HRCap1Regs.HCCTL.bit.HCCAPCLKSEL = 1; // HCCAPCLK = PLL2CLK x 2
HRCap1Regs.HCCTL.bit.RISEINTE = 1; // Enable Rising Edge Capture Event Interrupt
HRCap1Regs.HCCTL.bit.FALLINTE = 0; // Disable Falling Edge Capture Event Interrupt
HRCap1Regs.HCCTL.bit.OVFINTE = 0; // Disable Interrupt on 16-bit Counter Overflow Event
}

__interrupt void HRCAP1_Isr (void)

{

EALLOW;

if (HRCap1Regs.HCIFR.bit.RISEOVF == 1) {
ESTOP0; // Another rising edge detected before ISR serviced.
}

if (first==0) {
first = 1; 
} else {

HRCap1Regs.HCCTL.bit.RISEINTE = 0; 

PULSEHIGH = HRCap1Regs.HCCAPCNTFALL1 + 1;

}

HRCap1Regs.HCICLR.all = 0x001F; // Clear all HRCAP interrupts
HRCap1Regs.HCCTL.bit.RISEINTE = 1; // Re-enable rising edge interrupts

HRCap1Regs.HCICLR.bit.INT=1; // Clear HRCAP interrupt flag
PieCtrlRegs.PIEACK.bit.ACK4=1; // Acknowledge PIE Group 4 interrupts.
EDIS;

}

__interrupt void cpu_timer0_isr (void)
{
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;
}