This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

EPWM同步问题及输出



本人现在做多模块移相控制的高压变频器,模块采用updown计数的载波1khz,模块每1ms从主控机得到1ms的中断,并发送同步指令EPwm1Regs.TBCTL.bit.SWFSYNC = 1;各个模块的相位PH不一样,

问题:当PH大于CMPA时,EPWMA和EPWMB总是一个高电平一个低电平,CMPA不起作用。当PH小于CMPA时,输出波形正常。

把载波换成up计数方式,PH大于或小于CMPA时,输出波形都正常。

  • 请问你使用的是哪款芯片?对应的PWM模块配置是什么样的?
    另外,“EPWMA和EPWMB总是一个高电平一个低电平”应该是跟波形互补有关,我希望看一下你的正常波形和CMPA不起作用时候的波形
  • 28035

    EPwm1Regs.TBPRD = PWM1TS;//30000

    EPwm1Regs.TBPHS.half.TBPHS = PHDIFF*modularnum + PHMODULAR1;//模块一3750,每个模块相差7500
    EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP;

    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
    EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
    EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
    EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm1Regs.CMPCTL.bit.SHDWAFULL = CC_IMMEDIATE;
    EPwm1Regs.TBCTR = 0;

    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;

    EPwm1Regs.CMPA.half.CMPA = 0;
    EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
    EPwm1Regs.AQCTLA.bit.CAD = AQ_SET;

    EPwm1Regs.AQCSFRC.bit.CSFA = 1;
    EPwm1Regs.AQCSFRC.bit.CSFB = 1;

    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBFED = DBCLKS; //120*TBCLKs = 2000 nsec
    EPwm1Regs.DBRED = DBCLKS;

    我要做逆变、变频,CMPA值肯定每个周期不同,每个模块的PH值是固定的,当PH大于CMPA,波形就不对了,假如不发同步指令,PWM会按CMPA来变化。