TMS320F28035 HRPWM SFO()的问题

感觉象是编译的时候没有找对SFO.C的路径。看你的路径是2802x的

点击SFO.c 右键选择properties。重新选一下路径。在弹出的对话框中点Resouce  右边的loaction一栏重选路径。

我也遇到了同样的问题，不采用仿真的时候发现不了，一旦用仿真，按下暂停键就会提示如楼上的错误，有些工程有没有这个问题，请问需要做什么特殊设置嘛，我仿真的时候，发现程序无法正常往下执行了，卡在了PWM初始化这个地方了。

我按照原来的CLA工程进行一步步修改测试，发现当修改CMD文件的内存分配的时候，会出现这个错误：
Can't find a source file at "C:\tidcs\c28\DSP2802x\INT3\DSP2802x_testing\SFO_v6_lib_build
并且程序会停留在如下函数段。TI的工程师大神们，能帮忙解释下原因嘛，一旦出现后该如何修复，需要把CMD文件更改回去嘛，可能我添加了部分文件，原来的CMD文件已经不满足需求了，必须要更改CMD文件才能进行开发。

// 查询MEP是否自动更新完成
while(uiMEP == SFO_INCOMPLETE) // Call until complete
{
uiMEP = SFO();
if(uiMEP == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & # of MEP steps/coarse step
} // exceeds maximum of 255.
}


附上CMD文件，帮忙分析下原因：
_Cla1Prog_Start = _Cla1funcsRunStart;
-heap 0x300
-stack 0x300

// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
// CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
RAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */
RAML1 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 */
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
// FLASHH : origin = 0x3E8000, length = 0x002000 /* on-chip FLASH */
// FLASHG : origin = 0x3EA000, length = 0x002000 /* on-chip FLASH */
FLASHF : origin = 0x3E8000, length = 0x002000 /* on-chip FLASH */
FLASHE : origin = 0x3EA000, length = 0x002000 /* on-chip FLASH */
FLASHD : origin = 0x3EC000, length = 0x002000 /* on-chip FLASH */
FLASHC : origin = 0x3EE000, length = 0x006000 /* on-chip FLASH */
FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */

IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */

ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML0 : origin = 0x009000, length = 0x000800 /* on-chip RAM block L0 */
CLARAM0 : origin = 0x009800, length = 0x000400
CLARAM1 : origin = 0x009C00, length = 0x000400

CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080

FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASH */

}

/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

/* Allocate program areas: */
.cinit : > FLASHA PAGE = 0
.pinit : > FLASHA, PAGE = 0
.text : > FLASHC PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHD,
RUN = RAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
RUN_START(_RamfuncsRunStart),
PAGE = 0

csmpasswds : > CSM_PWL_P0 PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.cio : > RAML0 PAGE = 1
.sysmem : > RAMM1 PAGE = 1
.ebss : > RAML0 PAGE = 1
.esysmem : > RAML0 PAGE = 1


/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASHA PAGE = 0
.switch : > FLASHA PAGE = 0

/* Allocate IQ math areas: */
IQmath : > FLASHA PAGE = 0 /* Math Code */
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

.bss_cla : > CLARAM1, PAGE = 1

Cla1Prog : LOAD = FLASHD,
RUN = RAML1,
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
LOAD_SIZE(_Cla1funcsLoadSize),
PAGE = 0

Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
Cla1DataRam0 : > CLARAM0, PAGE = 1
Cla1DataRam1 : > CLARAM1, PAGE = 1

GROUP : LOAD = FLASHB,
RUN = CLARAM1,
LOAD_START(_Cla1mathTablesLoadStart),
LOAD_END(_Cla1mathTablesLoadEnd),
RUN_START(_Cla1mathTablesRunStart),
LOAD_SIZE(_Cla1mathTablesLoadSize),
PAGE = 1

{
CLA1mathTables
.const_cla
}

CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > CLARAM1,
PAGE = 1

/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

}
*/

/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT

}