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以dsp2812为例，cpu支持的最大时钟频率为150Mhz。PLL锁相环倍频最大值为10，经过2分频以后，进入cpu的时钟为无源晶振频率的5倍，所以选取的无源晶振大小为30Mhz。这个是这样选的吗？
