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DSP28335的ePWM模块输出引脚默认不采用上拉电阻



大家好,最近有个疑惑想请假一下,问题如下:

1.在C2000的电机库例程中,为什么ePWM脉冲输出的引脚内置的上拉电阻默认是禁止的,其余的GPIO引脚默认的是使能上拉电阻?这样做是出于什么原因呢?

2.若GPIO作为输出引脚,配置为上拉或不上拉电阻,是否对输出电平逻辑产生影响?

3.同理,若GPIO作为输入引脚,配置为上拉或不上拉电阻,是否对接收的电平逻辑产生影响?