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41. Why do you use align directive (ALIGN(x)) in the linker cmd files provided in the C2000Ware examples?
Answer. Fapi_AutoEccGeneration mode (one of the Flash API programming modes) programs the supplied data portion in Flash along with automatically generated ECC. The ECC is calculated for 64-bit aligned address and the corresponding 64-bit data. Any data not supplied (within a given 64-bit aligned memory) is treated as 0xFFFF. Note that there are practical implications of this when writing a custom programming utility that streams in the output file of a code project and programs the individual sections one at a time into flash. If a 64-bit word spans more than one section (that is, contains the end of one section, and the start of another), values of 0xFFFF cannot be assumed for the missing data in the 64-bit word, when programming the first section. When you go to program the second section, you will not be able to program the ECC for the first 64-bit word since it was already (incorrectly) computed and programmed using assumed 0xFFFF for the missing values. One way to avoid this problem is to align all sections linked to flash on a 64-bit boundary (preferable is 128-bit alignment since most of the flash programmers program 128-bits at-a-time) in the linker command file for your code project.
Here is an example for C28x (For ARM, ALIGN(16) should be used):
SECTIONS
{
.text : > FLASH, PAGE= 0, ALIGN(8) /* Here ALIGN(8) makes sure that .text section starts on a 128-bit aligned memory address*/
.cinit: > FLASH, PAGE = 0, ALIGN(8)
.const: > FLASH, PAGE = 0, ALIGN(8)
.econst: > FLASH, PAGE = 0, ALIGN(8)
.pinit: > FLASH, PAGE= 0, ALIGN(8)
.switch: > FLASH, PAGE= 0, ALIGN(8)
}
If you do not align the sections in flash, you would need to track incomplete 64-bit words in a section and combine them with the words in other sections that complete the 64-bit word. This will be difficult to do. So it is recommended to align your sections on 64-bit boundaries (128-bit alignment is preferable since most of the programmers program 128-bits at-a-time).
10. How many bits can be programmed at a time using Fapi_issueProgrammingCommand()?
Answer. Due to architectural reasons, FSM (in FMC) can program only within a 128-bit aligned memory at a time and not across two 128-bit aligned memory ranges. Hence,
(i) if the address is 128-bit aligned, then a max of eight 16-bit words (128-bits) can be programmed at a time.
(ii) if the address is “128-bit aligned address+1”, then a max of seven 16-bit words can be programmed at a time.
(iii) if the address is “128-bit aligned address+2”, then a max of six 16-bit words can be programmed at a time.
(iv) if the address is “128-bit aligned address+3”, then a max of five 16-bit words can be programmed at a time.
(v) if the address is “128-bit aligned address+4”, then a max of four 16-bit words can be programmed at a time.
(vi) if the address is “128-bit aligned address+5”, then a max of three 16-bit words can be programmed at a time.
(vii) if the address is “128-bit aligned address+6”, then a max of two 16-bit words can be programmed at a time.
(viii) if the address is “128-bit aligned address+7”, then a max of one 16-bit words can be programmed at a time.
Example: Consider an address that is 128-bit (8*16-bit) aligned; Say 0x80000 (0x80000 mod 8 = 0).
(i) If the address given for programming is 0x80000, a max of 8*16-bits can be programmed
(ii) If the address given for programming is 0x80001, a max of 7*16-bits can be programmed
(iii) If the address given for programming is 0x80002, a max of 6*16-bits can be programmed……..
(iv) If the address given for programming is 0x80007, a max of 1*16-bits can be programmed
