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TMS320F280025: ADC同步采样问题

Part Number: TMS320F280025

我想实现ADC同步采样,按如下配置,在ADC Result寄存器只能得到前面4个的结果,后面的都为0,请问是哪里配置不对吗?

EPwm6Regs.ETSEL.bit.SOCAEN = 1; // Disable SOC on A group
EPwm6Regs.ETSEL.bit.SOCASEL = 3; // Select SOC on up-count
EPwm6Regs.ETPS.bit.SOCAPRD = ET_1ST; // Generate pulse on 1st event

EPwm6Regs.CMPA.bit.CMPA = 0; // Set compare A value to 0 counts
EPwm6Regs.TBPRD = ADC_PERIOD_COUNT; // Set period to 4096 counts

EPwm6Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Freeze counter

AdcaRegs.ADCSOC0CTL.bit.CHSEL = ADC_CH_ADCIN1;
AdcaRegs.ADCSOC0CTL.bit.ACQPS = 6; //SOC0 will use sample duration of 7 SYSCLK cycles
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;
AdccRegs.ADCSOC0CTL.bit.CHSEL = ADC_CH_ADCIN1;
AdccRegs.ADCSOC0CTL.bit.ACQPS = 6;
AdccRegs.ADCSOC0CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA; //SOC0 will begin conversion on ePWM6 SOCA

AdcaRegs.ADCSOC1CTL.bit.CHSEL = ADC_CH_ADCIN2;
AdcaRegs.ADCSOC1CTL.bit.ACQPS = 6;
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;
AdccRegs.ADCSOC1CTL.bit.CHSEL = ADC_CH_ADCIN2;
AdccRegs.ADCSOC1CTL.bit.ACQPS = 6;
AdccRegs.ADCSOC1CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;

AdcaRegs.ADCSOC2CTL.bit.CHSEL = ADC_CH_ADCIN8;
AdcaRegs.ADCSOC2CTL.bit.ACQPS = 6;
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;
AdccRegs.ADCSOC2CTL.bit.CHSEL = ADC_CH_ADCIN8;
AdccRegs.ADCSOC2CTL.bit.ACQPS = 6;
AdccRegs.ADCSOC2CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;

AdcaRegs.ADCSOC3CTL.bit.CHSEL = ADC_CH_ADCIN0;
AdcaRegs.ADCSOC3CTL.bit.ACQPS = 6;
AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;
AdccRegs.ADCSOC3CTL.bit.CHSEL = ADC_CH_ADCIN12;
AdccRegs.ADCSOC3CTL.bit.ACQPS = 6;
AdccRegs.ADCSOC3CTL.bit.TRIGSEL = ADC_TRIGGER_EPWM6_SOCA;

AdccRegs.ADCINTSEL1N2.bit.INT1SEL = ADC_SOC_NUMBER3; // End of SOC3 will set INT1 flag
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1; // Enable INT1 flag
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Make sure INT1 flag is cleared