F28069 ADCINA0 ADCIMB0 两个通道同时用TI定时器定时触发以下配置可行吗？
AdcRegs.ADCCTL1.bit.ADCREFSEL = 1; // Page485 选择外部VREF
AdcRegs.ADCCTL2.bit.ADCNONOVERLAP = 1; // Enable non-overlap mode 0允许重叠/1不允许
AdcRegs.INTSEL1N2.bit.INT1E = 1; //Enabled ADCINT1
AdcRegs.INTSEL1N2.bit.INT1CONT = 0; //Disable ADCINT1 Continuous mode 0--CLOSE
AdcRegs.INTSEL1N2.bit.INT1SEL = 1; //setup EOC0 to trigger ADCINT1 to fire
AdcRegs.ADCSAMPLEMODE.bit.SIMULEN0 = 1; // 同时采样
AdcRegs.ADCSOC0CTL.bit.CHSEL = 0; //set SOC0 channel select to ADCINA0
AdcRegs.ADCSOC1CTL.bit.CHSEL = 8; //set SOC1 channel select to ADCINB0 page510 这句配置成SOC1
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 2; //set SOC0 start trigger on software 触发源 T1
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 2; //set SOC1 start trigger on software
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; //ADCINT1 trips after AdcResults latch
AdcRegs.ADCINTSOCSEL1.bit.SOC0 = 1; //
AdcRegs.ADCINTSOCSEL1.bit.SOC1 = 1; //ADCINT2 will trigger SOC0. TRIGSEL field is ignored.
