Original question:
在基础例程“ipc_ex1_basic_c28x1”和“ipc_ex1_basic_cm” 更改为CM4发送，CPU1接收，更改部分在代码中有中文注释，但是CPU1进入一次中断后，并给CM4回传一个ACK,但CM4一直停留在 IPC_waitForAck(IPC_CM_L_CPU1_R, IPC_FLAG0); 请问是什么原因造成的。谢谢！
CPU1代码：
//#############################################################################
//
// FILE: ipc_ex1_basic_c28x1.c
//
// TITLE: IPC example with interrupt
//
//! \addtogroup driver_cm_c28x_dual_example_list
//! <h1> IPC basic message passing example with interrupt </h1>
//!
//! This example demonstrates how to configure IPC and pass information from
//! C28x to CM core without message queues.
//! It is recommended to run the C28x1 core first, followed by the CM core.
//!
//! \b External \b Connections \n
//! - None.
//!
//! \b Watch \b Variables \n
//! - pass
//!
//
//#############################################################################
// $Copyright:
// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
//
// Included Files
//
#include "driverlib.h"
#include "device.h"
//
// Defines
//
#define IPC_CMD_READ_MEM 0x1001
#define IPC_CMD_RESP 0x2001
#define TEST_PASS 0x5555
#define TEST_FAIL 0xAAAA
#pragma DATA_SECTION(readData, "MSGRAM_CPU_TO_CM")
uint32_t readData[512];
uint32_t readarry[10];
uint32_t pass;
__interrupt void IPC_ISR0() //添加中断接收代码
{
int i;
uint32_t command, addr, data;
bool status = false;
//
// Read the command
//
IPC_readCommand(IPC_CPU1_L_CM_R, IPC_FLAG0, IPC_ADDR_CORRECTION_DISABLE,
&command, &addr, &data);
if(command == IPC_CMD_READ_MEM)
{
status = true;
//
// Read and compare data
//
for(i=0; i<data; i++)
{
if(*((uint32_t *)addr + i) != i)
status = false;
// readarry[i] = *((uint32_t *)addr + i);
}
}
//
// Acknowledge the flag
//
IPC_ackFlagRtoL(IPC_CPU1_L_CM_R, IPC_FLAG0); //回传一个ACK
//
// Send response to C28x core
//
if(status)
{
IPC_sendResponse(IPC_CPU1_L_CM_R, TEST_PASS);
}
else
{
IPC_sendResponse(IPC_CPU1_L_CM_R, TEST_FAIL);
}
//
// Acknowledge the PIE interrupt.
//
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}
//
// Main
//
void main(void)
{
int i;
//
// Initialize device clock and peripherals
//
Device_init();
//
// Boot CM core
//
#ifdef _FLASH
Device_bootCM(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
#else
Device_bootCM(BOOTMODE_BOOT_TO_S0RAM);
#endif
//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();
//
// Clear any IPC flags if set already
//
IPC_clearFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG_ALL);
IPC_registerInterrupt(IPC_CPU1_L_CM_R, IPC_INT0, IPC_ISR0); //添加了IPC_ISR0接收中断
//
// Synchronize both the cores.
//
IPC_sync(IPC_CPU1_L_CM_R, IPC_FLAG31);
//
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
//
EINT;
ERTM;
//
// End of example. Loop forever
//
while(1)
{
//
// Fill in the data to be sent
//
// for(i=0; i<512; i++)
// {
// readData[i] = i;
// }
//
// //
// // Send a message without message queue
// // Since C28x and CM does not share the same address space for shared RAM,
// // ADDRESS_CORRECTION is enabled
// // Length of the data to be read is passed as data.
// //
// IPC_sendCommand(IPC_CPU1_L_CM_R, IPC_FLAG0, IPC_ADDR_CORRECTION_ENABLE,
// IPC_CMD_READ_MEM, (uint32_t)readData, 512);
//
// //
// // Wait for acknowledgment
// //
// IPC_waitForAck(IPC_CPU1_L_CM_R, IPC_FLAG0);
//
// //
// // Read response
// //
// if(IPC_getResponse(IPC_CPU1_L_CM_R) == TEST_PASS)
// {
// pass = 1;
// }
// else
// {
// pass = 0;
// }
}
}
//
// End of File
//
CM4代码：
//#############################################################################
//
// FILE: ipc_ex1_basic_cm.c
//
// TITLE: IPC example with interrupt
//
//! \addtogroup driver_cm_c28x_dual_example_list
//! <h1> IPC basic message passing example with interrupt </h1>
//!
//! This example demonstrates how to configure IPC and pass information from
//! C28x to CM core without message queues
//! It is recommended to run the C28x1 core first, followed by the CM core.
//!
//! \b External \b Connections \n
//! - None.
//!
//! \b Watch \b Variables \n
//! - None.
//!
//
//#############################################################################
// $Copyright:
// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
//
// Included Files
//
#include "cm.h"
#include "ipc.h"
//
// Defines
//
#define IPC_CMD_READ_MEM 0x1001
#define IPC_CMD_RESP 0x2001
#define TEST_PASS 0x5555
#define TEST_FAIL 0xAAAA
#pragma DATA_SECTION(readData, "MSGRAM_CM_TO_CPU1")
uint32_t readData[10];
uint32_t readarry[512];
uint32_t pass;
//
// IPC ISR for Flag 0.
// C28x core sends data without message queue using Flag 0
//
__interrupt void IPC_ISR0()
{
int i;
uint32_t command, addr, data;
bool status = false;
//
// Read the command
//
IPC_readCommand(IPC_CM_L_CPU1_R, IPC_FLAG0, IPC_ADDR_CORRECTION_ENABLE,
&command, &addr, &data);
if(command == IPC_CMD_READ_MEM)
{
status = true;
//
// Read and compare data
//
for(i=0; i<data; i++)
{
if(*((uint32_t *)addr + i) != i)
status = false;
readarry[i] = *((uint32_t *)addr + i);
}
}
//
// Send response to C28x core
//
if(status)
{
IPC_sendResponse(IPC_CM_L_CPU1_R, TEST_PASS);
}
else
{
IPC_sendResponse(IPC_CM_L_CPU1_R, TEST_FAIL);
}
//
// Acknowledge the flag
//
IPC_ackFlagRtoL(IPC_CM_L_CPU1_R, IPC_FLAG0);
}
//
// Main
//
void main(void)
{
//
// Initialize device clock and peripherals
//
CM_init();
//
// Clear any IPC flags if set already
//
IPC_clearFlagLtoR(IPC_CM_L_CPU1_R, IPC_FLAG_ALL);
//
// Enable IPC interrupts
//
// IPC_registerInterrupt(IPC_CM_L_CPU1_R, IPC_INT0, IPC_ISR0); //屏蔽掉IPC_INT0中断
//
// Synchronize both the cores.
//
IPC_sync(IPC_CM_L_CPU1_R, IPC_FLAG31);
//
// Loop forever. Wait for IPC interrupt
//
uint16_t i;
while(1) //循环发送消息
{
for(i=0; i<10; i++)
{
readData[i] = i;
}
//
// Send a message without message queue
// Since C28x and CM does not share the same address space for shared RAM,
// ADDRESS_CORRECTION is enabled
// Length of the data to be read is passed as data.
//
IPC_sendCommand(IPC_CM_L_CPU1_R, IPC_FLAG0, IPC_ADDR_CORRECTION_ENABLE,
IPC_CMD_READ_MEM, (uint32_t)readData, 10);
//
// Wait for acknowledgment
//
IPC_waitForAck(IPC_CM_L_CPU1_R, IPC_FLAG0); //程序一直停留在此
//
// Read response
//
if(IPC_getResponse(IPC_CM_L_CPU1_R) == TEST_PASS)
{
pass = 1;
}
else
{
pass = 0;
}
}
}
//
// End of File
//
