大家好。我最近新入手了一套H52C1 Concerto 实验板套件,也就是F28M35H52C1的controlCARD和DOCKINGSTATION。使用的CCS是CCS V5.5。
当我设置了configeration再test connnection时结果总是 “The JTAG DR Integrity scan-test has failed.”
而在编译后如果DEBUG就会出现这样的信息,

此外,我的congfigeration设置如下:
忘各位大侠解答!
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大家好。我最近新入手了一套H52C1 Concerto 实验板套件,也就是F28M35H52C1的controlCARD和DOCKINGSTATION。使用的CCS是CCS V5.5。
当我设置了configeration再test connnection时结果总是 “The JTAG DR Integrity scan-test has failed.”
而在编译后如果DEBUG就会出现这样的信息,

此外,我的congfigeration设置如下:
忘各位大侠解答!
如果是仿真模式,如在CCS上调试,Reset 》 restart 或是烧写完芯片后,芯片自动跳到main入口,它已经屏蔽掉这个引导的过程。
master指的是M3,如C:\ti\controlSUITE\device_support\f28m35x\v202\F28M35x_examples_Control\setup_m3\m3例程中:
#ifdef _STANDALONE
#ifdef _FLASH
// Send boot command to allow the C28 application to begin execution
IPCMtoCBootControlSystem(CBROM_MTOC_BOOTMODE_BOOT_FROM_FLASH);
#else
// Send boot command to allow the C28 application to begin execution
IPCMtoCBootControlSystem(CBROM_MTOC_BOOTMODE_BOOT_FROM_RAM);
#endif
#endif
Eric