void configDMA32Channel1()
{
//
// Configure DMA Channel 1
//
DMA_disableInterrupt(DMA_CH1_BASE);
//
// Configure 2 word per burst. Increment one 16-bit address between words
// for src & dest address.
//
DMA_configBurst(DMA_CH1_BASE, 2U, 1U, 1U);
//
// Configure 63 bursts per transfer. For src move to next word in buffer
// after each word in a burst. For dest go back to DXR2.
//
DMA_configTransfer(DMA_CH1_BASE, 64, 1, 0xFFFF);
//
// Src start address = buffer & dest start address = MCBSPA DXR
//
DMA_configAddresses(DMA_CH1_BASE,(const void*)(MCBSPA_BASE + MCBSP_O_DXR2),
(const void*)(&txData[0]));
//
// Clear peripheral interrupt event flag.
//
DMA_clearTriggerFlag(DMA_CH1_BASE);
//
// Clear sync error flag.
//
DMA_clearErrorFlag(DMA_CH1_BASE);
//
// Configure wrap size to maximum to avoid wrapping.
//
DMA_configWrap(DMA_CH1_BASE, 0x10000U, 0, 0x10000U, 0);
//
// Enable channel interrupt.
//
DMA_enableInterrupt(DMA_CH1_BASE);
//
// Interrupt at end of the transfer.
//
DMA_setInterruptMode(DMA_CH1_BASE, DMA_INT_AT_END);
//
// Enable selected peripheral trigger to start a DMA transfer on DMA
// channel 1.
//
DMA_enableTrigger(DMA_CH1_BASE);
//
// Configure DMA trigger source as McBSPA Tx EVT.
//
DMA_configMode(DMA_CH1_BASE, DMA_TRIGGER_MCBSPAMXEVT, 0);
//
// Clear any spurious Peripheral interrupts flags.
//
DMA_clearTriggerFlag(DMA_CH1_BASE);这是DMA的配置
void initMcBSPA()
{
//
// Reset FS generator, sample rate generator, transmitter & receiver.
//
McBSP_resetFrameSyncLogic(MCBSPA_BASE);
McBSP_resetSampleRateGenerator(MCBSPA_BASE);
McBSP_resetTransmitter(MCBSPA_BASE);
McBSP_resetReceiver(MCBSPA_BASE);
//
// Set Rx sign-extension and justification mode.设置左对齐，补充零
//
McBSP_setRxSignExtension(MCBSPA_BASE, MCBSP_LEFT_JUSTIFY_FILL_ZER0);
//
// Enable DLB mode. Comment out for non-DLB mode.
//
//McBSP_enableLoopback(MCBSPA_BASE);
//
// Set Rx & Tx delay to 1 cycle. 发送和接受数据都延迟0位
//
McBSP_setRxDataDelayBits(MCBSPA_BASE, MCBSP_DATA_DELAY_BIT_0);
McBSP_setTxDataDelayBits(MCBSPA_BASE, MCBSP_DATA_DELAY_BIT_0);
//
// Set CLKX & FSX source as sample rate generator. 选择发送时钟和帧同步都来自于内部时钟
//
McBSP_setTxClockSource(MCBSPA_BASE, MCBSP_INTERNAL_TX_CLOCK_SOURCE);
McBSP_setTxFrameSyncSource(MCBSPA_BASE, MCBSP_TX_INTERNAL_FRAME_SYNC_SOURCE);
McBSP_setRxFrameSyncSource(MCBSPA_BASE, MCBSP_RX_EXTERNAL_FRAME_SYNC_SOURCE);
McBSP_setRxClockSource(MCBSPA_BASE, MCBSP_EXTERNAL_RX_CLOCK_SOURCE);
//
// Configure McBSP data behaviour. 设置为单相帧，每个字有32位，每个帧有4个字
//
McBSP_setRxDataSize(MCBSPA_BASE, MCBSP_PHASE_ONE_FRAME,
MCBSP_BITS_PER_WORD_32, 3);
McBSP_setTxDataSize(MCBSPA_BASE, MCBSP_PHASE_ONE_FRAME,
MCBSP_BITS_PER_WORD_32, 3);
//
// Set frame-sync pulse period.
//
McBSP_setFrameSyncPulsePeriod(MCBSPA_BASE, 127);
//
// Set frame-sync pulse width.
//
McBSP_setFrameSyncPulseWidthDivider(MCBSPA_BASE, 0);
//
// Set the trigger source for internally generated frame-sync pulse. 发送帧同步由采样率生成器产生
//
McBSP_setTxInternalFrameSyncSource(MCBSPA_BASE,
MCBSP_TX_INTERNAL_FRAME_SYNC_SRG);
//
// Set LSPCLK as input source for sample rate generator.
//
McBSP_setTxSRGClockSource(MCBSPA_BASE, MCBSP_SRG_TX_CLOCK_SOURCE_LSPCLK);
// McBSP_setRxSRGClockSource(MCBSPA_BASE, MCBSP_SRG_RX_CLOCK_SOURCE_MCLKX_PIN);
//
// Set Divide down value for CLKG.
//
McBSP_setSRGDataClockDivider(MCBSPA_BASE, 3);
//
// Set no external clock sync for CLKG.
//
McBSP_disableSRGSyncFSR(MCBSPA_BASE);
//
// Enable Tx and Rx interrupts.
//
McBSP_enableRxInterrupt(MCBSPA_BASE);
McBSP_enableTxInterrupt(MCBSPA_BASE);
//
// Wait for CPU cycles equivalent to 2 SRG cycles-init delay.
// Total cycles required = 2*(SYSCLK/LSPCLK). In this example
// LSPCLK = SYSCLK/4.
//
MCBSP_CYCLE_NOP(8);
//
// Enable Sample rate generator and wait for at least 2 CLKG clock cycles.
//
McBSP_enableSampleRateGenerator(MCBSPA_BASE);
//
// Wait for CPU cycles equivalent to 2 CLKG cycles-init delay.
// Total cycles required = 2*(SYSCLK/(LSPCLK/(1+CLKGDV_VAL))). In this
// example LSPCLK = SYSCLK/4 and CLKGDV_VAL = 1.
//
MCBSP_CYCLE_NOP(16);
//
// Release Rx, Tx from reset.
//
McBSP_enableReceiver(MCBSPA_BASE);
McBSP_enableTransmitter(MCBSPA_BASE);
McBSP_enableFrameSyncLogic(MCBSPA_BASE);
}这是mcbsp的配置
请问我应该如何去配置
