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ADCCTL2.PRESCALE决定了 ADCCLK 也就决定了数据转换的时间(The ADCCLK is used to clock the converter),那是不是将PRESCALE位设为0000 ADCCLK = Input Clock / 1.0是最好的呢,转换速度最快?
这要取决于你的主时钟频率是多少,如果主时钟大于datasheet规定的ADCCLK 50MHZ,那就必须使用这个寄存器进行分频。ADC的输入时钟最大为50Mhz,如果超过这个数值,会导致采样偏离很大。