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RT，在2812的XCLKOUT引脚分别加上1M和50欧姆的负载，是否会影响系统时钟信号（频率，幅度等）呢？因为查数据手册，XCLKOUT是系统时钟的分频输出，相当于系统时钟到XCLKOUT之间是存在许多CMOS门电路的。
先自己顶一下。
