TMS320F280039C: Memcpy函数

//
// bankSelect -  Located at the beginning of bank 0 (0x80000),
//               Bank_Select branches to the most recently programmed
//               bank after execution of the Live DFU command.
//               If a bank has not been programmed using the Live
//               DFU command, it branches to the kernel setup so that
//               the command can be used to program bank 1.
//
#ifdef __cplusplus
#pragma CODE_SECTION("codestart");
#else
#pragma CODE_SECTION(bankSelect, "codestart");
#endif

void bankSelect(void)
{
    uint32_t REV_BANK0 = HWREG((uint32_t)B0_REV_ADD); // Read the revision value of bank 0
    uint32_t REV_BANK1 = HWREG((uint32_t)B1_REV_ADD); // Read the revision value of bank 1

    Device_Init(); //在这个函数里将将FLASH_API函数搬运至RAMGS2中，并进行了时钟配置
    Flash_Init(); // Initialize the Flash API


    if (REV_BANK1 < REV_BANK0)
    {
        asm("    LB 0x9FF00");
    }
    else
    {
        asm("    LB 0x8FF00");
    }
}

void Device_Init(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();

#ifdef _FLASH
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);  //测试这个搬运函数执行时间约30ms
    
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES); // InitFlash();
#endif
    
    //
    // Set up PLL control and clock dividers
    //设置晶振源
    SysCtl_setClock(DEVICE_SETCLOCK_CFG);

    SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);

    ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
    ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);

#ifndef _FLASH
    //
    // Call Device_cal function when run using debugger
    // This function is called as part of the Boot code. The function is called
    // in the Device_Init function since during debug time resets, the boot code
    // will not be executed and the gel script will reinitialize all the
    // registers and the calibrated values will be lost.
	// Sysctl_deviceCal is a wrapper function for Device_Cal
    //
    SysCtl_deviceCal();
#endif

    //
    // Turn on all peripherals
    //
//    Device_enableAllPeripherals();

    //
    // Lock VREGCTL Register
    // The register VREGCTL is not supported in this device. It is locked to
    // prevent any writes to this register
    //
    ASysCtl_lockVREG();

    //
    // Configure GPIO20 and GPIO21 as digital pins
    //
  //  GPIO_setAnalogMode(20U, GPIO_ANALOG_DISABLED);
  //  GPIO_setAnalogMode(21U, GPIO_ANALOG_DISABLED);
}

//
// Note that the watchdog is disabled in codestartbranch.asm
// for this project. This is to prevent it from expiring while
// c_init routine initializes the global variables before
// reaching the main()
//
void main(void)   //APP区main函数部分代码
{
    // read the LFUCPU register bit to determine if an LFU switchover is currently in progress
    // if it is, skip all initializations except the necessary ones
    lfu_cpu = LFU_getLFUCPU(LFU_BASE);

    if(lfu_cpu != LFU_CPU)
    {
        //Clear all interrupt, initialize PIE vector table:Disable CPU interrupt
        DINT;
        //
        // Set up the basic device configuration such as initializing PLL,
        // copying code from FLASH to RAM, and initializing the CPU timers that
        // are used in the background A, B, C tasks
        //
        //Disable CPU interrupts and clear all CPU interrupt flags

        IER = 0x0000;
        IFR = 0x0000;
    
        // Initialize device clock  and peripherals and flash
        Device_Init();  //在这个函数里将将FLASH_API函数搬运至RAMGS2中，并进行了时钟配置
    }
}

//*****************************************************************************
//
// Function to initialize the device. Primarily initializes system control to a
// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
// and enabling the clocks to the peripherals.
// The function also configures the GPIO pins 20 and 21 in digital mode.
// To configure these pins as analog pins, use the function GPIO_setAnalogMode
//
//*****************************************************************************
void Device_Init(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();

#ifdef _FLASH
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: InitFlash();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
    memcpy(&isrcodefuncsRunStart, &isrcodefuncsLoadStart,
               (size_t)&isrcodefuncsLoadSize);   //测试这两个搬运函数执行时间只有900us
    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES); // InitFlash();
#endif

    //
    // Set up PLL control and clock dividers
    //设置晶振源
    SysCtl_setClock(DEVICE_SETCLOCK_CFG);

    //
    // Make sure the LSPCLK divider is set to the default (divide by 4)
    //
    SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);

    //
    // These asserts will check that the #defines for the clock rates in
    // device.h match the actual rates that have been configured. If they do
    // not match, check that the calculations of DEVICE_SYSCLK_FREQ and
    // DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
    // expected if these are not correct.
    //
    ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
    ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);

#ifndef _FLASH
    //
    // Call Device_cal function when run using debugger
    // This function is called as part of the Boot code. The function is called
    // in the Device_Init function since during debug time resets, the boot code
    // will not be executed and the gel script will reinitialize all the
    // registers and the calibrated values will be lost.
	// Sysctl_deviceCal is a wrapper function for Device_Cal
    //
    SysCtl_deviceCal();
#endif

    //
    // Turn on all peripherals
    //
    Device_enableAllPeripherals();

    //
    // Lock VREGCTL Register
    // The register VREGCTL is not supported in this device. It is locked to
    // prevent any writes to this register
    //
    ASysCtl_lockVREG();

    //
    // Configure GPIO20 and GPIO21 as digital pins
    //
  //  GPIO_setAnalogMode(20U, GPIO_ANALOG_DISABLED);
  //  GPIO_setAnalogMode(21U, GPIO_ANALOG_DISABLED);
}

//
// Note that the watchdog is disabled in codestartbranch.asm
// for this project. This is to prevent it from expiring while
// c_init routine initializes the global variables before
// reaching the main()
//
void main(void)   //APP区main函数部分代码
{
    // read the LFUCPU register bit to determine if an LFU switchover is currently in progress
    // if it is, skip all initializations except the necessary ones
    lfu_cpu = LFU_getLFUCPU(LFU_BASE);

    if(lfu_cpu != LFU_CPU)
    {
        //Clear all interrupt, initialize PIE vector table:Disable CPU interrupt
        DINT;
        //
        // Set up the basic device configuration such as initializing PLL,
        // copying code from FLASH to RAM, and initializing the CPU timers that
        // are used in the background A, B, C tasks
        //
        //Disable CPU interrupts and clear all CPU interrupt flags

        IER = 0x0000;
        IFR = 0x0000;
    
        // Initialize device clock  and peripherals and flash
        Device_Init();  //在这个函数里将将FLASH_API函数搬运至RAMGS2中，并进行了时钟配置
    }
}

//*****************************************************************************
//
// Function to initialize the device. Primarily initializes system control to a
// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
// and enabling the clocks to the peripherals.
// The function also configures the GPIO pins 20 and 21 in digital mode.
// To configure these pins as analog pins, use the function GPIO_setAnalogMode
//
//*****************************************************************************
void Device_Init(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();

#ifdef _FLASH
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: InitFlash();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
    memcpy(&isrcodefuncsRunStart, &isrcodefuncsLoadStart,
               (size_t)&isrcodefuncsLoadSize);   //测试这两个搬运函数执行时间只有900us
    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES); // InitFlash();
#endif

    //
    // Set up PLL control and clock dividers
    //设置晶振源
    SysCtl_setClock(DEVICE_SETCLOCK_CFG);

    //
    // Make sure the LSPCLK divider is set to the default (divide by 4)
    //
    SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);

    //
    // These asserts will check that the #defines for the clock rates in
    // device.h match the actual rates that have been configured. If they do
    // not match, check that the calculations of DEVICE_SYSCLK_FREQ and
    // DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
    // expected if these are not correct.
    //
    ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
    ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);

#ifndef _FLASH
    //
    // Call Device_cal function when run using debugger
    // This function is called as part of the Boot code. The function is called
    // in the Device_Init function since during debug time resets, the boot code
    // will not be executed and the gel script will reinitialize all the
    // registers and the calibrated values will be lost.
	// Sysctl_deviceCal is a wrapper function for Device_Cal
    //
    SysCtl_deviceCal();
#endif

    //
    // Turn on all peripherals
    //
    Device_enableAllPeripherals();

    //
    // Lock VREGCTL Register
    // The register VREGCTL is not supported in this device. It is locked to
    // prevent any writes to this register
    //
    ASysCtl_lockVREG();

    //
    // Configure GPIO20 and GPIO21 as digital pins
    //
  //  GPIO_setAnalogMode(20U, GPIO_ANALOG_DISABLED);
  //  GPIO_setAnalogMode(21U, GPIO_ANALOG_DISABLED);
}

//
// bankSelect -  Located at the beginning of bank 0 (0x80000),
//               Bank_Select branches to the most recently programmed
//               bank after execution of the Live DFU command.
//               If a bank has not been programmed using the Live
//               DFU command, it branches to the kernel setup so that
//               the command can be used to program bank 1.
//
#ifdef __cplusplus
#pragma CODE_SECTION("codestart");
#else
#pragma CODE_SECTION(bankSelect, "codestart");
#endif

void bankSelect(void)
{
    uint32_t REV_BANK0 = HWREG((uint32_t)B0_REV_ADD); // Read the revision value of bank 0
    uint32_t REV_BANK1 = HWREG((uint32_t)B1_REV_ADD); // Read the revision value of bank 1

//    Device_Init(); //在这个函数里将将FLASH_API函数搬运至RAMGS2中，并进行了时钟配置
//    Flash_Init(); // Initialize the Flash API


    if (REV_BANK1 < REV_BANK0)
    {
        asm("    LB 0x9FF00");
    }
    else
    {
        asm("    LB 0x8FF00");
    }
}

***********************************************************************
* Function: wd_disable
*
* Description: Disables the watchdog timer
***********************************************************************
    .if WD_DISABLE == 1

    .text
wd_disable:
    SETC OBJMODE        ;Set OBJMODE for 28x object code
    EALLOW              ;Enable EALLOW protected register access
    MOVZ DP, #7029h>>6  ;Set data page for WDCR register
    MOV @7029h, #0068h  ;Set WDDIS bit in WDCR to disable WD
    EDIS                ;Disable EALLOW protected register access

;   POR Only - Initialize All RAMS
    EALLOW
;   MemCfgRegs.DxINIT.all = 0x0003 (RAMs M0, M1)
    MOVB    ACC, #0x3
    MOVW    DP, #0x17d0                          ;Set DP to MemCfgRegs
    MOVL    @0x12, ACC                           ;Write 0x3 to MemCfgRegs.DxINIT.all
;   MemCfgRegs.LSxINIT.all = 0x00FF (RAMS LS0 - LS7)
    MOVB    ACC, #0xFF
    MOVL    @0x32, ACC                           ;Write 0xFF to MemCfgRegs.LSxINIT.all
;   MemCfgRegs.GSxINIT.all = 0xF (RAM GS0-GS3)
    MOVW    DP, #0x17d1                          ;Set DP to MemCfgRegs.GSxLOCK
    MOV     ACC, #0xF
    MOVL    @0x12, ACC                           ;Write 0xF to MemCfgRegs.GSxINIT.all
;   MemCfgRegs.MSGxINIT.all = 0x66 (RAMS CPU1/CLA1 MSG, CLA1/DMA MSG)
    MOV     ACC, #0x66
    MOVL    @0x32, ACC                           ;Write 0x66 to MemCfgRegs.MSGxINIT.all

    MOV     @T,#2080                             ;Wait 2048 + 32(=buffer)cycles  8KB RAM
    RPT     @T
    || NOP

    LB _c_int00         ;Branch to start of boot._asm in RTS library

    .endif

;end wd_disable

    .end